JPS5864525A - Function generator - Google Patents

Abstract

PURPOSE:To vary the repetitive period of a function output easily over a wide range, by varying the rate of thinning when a sampled-value sequence is read out of a memory. CONSTITUTION:In a memory 11, a sampled-value sequence in a prescribed section of a period function is stored. This sampled-value sequence is read out of the memory by address data from an address specifying circuit 15 and a clock signal CK from a clock oscillator 16. This signal CK specifies the read timing of the memory 11 and the timing of the address specifying operation of the circuit 15. The circuit 15 consists of, for example, a counter and is set according to a repetitive period setting code X supplied externally. For the sampled-value sequence in the memory 11, the order of address specification is so set that every (N)th value (N; optional integer) is accessed successively, thereby reading it out as a function output.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a function generating device that reads out a sample value series stored in a memory as appropriate to obtain a function output with a desired <return period.

Conventionally, function generators based on analog methods such as the fold line approximation method are often used. However, this type of function generator generally has a complex configuration, and it is difficult to obtain high stability, especially when the variable range of the return period of the function output is widened. There's a problem.

On the other hand, as a function generator of another type, the one shown in FIG. 1 is known. This is a series of n sample values for one period of a periodic function as shown in Figure 2 (,) (in the example shown, n =
8) For example, digitally encode xl to
, a D/A converter 3 and an interpolation filter 4, and output to an output terminal 5 as a function output.

The read interval of the memory J is given by the cycle τ of the clock signal CK, and the cycle cycle T of the function output is expressed by nτ. Now, if we set τ = τl as shown in Figure 2 (a), then T""Tt = 8τl, and as shown in (b) and (c), τ = τ2 - τl/2 or τ = τ3; τ1 /4, then T=T=Tl/2 T=Ts=Tt/4. That is, the repetition period T of the function output can be arbitrarily determined by the period τ of the clock signal CK.

, ' This type of function generator has the advantage that the stability of the 111 force waveform is high and the waveform is highly arbitrary. However, on the other hand, the repetition period of the function output is determined only by the period of the clock signal.
This requires a wide range of variation, making it difficult to maintain the stability of the clock oscillator 20. Furthermore, since the lower limit of the repeating period of the function output is suppressed by the operating speed of the memory 1, this is one of the reasons why it is not possible to set a wide variable range of the repeating period.

Therefore, an object of the present invention is to use a sample value series that can vary the oscillation period of a function output over a wide range, in addition to requiring high stability over a wide range of oscillation periods for a black oscillator. The purpose of the present invention is to provide a function generator that can provide a function generating device.

The present invention achieves the above object by appropriately thinning out the sample value series of the periodic function stored in the memory. That is,
The sample value series stored in memory is N (N is any integer)
The present invention is characterized by the provision of an addressing circuit which performs address designation of the memory for sequential access for each item, and allows the value of N to be controlled from the outside. In this case, the clock signal output from the RIQ, RI oscillator determines the timing of the addressing operation of the addressing circuit and is used as a clock signal for reading the sample value accessed by the addressing circuit from the memory. It will be done.

In the present invention, by changing the value of N, in other words, the thinning rate when reading the sample value series from the memory,
The 〈υ return period of the function output can be easily varied over a wide range. If the cycle of the function output can be varied discretely, the cycle of the clock signal may be constant.

In addition, by changing the period of the clock signal, it is possible to continuously change the period of the function output, but even in that case, the variable range of the clock signal period 6- may be narrow; The stability of the clock oscillator can be easily increased.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 3 shows an embodiment of the present invention. In the figure, the memory 11 is a digital memory υ,
It is assumed that a digitally encoded sample value sequence of a periodic function is stored in advance. The sample value series stored in the memory 11 is read out using the address data from the addressing circuit J5 and the clock signal CK from the clock oscillator 16'. Clock Iba No. CK is memory 1
1 read timing and the timing of the address designation operation (address data sending operation) of the address designation circuit J5. The addressing circuit 15 sets the order of addressing in order to sequentially access every Nth sample value series in the memory 11 according to the <υ return cycle setting code X, which is generated by a counter and given from the outside. .

The sample value series read out from the memory 11 is converted into υ analog values by the D/A converter 2, and further converted into a multi-continuous waveform by the interpolation filter 13, which is led to the output terminal J4 as a function output.

A ronograph filter is used as the interpolation filter 3, and its S cutoff frequency fe is set to υ according to the sampling theorem. τmix is the idle period of the clock signal CK.

By the way, once fc is determined, according to the sampling theorem, 1・<21
The sampling period of .degree. is redundant and has no effect on the waveform of the function output, at least when the interpolation filter 3 is an ideal low-pass filter. That is, for example, if f=-L 8 2τ1 in FIG. 2, the period τ is less than 1η as shown in (b) and (C).

Reading out the sample value series using the clock signal τ3 (this is equivalent to the sampling period τ being τ2.τ3) is wasteful in terms of the amount of information. This means that even if the sample value series stored in the memory 11 is thinned out and read out as in the present invention, if the combing period of the function output obtained at that time is less than fa/2, the sampling theorem is satisfied. This means that the amount of information satisfies the necessary and sufficient conditions.

Next, a specific example of function generation in this embodiment will be explained. When generating a sine wave as a function output, the memory 11
For example, as shown in Figure 4, there is a sample value series in which one period section of a sine wave is sampled at 128 points at equal intervals xi) l
XI + X Zeng...Memorize X117.

If the frequency af of the black and red signals is set to 12.8 kT (z is constant, and the sample value series XQ to A sine wave of 100 kT (z is obtained as the function output. Also, for every second sample value series XQ~X!Snow 7, the sample value series XQrXg.

9-X engineering...When reading out X 126 , a 200 Hz sine wave is obtained as shown in FIG. 5(a). Similarly below,
When reading every 4th, 8th, 16th, and 32nd, the frequencies are 400Hz, 800Hz, 1.6Hz, and 1.6Hz, respectively, as shown in Fig. 5(b), (C), and (d).
A 3.2kHz sine wave is obtained. The higher the return frequency of the function output, the greater the difference between the read sample values, but as you can see from the above explanation, if the return frequency is less than flI/2, the information cover is necessary. It is clear that the sufficient conditions are satisfied.

In the above explanation, N=2'' (m=o, 1.2・), but N may be arbitrary and does not need to be evenly divisible by the number of sample values for one cycle.Fig. sample value series
This shows a sample value series when (1''=Xl117 is read out repeatedly every 61st time.) This sample value series is also passed through the interpolation filter 3 and becomes a correct sine wave as shown by the broken line.

Furthermore, in the above explanation, the period of the clock signal CK is 1/f.
Although the clock oscillator 16 is assumed to be constant in the explanation, it is also possible to construct the clock oscillator 16 by a voltage controlled oscillator and make its oscillation cycle variable, and change this by the control voltage of the control voltage generating circuit 17. By doing this, the 〈return period of the function output can be changed to the clock signal C.
When the period of K is kept constant and only N is changed, it is possible to change it even during the repeating period, which is obtained discretely. That is, it is possible to continuously change the cycle of the function output. In this case, the purpose of varying the cycle of the clock signal OK is to finely adjust the cycle of the function output, so the range of variation may be small. Therefore, it is possible to increase the stability of the black oscillator and, in turn, improve the stability of the function generator.

The control voltage generation circuit 17 may simply generate a variable voltage, but it can be used as a tone generator for an electronic musical instrument by configuring the circuit with a low frequency oscillator and modulating the frequency of the black signal CK. It is also possible to generate vibrato and warble tones used in sound field measurements.

Furthermore, in the present invention, the repeating cycle of the function output can be shortened without increasing the read speed from the memory I (frequency of the black signal CK), so that υ
The lower limit of the return period is not suppressed by the operating speed of the memory J1.

Therefore, while maintaining the stability of the clockwise oscillator 16, it is possible to widen the variable range of the clockwise cycle.

The sample value series stored in the memory 11 does not necessarily have to be for one period of the periodic function, but can be stored in a suitable interval less than one period by taking advantage of the symmetry of the waveform of the periodic function. This can also be done by storing only the following information in the memory J1. For example, focusing on a cosine wave, its waveform has an image symmetry of f# on the phase axis, with the first half and the second half of one cycle centered on a point where the phase angle φ is φ=π [rad]. Utilizing these and
A sample value series XI)""X.4 at equal phase intervals in a half-period interval up to π (rad) is stored in the memory 11. Then, the addressing circuit 15 outputs the sample value series X6""'
The order of X64 is reversed every half cycle to specify addresses for access. For example, in Figure 7, the phase points 0 (rad) and π (
Since the sample value XQ+3CI+4 of rad) is stored in the memory 11, which is sampled at equal intervals, ■xO→x1→x鵞→""X@2 °S63■xaa
→x63 →x■ →”'Xll →X!■XO→x
Access is made as follows: 1 →XI →"'xs →x@3... As a result, one cycle of cosine waves is obtained as a repetitive function output at the output terminal J4.

FIG. 8 shows how the half-period section of a cosine wave is sampled without including both ends thereof. Sample value xn (n=0~63)
0M, which is sampled at a phase point, is the number of sampled values within one period, and is 128 in the example shown. If sample value series X6-x・3 like this 13- is stored in memory J1, ■xO→x1→x3→0°°→X1llll→x■■x6
s→x■→xat→1°3→xl→XO■xO→x1→
If you access Xfi→°°1→x6 mushroom→X6m..., you will get the same result as before.

When reading a sample value series by thinning it out, it is best to access every Nth sample value according to the order of ■■■... In this way, depending on the waveform of the periodic function, the sample value in the half period interval It is best to store the sequence in the memory 11 and access it by reversing the order every half cycle.
capacity can be saved. Note that this method is not limited to cases where the periodic function is a cosine wave, but can be applied to all periodic functions whose waveforms have mirror image symmetry on the phase axis in both years and the second half of one cycle.

FIG. 9 shows another embodiment of the present invention.
1, only the absolute value of the zero value series of the periodic function in the interval less than one period is stored, and in synchronization with the addressing operation from the addressing circuit 15, the MEIB (polarity bit) of the D/A converter 12 is stored. ) to the polarity designation signal J
This gives a value of 8.

For example, assume that the periodic function is a sine wave as illustrated in FIGS. If one cycle is composed of a positive half-cycle section 101 and a negative half-cycle section 102 of a mutually symmetrical waveform, only the sample value series of the positive or negative half-cycle section should be stored. , I kept hearing this from memory IJ.

In the D/A parter J2, the polarity is reversed every half cycle according to the polarity designation No. b 18 and taken out.

That is, as an example of an encoding method, consider 4-bit encoding using folded binary representation shown in the following table.

In this example, the MSH separates positive analog levels (including 0) and negative analog levels, and the bits below the second MSB represent their absolute values. Therefore, only the data of bits below the 2nd M8B are memorized.
1, and the data corresponding to the MSB is given to the polarity designation signal 18. C. 24 positive and negative levels can be expressed by the 3-bit memory cell, which saves the capacity of the memory 11. It is possible that D/
The A converter 12 is often used in complement representation or natural 2
Although they are expressed in base numbers, these can be easily converted using well-known techniques.

In the embodiment shown in FIG. 9, it is generated.

In cases where the power periodic function is a cosine wave as shown in Figure 11(,)(b), the first half and the second half of one period are mirror images on the phase axis, and each half-period section is symmetrical to each other. Positive 1/4 period section 111 and negative 1/4 period section 11 of the waveform
In the case of a periodic function consisting of 2 and 2, positive or negative 17
Only the sample value series of the 4-cycle interval 111 or 112 is stored in the memory 11, and the addressing circuit 15 inverts the order and outputs it every 174 cycles, and 1/417
- If the polarity is reversed and taken out every cycle, the capacity of Memo I) J J can be further reduced.

In the present invention, the memory for storing the sample value series of the periodic function is not limited to a digital memory, but may be an analog memory that combines a variable resistor group, a voltage storage element, and addressing f-). Furthermore, when using a digital memory, the function output may be taken out as a digital signal and a digital filter may be used as the interpolation filter. Furthermore, an interpolation filter is not necessarily required.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional function generator, Fig. 2 is a diagram for explaining its operation, Fig. 3 is a block diagram of an embodiment of the present invention, and Figs. 4 to 8 are its operation. Diagram to explain,
FIG. 9 is a block diagram of another embodiment of the present invention, and FIGS. 10 and 11 are diagrams for explaining its operation. 11...Memory, 12...D/A converter, 13
...Interpolation filter, J4...Output terminal, 15...
At 18-res estimation circuit, 16... clock oscillator, 17...
Control voltage generation circuit, 18...Polarity designation signal. Applicant's agent Patent attorney Takehiko Suzue 19- 11E3 Figure 1 Saso 0 Transfer 151

Claims (5)

[Claims] (1) A memory that stores a sample value series of a predetermined interval of a periodic function; an externally controllable addressing circuit in which the value of N determines the timing of the addressing operation of this addressing circuit and reads sample values accessed by this addressing circuit from the memory; a clock oscillator for obtaining a clock signal for the function generator, and the function generator is configured to take out a sample value series read from the memory as a function output. (2) The function generating device according to claim 1, wherein the memory stores a sample value series of one period section of the periodic function. (3) The memory stores a series of sample values of the positive or negative half-period of a periodic function, each period of which is composed of a positive half-period and a negative half-period of a symmetrical waveform. 2. The function generating device according to claim 1, wherein the polarity of the sample value series read from the memory is inverted every half cycle and taken out as a function output. (4) The memory stores a series of sample values of a half-period period of a periodic function whose waveform is mirror-symmetric on the phase axis in the first half and second half of one cycle, and the addressing circuit stores the sample values stored in this memory. 2. The function generating device according to claim 1, wherein addressing is performed to access the value series by reversing the order every half cycle. (5) The first half and the second half of one cycle are mirror-image symmetrical on the phase axis, and each half-period section consists of a positive 1/4 period period and a negative 1/4 period period of mutually symmetrical waveforms. The addressing circuit stores a sample value series in a positive or negative 1/4 period period of a periodic function, and the addressing circuit reverses the order of the sample value series stored in this memory every 1/4 period. The special 1'f sentinel is characterized in that the sample value sequence read from the memory is inverted in polarity every 1/4 cycle and taken out as a function output. The function generator according to item 1.