JPS586437U - Reset signal generation circuit for initial setting - Google Patents
Reset signal generation circuit for initial settingInfo
- Publication number
- JPS586437U JPS586437U JP1981098974U JP9897481U JPS586437U JP S586437 U JPS586437 U JP S586437U JP 1981098974 U JP1981098974 U JP 1981098974U JP 9897481 U JP9897481 U JP 9897481U JP S586437 U JPS586437 U JP S586437U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- reset signal
- signal generation
- generation circuit
- initial setting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K2017/226—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in bipolar transistor switches
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図及び第2図は、従来例を示す回路図、第3図は、
本考案の一実施例を示す回路図、第4図は、第3図の回
路動作を示す波形図、第5図及び第6図、第3図の回路
の出力及び制御回路に供給されるその他の信号の出力タ
イミングを示す波形図である。
主要部分の符号の説明、2・・・・・・積分回路、3・
・・・・・レベル検出回路、4・・・・・・微分回路;
5・・・・・・信号出力回路、6・・・・・・電源オフ
検出回路。1 and 2 are circuit diagrams showing a conventional example, and FIG. 3 is a circuit diagram showing a conventional example.
A circuit diagram showing an embodiment of the present invention; FIG. 4 is a waveform diagram showing the operation of the circuit shown in FIG. 3; FIGS. 5 and 6; outputs of the circuit shown in FIG. FIG. 2 is a waveform diagram showing the output timing of the signal. Explanation of symbols of main parts, 2...Integrator circuit, 3.
... Level detection circuit, 4 ... Differentiation circuit;
5... Signal output circuit, 6... Power off detection circuit.
Claims (1)
積分回路と、前記積分回路の出力のレベルが所定レベル
に達したとき検出信号を発生するレベル検出回路と、前
記レベル検出信号を微分する微分回路と、前記微分回路
の出力に応じてリセット信号を出力する信号出力と、電
源オフされたことを検出して前記積分用コンデンサにお
ける充電電荷を放電する電源オフ検出回路とからなるこ
とを特徴とする初期設定用リセット信号発生回路。, an integrating circuit that includes an integrating capacitor and integrates a power supply voltage, a level detection circuit that generates a detection signal when the level of the output of the integration circuit reaches a predetermined level, and a differentiation circuit that differentiates the level detection signal. , a signal output that outputs a reset signal according to the output of the differentiating circuit, and a power-off detection circuit that detects that the power is turned off and discharges the charge in the integrating capacitor. Setting reset signal generation circuit.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981098974U JPS586437U (en) | 1981-07-01 | 1981-07-01 | Reset signal generation circuit for initial setting |
KR2019820004085U KR860002473Y1 (en) | 1981-07-01 | 1982-05-25 | Reset circuit for initial setup |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981098974U JPS586437U (en) | 1981-07-01 | 1981-07-01 | Reset signal generation circuit for initial setting |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS586437U true JPS586437U (en) | 1983-01-17 |
JPH0317474Y2 JPH0317474Y2 (en) | 1991-04-12 |
Family
ID=29893721
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1981098974U Granted JPS586437U (en) | 1981-07-01 | 1981-07-01 | Reset signal generation circuit for initial setting |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPS586437U (en) |
KR (1) | KR860002473Y1 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5034446A (en) * | 1973-07-30 | 1975-04-02 | ||
JPS5442455U (en) * | 1977-08-30 | 1979-03-22 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5164637A (en) * | 1974-12-02 | 1976-06-04 | Otani Shigeki | Doreentoratsupuno doreenryushitsuryochoseisochi |
-
1981
- 1981-07-01 JP JP1981098974U patent/JPS586437U/en active Granted
-
1982
- 1982-05-25 KR KR2019820004085U patent/KR860002473Y1/en active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5034446A (en) * | 1973-07-30 | 1975-04-02 | ||
JPS5442455U (en) * | 1977-08-30 | 1979-03-22 |
Also Published As
Publication number | Publication date |
---|---|
KR860002473Y1 (en) | 1986-09-25 |
KR830004349U (en) | 1983-12-30 |
JPH0317474Y2 (en) | 1991-04-12 |
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