JPS5858697B2 - power calculation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is applicable to simple calculation devices such as electronic desktop calculators (hereinafter referred to as calculators) (such as calculators using the exponent calculation method, which are extremely suitable). Therefore, even low-priced small calculators that can only perform four arithmetic operations almost always have a power calculation function added to them.

A calculator like this (4) In order to use its multiplication function as effectively as possible to perform exponentiation calculations, use the A [El"l key operation to
2, and then perform the multiplication tζ×A every time the key presses continue, and obtain the exponentiation A3. A method to obtain A4... or calculate A2 by pressing the A[EEI key, and then execute the multiplication xA for each key press on the following days to the power A3゜A4...
A method is adopted to obtain...

The above method does not require a special program for power calculation, but when the desired power becomes large, A11
In addition, the key operations are complicated, such as Q→ku day→ku day, etc., and the operator has to memorize the number of key operations on bad days.

In order to eliminate this inconvenience, there is a method that automatically repeats the multiplication (×A) (B-1) times by pressing the key 0 (n: power instruction key) for A[mB[E. This method has the disadvantage that the number of multiplications is extremely large and the calculation time is extremely long.

On the other hand, high-priced calculators similarly calculate A to the B power with the AE]3 key operation (Xn: power indication key).
This calculator uses a method that first converts the power to a logarithm, and then calculates the logarithm.

This method is suitable for high-end calculators with functions for calculating trigonometric functions, logarithms, etc., but if you are trying to use it in the low-priced calculator mentioned above, it is better to use a method for calculating logarithms only for exponentiation calculations. It requires a complicated program and a dedicated circuit, which increases the price, making it rather unsuitable.

As mentioned above, calculators with simple arithmetic functions such as low-cost calculators usually do not have subdivided command words and perform operations such as addition, subtraction, multiplication, and division in a predetermined order. Configuring a new routine for calculations complicates the control device and is not economical.

The present invention has been made in view of the above points, and it is possible to perform exponentiation calculations in a very short time by effectively utilizing the multiplication routine and adding some control in this type of computer without building a special routine. This is what I did.

Below is a preferred embodiment (calculator) for achieving the above purpose.
will be explained according to the drawings.

Since the power calculation method of the present invention is based on the following completely new calculation formula, this calculation formula will be explained first.

A to the B power is the exponent B (B is an integer) B = 2 (p') - ap + 2 (p - 2) - a (p - 1) -
1-, , , , 2・a2+a1
・・・・・・・・・■However, p: 1, 2.・・・・・・
・, ap...al: When expressed in pure binary numbers like 1orO, AB2A2(p-1)°apxA2(p-2)°a(p
→) x −・・・×A2°a2XAal
・・・・・・・・・It is expressed as ◎.

◎Place each term in the formula as follows: Aa1-AI, A2°a2=A2.0 The formula is expressed as follows.

AB=ApXMp-1)X...A2XA1...
......O In the above At to Ap, the above a1 to ap are 10" or 11", so if ai=o, Al=A2-...Ap=1...
...@ai=1 At2A"(")=A=AI A2-A2(2-1)-ge-(At)2 A3:A2(3-1):((A) 2) 2: (A2) 2A
4=A2(” )=(((A)2)2)”Ap-A2
(p-i)-(...((A)2)2...
・)2(A(p-1))2 ■ (A3)2.

Therefore, according to Equation 0, A to the B power is the Ai term (
It can be seen that only (shown in above) are sequentially multiplied.

For example, al, a2. AP is “1” and all other AIs are 10
“, then AB=Ap XA 2 ×AI.

Moreover, each term At to Ap in the above ■ is the base A to the 21st power (
i:otlt2t...), A2~Ap
are respectively the squares of the previous terms A1 to A(p-1).

If you think about it the other way around, you can repeat squaring based on the base A and get ai=
If A2 to Ap in the case of 1 are found, only Ai where ai=1 is selected and further multiplied, A to the B power should be obtained.

The power calculation method of the present invention is based on the above-mentioned idea, and its concrete configuration will be described below.

Figure 1 is a block diagram of the main parts when implemented in a calculator.

In Fig. 1, the main components are an and an N-bit W register.

The above W register has an ant game 14N1 connected to the least significant bit W1 to determine whether bit ai of the above equation ``1'' or 0'', and an ant game 14N1 connected to the least significant bit W1 to determine the most significant bit ap of the exponent B. A no-game that uses human power to output W2 to WN.
and NOR are provided.

Z is an auxiliary register with an N-digit capacity, and is mainly used when calculating A to the 2i power.

FAI is a full adder/subtracter that executes multiplication between registers X, Y, and Z (hereinafter abbreviated as FAI).

AN2 to ANn are AND gates used in achieving the present invention, and their operation will become clear from the following description.

The ROM is an arithmetic control unit that generates control signals (2), (2), etc. for controlling the above-mentioned components.

DC is a code converter for converting the exponent B, which was initially stored in the register X as a binary coded 1O base code, into a pure binary code and introducing it into the W register.

The above X, Y, and Z registers have a circular holding function that circularly holds the memory contents (represented by X-+X, Y-+Y, Z-+Z).
, a transfer function (represented by x-+y, Y-)Z, etc.) that transfers the entire memory contents to another register, and a transfer function (X-)X that stores the same contents in other registers while retaining the memory contents. , x-+y, Y→y, y-+z, etc.), but a self-maintaining circulation loop is not shown.

Next, the operation of obtaining A to the power of B (B is a positive integer) using the above configuration will be explained with reference to the flowchart of FIG.

Enter the number A by operating the number keys on the keyboard.
is first stored in the X register.

Next, by operating the giant Q lokey, the power calculation instruction is given to the upper ip.
is memorized.

Here, when you specify exponent B using the numeric keys, the contents A of the X register are transferred to the Y register via gate AN2.
An exponent B is stored in the register.

Next, when the date key is operated, the calculation starts, and in the first step f1, the open side control signal ■ is generated from the ROM, and the exponent B is introduced into the code converter DC through the gate AN3, and the pure binary number is After converting to , it is stored in the W register.

In the next step f2, 10'' is stored in the X register.

Note that the operations in steps fi and f) can be performed in the same step.

In the state where the f2 step is completed, the base A is placed in the register Y as a binary code ■0 base code, and the a of the above 0 formula is placed in the register W.
l, A2. Songs...ap are stored in order from the least significant bit W■.

Here, in order to find A1 in the above equation 0, the control signal ■
turns on the gate AN1 and determines the contents of the Wl bit (ie, al) (step f3).

If W l == a, = 1, then A1=A, so the signal ■ turns on gates AN4 and AN5, transfers the contents A of register Y to register X (y-+x), and transfers the contents of A to register X. Get the first power.

In this case, the content A of Y is held (Y-+Y) in step Cf5].

If W1=a1=:0, it is A1-1, so gates AN6, AN7, and AN5 are turned on by signal ①, and X
-+-t→X to obtain A to the 0th power, ie, "1", in register X (f4 step).

As described above, according to the present invention, only the value of the first term A1 is stored in the X register without being multiplied.

Next, in order to obtain the value of A2 of the 0 formula, the process moves to step f6, and the contents of the W register are shifted to the right by 1 bit using the clock φi, and the bit value a2 is placed in Wl.

Then, in order to obtain A2 corresponding to the case of a 2 = 1 in the register Y, the gate AN8 is turned on by the control signal ■ and transfer (Y-)Z, y-+y) is performed, and the control signal is boiled and the register Y, Perform the multiplication between Z using FAI and obtain the result in the Y register (Y-Z-)Y).

A2 is now stored in the Y register.

(f7 step).

In this state, use the control signal ■ to determine whether A2 is 11'', and if a2 = 1, use the control signal ■ to execute multiplication between registers X and Y, and as a result, put Al-A2 into the X register. Obtain (X-?X) (f9 step).

In this case, the contents A2 of the Y register are preserved.

If A2-0, then A221, so no multiplication is performed and X
The contents A1 of the register remain unchanged.

By the operations from steps f6 to f9 described above, A2 is obtained when A2 is "1", it is determined whether A2 is 11", and the power Al up to the second term A2 is determined according to the determination result. , A2 or A in the X register.

All that is left to do is to determine whether A raised to the B power is up to the A2 term or further.

This is done in the flo step.

That is, the NOR gate NO which inputs the W2 to WN bit outputs.
When R is "1", W2 to WN are all "O", so there is no value greater than bin 133 of index B, and the calculation ends here.

However, when N0R=0, any one of W2 to WN has 'Xl''
Since there is □, the contents of the W register are shifted to the right by 1 bit again in order to continue the operation.

Return to f6 step. Thereafter, the above operation [f6~
f10], only the terms whose bit value a1 is 11" are sequentially multiplied by the contents of the register X, and A raised to the B power is obtained.

The number of multiplications using the above calculation method is as follows.

Multiplication is performed between steps f6 and flO, and in this one operation, multiplication to obtain A to the 21st power (
y-z-+y) and multiplication (X-Y-) when ai==1
X) only twice.

Therefore, even if a1 to ap are all 11'', A to the B power can be obtained by multiplying 2 (P-0 times).

This number of times is extremely small compared to the case of simply multiplying (B-1) times.

That is, if an N-digit decimal number B is expressed as a P-bit binary number, it becomes 10-2.

If we take this logarithm, NloglO=Plog 2, and according to the logarithm table, it becomes 0.3P in N.

■0 Therefore, 2 (P-1) = 2 (RyoN-1), and (B-1
)=lON-t and the magnitude relationship, 1oN-1≦
2(WN-1)>3.

Since N is an integer greater than or equal to 1, it can be seen that the larger N is, that is, the more extreme the exponent B is, the more the number of multiplications can be saved according to the method of the present invention.

As mentioned above, in order to implement the above calculation formula most efficiently, the present invention provides two separate registers for obtaining OA to the B power and a register for obtaining A to the 21st power. Make decisions sequentially starting from the lower bits. ○ First, find the value of A1, then find the value of A2 when a 2 = 1, and if al is 11", then multiply Al, A
2, then find the value of A3 in the case of a3-1 using the value of A2 in the case of a2-■, and if a3 is 11/', then calculate the value of A3 in the case of a3-1 using the value of A2 in the case of a2-■. We have taken measures such as repeating the method of multiplying A3 by A3.

In the above embodiment, after the f8 step and the f9 step, the process always passes through the f10 step and is warped by 16 steps, but as shown by the broken line in FIG. 2, the process may directly return to the f6 step after the f9 step.

In this way, the number of times the f10 step is passed is reduced.

Note that to realize this flow, the input of the NOR gate may be set to WN-Wl.

As explained above, when the exponent B is a positive integer, AB can be found very easily.

However, if the exponent is a negative integer (eg -B), AB cannot be determined using the above method.

Of course, since A-B=l/AB, it is possible to find A-B using the above method and then IEIAB, but even in that case, the key operation to find A-B is A3BG→ Memorize the obtained AB separately → 1 yen AB day...
...->A-13, which makes it very complicated.

Current calculators are devised to obtain answers by key operations according to mathematical formulas, and calculators that require complex key operations as described above are inconvenient.

Therefore, in the present invention, in order to eliminate the above-mentioned drawbacks, the eEB
A-B can be found by pressing the keys every day.

Hereinafter, a method for extremely easily obtaining A and -B by key operations such as AIE"1EIB will be explained.

The basic idea of this method is as follows.

Yo-B-Keiichi (Since the fringe B BlA , if we consider λ to be the base, A should be able to be found using exactly the same method as finding A .

FIG. 4 is a flowchart when the above idea is embodied in a calculator.
Steps from step 3 to step f10 are exactly the same as in FIG. 2.

As is clear from FIG. 4, the difference between the flowchart for finding both A and A and the flowchart for finding A is that gl, g2. g3 step is involved.

This three-step operation can also be achieved with the configuration shown in FIG. 1, but for ease of explanation, a block circuit for achieving the three-step operation is shown in FIG.

In this figure, the same parts as in FIG. 1 are designated by the same reference numerals.

In FIG. 3, XS is a code memory which normally stores the sign of numerical information in the X register as ``1%Q'', and its state is inverted every time the date key is operated.

XS represents a negative value if X5=t, and a positive value if X5=O.

The present invention uses the above-mentioned XS as a status determiner for *1Jfl selection of flowcharts, and its function will become clear from the following explanation.

Next, the operation for determining A-B will be explained with reference to FIGS. 1, 3, and 4.

The state when each key on the keyboard is operated as [B] is the same as when the key is operated as C-]''B, except that XS becomes ``l''.

If the date key is operated here, the fl and f2 steps in FIG. 4 are executed, but these operations are exactly the same as the fl and f2 steps in FIG.

Here, whether the exponent is positive or negative is determined based on the output of the sign determiner XS (step g1).

If the output is 0'', the exponent is positive, so the process moves to step f3 and performs the operation described above to obtain AB.

On the other hand, the output of XS is 1 // (Since the exponent is negative from 1, we move on to the step of finding the reciprocal of A.

First, the control signal 0 turns on the gate AN8 and transfers the contents A of the Y register to the X register (this gate AN8
6. AN7. Turn on AN5, execute X+l on FAI, and introduce the result to X (g2 step).

Next, a division of X/Z is executed in FAI using the control signals Q and O, and the result is obtained in the Y register (X/Z→Y).

This division can be performed by using a division routine that is already provided in the calculator, so there is no need to create or add a special routine.

Furthermore, since the above division uses the so-called three-register method, the number of effective digits of the operation result is N digits.

That is, during the period in which the control signal ■ is generated, execute (X-Z), and if the result is 10'' is positive, execute Y+1-)Y during the period in which the control signal 0 occurs, and then perform the next 0 generation period. During(
Since the control signals @) and @) are generated alternately to execute X-Z) and the quotient is obtained in the Y register, the number of digits in the register Y can be used as the quotient.

When the above (X-Z) is executed, the subtraction instruction Sub is supplied to FAI, causing FAl to operate as a subtracter.

In addition to the above-mentioned division control, it is necessary to control the operands, digit alignment of the operands, magnitude determination, left/right shift, etc., but since this point is well known, a detailed explanation will be omitted.

Also, if you perform division using the two-register method, the number of significant digits of the quotient will be (N
- divisor digit), but the above (X-Z) and Y+1-)
Since the operation Y can be executed in the same cycle, the division processing time can be shortened.

After the division is completed, the control signal Q) interrupts the XZX register self-holding loop to set X=OZO (not shown).

Upon completion of the above operation, the g3 step ends and the process moves to the f3 step l.

The subsequent operations are as described above.

FIG. 5 is a flowchart of a method in which when calculating A-B, AB is first obtained and if the exponent is negative, 1/A B is executed.

The key operation in this case is AIE□EIBEI, which is the same as the case in Figure 4, but the operation is the same as when the exponent is positive.
It is exactly the same up to step 0 (FIG. 2).

In Fig. 2, it ends at the flO step, but in Fig. 5,
Further, the process moves to step g4 and the contents of XS are determined.

If X5=O, the calculation ends, but if X5=1, g5
Move to step, transfer contents AB of X to Y, and transfer ゝl to Z.
“Remember.

Then, in step g6, division Z/Y is executed, the quotient is obtained in the X register, and the process is completed.

Although the circuit for accomplishing the above steps g4 to g6 is not shown, there is no major difference from that in FIG.

As mentioned above, when calculating AB using a calculator, by using the method for calculating AB, the answer can be obtained extremely easily by using the pre-installed division routine once.

That is, using XS as a sign determiner and g1~
By providing steps g3 or g4 to g6, A-B, which requires complicated key operations, can be obtained by extremely simple key operations, which is convenient for calculators and the like.

Next, an example of calculation when using the flowchart in Figure 4 (
') -13=8192 state transition diagram is shown in Figure 6 (
However, for the route from f9 to f6, use the wavy line in Figure 2).

In the above case, ``13'' is represented by 4 bits, and there are 12'' bits in 11'' other than the least significant bit.
When the broken line flowchart is used, the number of multiplications is: Y2→Y multiplication: 4 times X-Y→X multiplication: 2 times Word+6 times.

'8192“ if you do not use the dashed flowchart
Since N0R=1 at the time when is calculated, the calculation ends at this point.

Therefore, "'-Y0 multiplication -°-3 times,"

Multiplication of X-Y→X...2 times becomes.

Since the conventional method requires (13-1)=12 multiplications, it can be seen how efficient the method of the present invention is.

As described above, according to the method of the present invention, the number of multiplications in power calculation can be reduced.

Further, according to the present invention, the configuration of conventional low-cost calculators can be used almost as is, and additional circuits are hardly required.

Namely, in the configuration shown in FIG. 1), ROM, X, YZ.

FAI, each gate and f2. f4. f5. The operations of f7° to f9 steps, etc., are included in a normal calculator, but a code converter DC, a W register AN1, a gate NOR, etc. are simply added.

However, W, ANl, NOR, etc. can also be used as components in a calculator with high arithmetic functions.

Also, even in low-priced calculators, if the exponent B is limited to 15 or less, the W register only needs to be 4 bits, so the decimal point register y (for example, the register that stores the decimal point position of the Y register), which is not used during exponentiation calculations, can be shared. I can do it.

This decimal point register y is also accompanied by a gate that determines whether its contents are 'O' or not, so it can also be used as a NOR.

Furthermore, since numerical values are usually expressed in binary coded decimal codes, the code converter DC is also unnecessary in the above case.

Therefore, without adding almost any circuit to a normal calculator,
X, Y, Z depending on whether each bit of the instruction is 11" or 10"
By simply adding control over which registers to perform multiplication and division, it is possible to add a multiplication function that effectively uses the multiplication and division routines.

Further, in the above embodiment, the binary code is converted into a pure binary code by the code converter DC, but the code may be converted as follows.

Each time 11" is subtracted from the contents B of register X using FAi (this subtraction is a binary coded decimal code calculation).

Add 11" to register W in pure binary.

In this case, the above FAI can be used.

That is, in FAl, a 4-bit register for 6 correction is inserted between two full adders/subtracters to form an adder/subtracter for binary coded decimal code, and each adder/subtractor performs pure binary addition/subtraction.

Therefore, when adding 'l' to the W register, the contents input to the 6th correction register can be taken out as they are as the output of the adder/subtractor FAI.

If FAI is used for code conversion in this way, the code converter DC becomes unnecessary.

The present invention converts the exponent B into a pure binary number as described above, adds a control means for obtaining the power of 2 of the numerical value A based on this value, and also adds means for determining whether the exponent B is positive or negative. Since most of the routines are shared with the multiplication/division routines, the exponent B can be easily and inexpensively configured without creating any new routines.
It is possible to obtain a calculation function that calculates the exponentiation regardless of whether it is positive or negative.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a flowchart for explaining its operation, FIG. 3 is a block diagram of main parts of an embodiment according to the method of the present invention, and FIG. 4 is for explaining its operation. FIG. 5 is a flowchart for explaining the operation of another embodiment, and FIG. 6 is an explanatory diagram of an example of calculation according to the method of the present invention. Sign, XS: sign determiner, x, y, z-regisc ψW:
Pure binary register, FAl: Full adder/subtractor, DC: Code converter, NOR: NOR gate, AN1 Niand gate,
ROM: Operation side leg.

Claims (1)

[Scope of Claims] 1. In "power calculation" that calculates the B power of a numerical value A (where B is an integer), an exponent register that stores the exponent B as a pure binary code, and stores the sign of the exponent. means for sequentially determining whether the bit content of the exponent register is 11" or XX□" from the lower bit; a first arithmetic means that obtains a power corresponding to the weight of the determined bit; a second arithmetic means that sequentially multiplies the arithmetic results to obtain the multiplication result;
and third arithmetic means which previously sets the content A of the base circumference register to l/A when the sign storage means stores a negative sign, and the arithmetic result of the second arithmetic means is A raised to the B power. A calculation method that is characterized by controlling so that . 2. In the 1-power calculation that calculates the B power of the numerical value A (where B is an integer), an exponent register for storing the exponent B as a pure binary code, a means for storing the sign of the exponent, and the above numerical value A a base circle register for storing , a means for sequentially determining whether the bit content of the exponent register is 11" or 10" from the lower bit, and a means for determining whether the bit content of the exponent register is 11" or 10"; a second calculation means that sequentially multiplies the results of the calculation to obtain the multiplication result; and if the sign storage means stores a negative sign, the a third calculation means for obtaining the reciprocal of the multiplication result by the second calculation means;
A power calculation method characterized in that the calculation result of the calculation means is controlled to be A raised to the B power.