JPS5857761A - Photo semiconductor device - Google Patents

Abstract

PURPOSE:To lower a dark current and stabilize interface by stacking the layer having a large forbidden energy band width Eg and a multi-atomic layer including the composition atoms thereof on the semiconductor layer having a small Eg and by covering it with a protection film. CONSTITUTION:On the epitaxial layer 12 on the n<+> type InP 11, the In0.61Ga0.39 As0.83P0.17 13 having a smaller Eg is surrounded by the n type InP 14 having a larger Eg, and the incident light is absorbed by the layer 13. In addition, at the surface, the insulating film 17 is provided over the n type In0.9Ga0.1As0.2P0.8 15 having a large Eg and the characteristic at the interface is stabilized and a dark current is lowered. The p-n junction is isolated from the layer 13 and maintains the hard junction characteristic by the impurity concentration distribution and efficiently collects the photo exciting carrier. Moreover, since the depletion layer width can be made wide, the junction capacitance can be made small and the element can operate at a high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor detectors. 41! In the past, #! As shown in FIGS. 1(a) and 1(b), a light receiving element having a mesa type or planar type structure has been proposed.

The structure shown in FIG. 1(a) is different from the structure shown in FIG.
A half-layer 022 of a conductivity type and a half-layer 03 of a second conductivity type are formed, and electrodes 08 and 09 are provided thereon. In a mesa structure as shown in FIG. 1 (18), a high electric field is exposed at the junction end face, so the device characteristics are influenced by the property of 0 surface retention mI# (I/c), which is not desirable for practical use.

On the other hand, the planar structure shown in FIG. 1(b) (Vfff Publication No. 132079/1983) is expected to provide more stable operation than the mesa structure. In the structure shown in Fig. 1b), n-type InP is formed on a J I n P semiconductor substrate l.
Layer 2. InGaAsPj63 and n-type InP layers are formed. For example, 6 is a 3d diffusion layer and a Pn junction is formed at this diffusion end face. It is thought that the surface layer 9 may be dissociated and altered in quality during the heat treatment step of the device fabrication process after growth. Therefore, the interface characteristics after the formation of the surface protective film 1 become unstable, and the dark tf
This causes i to become large.

The object of the invention is to eliminate the aforementioned drawbacks,
The purpose of the present invention is to provide a small and stable version of Ifxa.

As shown in FIG. 2, the gist of the present invention is that a material layer 14 (first semiconductor layer) with a large bandgap width, which serves as an optical window layer, is placed on a material layer 13 (first semiconductor layer) with a small bandgap width, which serves as an active region. Further, a polyatomic layer (third semiconductor layer) containing constituent atoms of 14 substances is formed, and a top layer #! is formed on top of this layer. By maintaining the narrowness, it is possible to stabilize the darkness between the semiconductor and the interface. TICk in the second semiconductor layer
◇Features a light-receiving element structure that reduces dark current and stabilizes the interface.

The third semiconductor layer has Ijl! (1) lattice overlap can be achieved with the second semiconductor layer (for example, InP). (2) They can have the same crystal system. (3) InGaAsP is preferable for OInP, which uses a semiconductor material that has properties such as being more stable than the second semiconductor layer even when exposed to high temperatures.

The InGaAsP layer on the surface may have a composition with a larger band gap than the semiconductor material of the active region.

An embodiment of the present invention is shown in FIG. 2, and its structure will be described below.

High impurity gljllllllgL n-type lnP substrate with approximately IQ cm or more -11. A well-known liquid phase epitaxial growth method is applied to the impurity @concentration of 9xlOCm and thickness of g1.
．． 5 μm n-type InP layer, 12. %: shadow formation, followed by impurity 119211 degrees 7X10 cm, thickness l,
3μm n-type ■nO, 61Ga039” 083P
O1T layer, 13. is deposited to form an n-type InP layer 14 with an impurity qmatL of 9XlOcm and a thickness of 1.8μm, and finally an impurity concentration of 7XlOcm and a thickness of 0.
2μm n-type” 0.9 Ga01 AsO,2P(1
8 layers, 15. are formed continuously. AI O and Si0
1% l of known vaporized cowhide 21
After forming by the 26 method, unnecessary Aj O and SiO films are formed by the known selection method and chinog method! After removing 82, the region 15 is further removed, and Zn or Cd impurity *5r is introduced into the regions 14 and 15 by a known diffusion method using the upper dpi insulator as a diffusion mask.
P-shaped diffusion region with a diffusion depth of 0.7 μm.

16.0 diffusion layer forming 16. and InP layer.

14. A pn junction can be formed by VC. pn junction surface and region, 13. The distance between the two is 1.1 μm.

Next, after removing the loquat that was used as the diffusion i-suffu, 8i0 or 1jsiN is obtained using a known method. 3
4 Re-formed and applied. After this, a front electrode at 18° and a back electrode at 19' were formed. This device was mounted on a suitable stem and attempted to operate as a device.

The configuration and operation of this embodiment will be explained below. In this embodiment, since the region 13 with a narrow forbidden band width is surrounded by the region with a wide forbidden band width, the incident light is absorbed in the region 13. Also.

The surface layer is formed of an InGaAsP layer with a wide forbidden band width,
Since an insulating film for surface preservation is formed thereon, the characteristics at the interface become stable, which is suitable for reducing dark current.

Further, since the pn junction is formed apart from the region 13 and the impurity S degree distribution is also arranged, hard junction characteristics can be maintained.

Moreover, it is suitable for efficiently delivering photoexcited carriers to a junction. In addition, the spread of the depletion layer is set in consideration of the electric field distribution, which reduces each junction.

Suitable for high speed.

When the device is biased in the reverse direction, the depletion I- spreads to region 14 and region 13 just below the junction. Therefore, area 1
Light waves at the long wavelength end corresponding to the forbidden band width of 3-! The holes generated by efficiently absorbing up to k become pn due to the drift electric field.
It is achieved by joining. The main characteristics of this prototype PIN photodiode are a wavelength sensitivity range of 1.0 to 1.55 μm and a Doji efficiency of 65% (1.3 μm).

Junction: iHlO, 8pF, dark current H0, 1nA (1
ov) below.

The effects of this embodiment will be explained below.

By using the interface characteristics between the fal In()aAsP layer and the insulating film, the low 11i current can be reduced.

(bl) By using the various layer configurations described above, it is possible to prevent the 1ftIL flow from occurring due to the tunnel effect.

(C) By forming the layer structure as described above, photoexcited carriers can be efficiently transferred to the junction LlcJI/4.

0 + d+ Enables High Sensitivity By using the layer configuration VC as described above, photoexcited carriers can be collected to the junction by drift howling, and the speed can be increased.

(e) By forming the layer structure as described above, the depletion 1 width can be widened, so the junction capacitance t% can be reduced, which is effective in increasing the speed of the device. In some cases, the incident direction is set to the InP substrate. Figure 3 shows an example of this. l? It is a front view. The same symbols as in FIG. 2 indicate the same parts. Layer 15 is an Intea As P shield for surface protection. The difference from the embodiment shown in FIG. 2 is that the electrode 19 removes the metal in the region located below the diffusion region 16, and the electrode 18 is provided over the entire surface to prevent insecurity of incident light.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an example of a conventional element structure. (a) shows a mesa structure, and (b) shows a planar structure.
FIG. 3 shows a cross-sectional view of an element structure of an embodiment according to the present invention. Explanation of symbols 01 ・=・n-type InP substrate, 02-=n-type 1 n
GaAs. 03...P-type InGaAs, 08.09.
-...11L8M, 1, 11...n-type InP substrate, 2...-n-type InP layer. 12------ n-type 1nP layer, 3. l 3-==
・N-type 1n()aAsl' layer, 4.14...n
type InP layer, 6.16...P type InGaAsP
Diffusion III, 7. 17.17 ・・・-・n-type In
GaAsP layer, 8. I8・・・・、p type 1 pole 9.
19...N-type 11L and others 0 1st Fig. θ8 2nd/γ 3 Fig. B Continuation of page 1 0 Author: Kurade-Kokokubunji City, Higashikoigakubo 1-280 Hitachi, Ltd. Chuo Inventor Yasushi Koga 1-280 Higashi-Koigakubo, Kokubunji City, Hitachi, Ltd. Central Research Laboratory Procedural amendment (method) Case description 1982 Patent application No. 156283 Name of invention Optical semiconductor device Person” '510°O Yunmura 111''! , Production
111 Katsu Shigeyo Osamu Contents of supplement 11d in the column for the title of the invention in the specification t*w-yrp<io+ The name of the invention in the specification is corrected to "optical semiconductor device."

Claims (1)

[Claims] On the semiconductor exhibiting the first conductivity type, the semiconductor l- of the s1 is placed.
A second semiconductor layer having a wider forbidden band width and exhibiting the first conductivity type is provided, and a pn junction is formed in which a region exhibiting the second conductivity type is provided in the second semiconductor layer. In the photodetecting device, a third semiconductor layer exhibiting the first conductivity type is provided like the semiconductor layer of Dialysis 2, and a fourth insulating film provided on the third semiconductor layer provides surface protection. Semiconductor device 0 characterized by having functions configured