JPS5856582A - Driving circuit for solid-state image pickup device - Google Patents

Driving circuit for solid-state image pickup device

Info

Publication number
JPS5856582A
JPS5856582A JP56153770A JP15377081A JPS5856582A JP S5856582 A JPS5856582 A JP S5856582A JP 56153770 A JP56153770 A JP 56153770A JP 15377081 A JP15377081 A JP 15377081A JP S5856582 A JPS5856582 A JP S5856582A
Authority
JP
Japan
Prior art keywords
current
pulse
power supply
solid
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56153770A
Other languages
Japanese (ja)
Inventor
Hideo Cho
秀雄 長
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56153770A priority Critical patent/JPS5856582A/en
Publication of JPS5856582A publication Critical patent/JPS5856582A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To prevent the generation of shading, by connecting one end of a current control element which is conducted when no horizontal transfer pulse exists to a power supply terminal of a current amplifying section supplying a drive pulse to a solid-state image pickup element and grounding the other end. CONSTITUTION:A driving pulse is inputted to an input terminal 12 and applied to an image pickup element such as CCD from an output terminal 13 after being current-amplified at a current amplification IC 11. A voltage from a power supply voltage line 14 is adjusted to a pulse voltage driven at the optimum state with a transistor (TR) 16 for current supply and a variable resistor 15, and applied to a power supply terminal 17 of the IC 11. A collector of a TR 22 for current uniforming is connected to the terminal 17 via a resistor 23 and the emitter is grounded. A pulse which is outputted only when no horizontal transfer pulse exists is applied to the base 24 of the TR 22. Thus, when flowing current to the IC 11 is decreased, a current from the TR 16 flows to ground via the resistor 23 to make the emitter current constant, allowing to prevent shading.

Description

【発明の詳細な説明】 本発明は、−次元もしくは二次元の固体撮像装置の駆動
回路に関するもので、特にンエーデイングの発生を防止
した固体撮像装置の駆動回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a driving circuit for a -dimensional or two-dimensional solid-state imaging device, and particularly to a driving circuit for a solid-state imaging device that prevents aging.

従来、固体撮像装置においては、撮像素子に駆動・ぐル
スを印加している時と、印加していない時の、駆動回路
電流差による駆動回路の電圧変動波形が重畳もしくは変
調された形で映像出力に現われる現象、すなわちソニー
ディングが発生しやすかった。
Conventionally, solid-state imaging devices produce images in the form of superimposed or modulated voltage fluctuation waveforms of the drive circuit caused by the difference in drive circuit current between when a drive signal is applied to the image sensor and when it is not. A phenomenon that appears in the output, that is, soning, was likely to occur.

次に、このソニーディングについて、二次元のインター
ライン型撮像素子を例に採って具体的に説明する。第1
図は、二次元のインターライン型撮像素子の原理を示す
模式図である。このインターライン型撮像素子は、基本
的には光の情報を電気信号に変換し、その電荷を蓄積し
ておく受光部と、この電荷を転送および読み出しを行な
う部分とから構成されている。図において、1は、マト
リックス状に配置された受光素子で、この受光素子1に
蓄積された電荷は垂直グラ/キング期間に転送ケ゛−ト
電極2を制御して、電荷結合素子(以下、CODと言う
)で構成された垂直転送部3に転送され、さらに水平ブ
ランキング毎にCCDで構成された水平転送部4に転送
される。水平転送部4に転送された電荷は、水平期間に
全部、左端の出力部5まで転送され、映像信号として出
力される。
Next, this soning will be specifically explained using a two-dimensional interline type image sensor as an example. 1st
The figure is a schematic diagram showing the principle of a two-dimensional interline type image sensor. This interline type image sensor basically consists of a light receiving section that converts optical information into an electrical signal and stores the electrical charge, and a section that transfers and reads out the electrical charge. In the figure, reference numeral 1 denotes a light receiving element arranged in a matrix. Charges accumulated in the light receiving element 1 are transferred to a charge coupled device (hereinafter referred to as COD) by controlling a transfer gate electrode 2 during a vertical graphing period. The signal is transferred to a vertical transfer unit 3 consisting of a CCD, and further transferred to a horizontal transfer unit 4 consisting of a CCD for each horizontal blanking. All of the charges transferred to the horizontal transfer section 4 are transferred to the leftmost output section 5 during the horizontal period and output as a video signal.

ここで、上記CCDが2相駆動であるとすると、これら
CODは、第2図に示された各パルス信号で駆動される
。第2図において、6は垂直ブランキノグパルス、7は
、垂直ブランキング期間中に転送ケ゛−トに加えられる
・ぐルスであり、8は、垂直転送用のCCD 3に加え
る・やルスであって、その周期ば1水平走査周期である
。9は、水平転送・Pルス、10は出力部5に加えるカ
セット・ぐルスである。
Here, assuming that the CCD is driven in two phases, these CODs are driven by each pulse signal shown in FIG. In FIG. 2, 6 is a vertical blanking pulse, 7 is a signal applied to the transfer case during the vertical blanking period, and 8 is a signal applied to the CCD 3 for vertical transfer. The period is one horizontal scanning period. Reference numeral 9 denotes a horizontal transfer/Prus, and 10 a cassette/Grus to be added to the output section 5.

第3図は、パルス駆動回路であって、駆動・Qルスは、
図示されない・9ルス発生回路からの・ぐルスを、電流
増幅用■C11の入力端子12に入力して、このICI
 1で電流増幅した後、出力端子13から撮像素子に印
加される。図において、電源電圧ライン14からの電圧
は、可変抵抗15、および電流供給用のトランゾスタ1
6によって、撮像素子を最適状態で駆動できる・Pルス
電王となるように、その電圧を調整した後、電流増幅用
ICIIの電源端子17に印加されている。なお、18
は交流成分・9イ・やス用の電源・ぞスコンである。
FIG. 3 shows a pulse drive circuit, and the drive/Q pulse is as follows:
A signal from a signal generating circuit (not shown) is input to the input terminal 12 of the current amplifying circuit C11, and this ICI
After the current is amplified in step 1, it is applied to the image sensor from the output terminal 13. In the figure, the voltage from the power supply voltage line 14 is applied to a variable resistor 15 and a transistor 1 for supplying current.
6, the voltage is adjusted so that the image sensor can be driven in an optimal state.The voltage is applied to the power supply terminal 17 of the current amplifying ICII. In addition, 18
is a power supply/zoscon for AC components/9I/Yasu.

この駆動回路から出力された・にルスは、撮像素子に印
加されるが、撮像素子がCCD等のいわゆる容量性負荷
なため、・Pルスが印加されるとfc’v・C(ただし
、foはクロック周波数、■はパルス電圧、Cは負荷容
量である)に比例した電流が流れる。このため、それぞ
(の駆動・ぐルスの電圧負荷容量および周波数とを考慮
すると、最も周波数が高い水平転送・ぐルス、リセッ)
 zeルス(通常、他の・やルスの500倍以上)の回
路電流が犬きく、さらに大きい負荷容量が大きい水平転
送・ぞルスは最も回路電流が多くなる。そして、水平ブ
ランキング期間に信号電荷を垂直転送部3から水平転送
部4へ電荷を転送するために、水平転送・Pルスには・
ぐルスの休止期間が設けられている。このため、l水平
周期で駆動電流の不均一が生じる。第4図に、水平ブラ
ンキングパルス19に対する垂直転送・Pシス8、水平
転送・ぞルス9(2相の内の一方のみを示す)と、電流
増幅用ICI 1へ電源端子17から流れ込む電流波形
20との位相関係を示す。この電流増1唱用ICIIに
流入する電流の変化(第4図の電流波形20)による電
源端子17の電圧変動を抑えるためには、電源・ぐスコ
ン18の容量を適めで大きくするか、もしくはトランゾ
スタ16の出力抵抗を極めて小さくしない限り、その変
動分を小さくすることができない。そして、この電源端
子17の電圧変動は、水平転送・ぞルス、さらには映像
出力信号にも影響を与える。第4図において、21は、
撮像素子への入射光を遮断したときにおける映像出力を
示す波形図であって、本来、入射光との関連においては
水平でなければならないものが、上述の電源端子17の
電圧変動によって平坦な出力波形とはならず、シェーデ
ィングを起している。
The -N pulse output from this drive circuit is applied to the image sensor, but since the image sensor is a so-called capacitive load such as a CCD, when the -P pulse is applied, fc'v C (however, fo is the clock frequency, ■ is the pulse voltage, and C is the load capacitance). For this reason, considering the voltage load capacity and frequency of each (drive/reset), the horizontal transfer/reset with the highest frequency
The circuit current of ZELS (usually more than 500 times that of other ZELS) is the highest, and the horizontal transfer ZELS with a larger load capacity has the highest circuit current. In order to transfer the signal charge from the vertical transfer section 3 to the horizontal transfer section 4 during the horizontal blanking period, the horizontal transfer/P pulse is
There is a break period for Gurus. Therefore, non-uniformity of drive current occurs in l horizontal periods. FIG. 4 shows the vertical transfer Psis 8, horizontal transfer Zolsu 9 (only one of the two phases is shown) for the horizontal blanking pulse 19, and the current waveform flowing from the power supply terminal 17 to the current amplification ICI 1. The phase relationship with 20 is shown. In order to suppress the voltage fluctuation of the power supply terminal 17 due to the change in the current flowing into the current increaser ICII (current waveform 20 in Fig. 4), the capacity of the power supply/guscon 18 should be increased appropriately, or The variation cannot be reduced unless the output resistance of the transoster 16 is made extremely small. This voltage fluctuation at the power supply terminal 17 affects the horizontal transfer signal and further affects the video output signal. In FIG. 4, 21 is
This is a waveform diagram showing the video output when the incident light to the image sensor is blocked, and the output should originally be horizontal in relation to the incident light, but due to the voltage fluctuation of the power supply terminal 17 mentioned above, the output is flat. There is no waveform and shading occurs.

このシェーディング現象は、上述のインターライン型だ
けに限られることなく、フレームトランスファ型やMO
S型等の撮像素子でも、その動作原理上、周波数が高く
回路駆動電流の多い水平転送・Pルスを不連続で使用せ
ねばならないものには生じる現象である。
This shading phenomenon is not limited to the above-mentioned interline type, but also frame transfer type and MO
This phenomenon occurs even in image pickup devices such as S type, which have to discontinuously use horizontal transfer and P pulses, which have a high frequency and a large circuit drive current, due to their operating principle.

本発明の目的は、上述したようなシェーディングを防止
するため、1駆動電流の不均一性を能動的に均一化して
、水・P−転送・Pルス回路の電源電圧に変動が生じな
いようにした固体撮像装置の駆動回路を提供することで
ある。
The purpose of the present invention is to actively equalize the non-uniformity of the drive current in order to prevent the above-mentioned shading, and to prevent fluctuations in the power supply voltage of the water/P-transfer/P-rus circuit. An object of the present invention is to provide a driving circuit for a solid-state imaging device.

次に、本発明に係る駆動回路を実施例に基づいて説明す
る。第5図は、本発明の一実施例を示す回路図であって
、図中、第3図と同一機能を有する要素には同一の参照
番号を付し、その詳細な説明は省略する。22は、新し
く追加された電流均一化用のトランジスタであって、そ
のコレクタは抵抗23を介して電流増幅用ICIIの電
源端子17に接続され、またエミッタは接地されている
Next, a drive circuit according to the present invention will be explained based on an example. FIG. 5 is a circuit diagram showing an embodiment of the present invention, in which elements having the same functions as those in FIG. 3 are given the same reference numerals, and detailed explanation thereof will be omitted. Reference numeral 22 denotes a newly added current equalizing transistor, whose collector is connected to the power supply terminal 17 of the current amplifying ICII via a resistor 23, and whose emitter is grounded.

そして、トランゾスタ22のベース24には、第6図に
おける水平転送・にルス9が存在しない期間だけ出力さ
れる。パルス25が印加される。このため、電流増幅用
ICI lへの流入電流26が減少したときには、トラ
ンゾスタ16からの電流が抵抗23を介してアースに流
される。このとき抵抗23の大きさを適当な値とするこ
とにより、第6図の26の実線で示されるようにトラン
ジスタ16を流れるエミッタ電流が一定となる(なお、
破線は、トランジスタ22が追加されていない従来例の
場合である)。
Then, the signal is output to the base 24 of the transoster 22 only during the period when the pulse 9 does not exist in the horizontal transfer shown in FIG. Pulse 25 is applied. Therefore, when the inflow current 26 to the current amplifying ICI I decreases, the current from the transistor 16 is caused to flow through the resistor 23 to the ground. At this time, by setting the resistor 23 to an appropriate value, the emitter current flowing through the transistor 16 becomes constant as shown by the solid line 26 in FIG.
The broken line is the case of the conventional example in which the transistor 22 is not added).

これにより、水平転送・ぐルスの微小電子変動も防止さ
れ、映像出力信号27も従来の破線で示されたものから
、実線で示されたものに改善され、シェーゾングが防止
される。なお、この実施例においては、インターライン
型の撮像素子を例に採って説明したが、他の周波数の高
い・幻レスを不連続的に使用している固体撮像素子に対
しても同様に適用し得ることは明らかである。
As a result, minute electronic fluctuations in horizontal transfer and signals are also prevented, and the video output signal 27 is improved from the conventional one shown by the broken line to the one shown by the solid line, and shading is prevented. Although this embodiment has been explained using an interline type image sensor as an example, the same applies to other solid-state image sensors that discontinuously use high-frequency phantom response. It is clear that it can be done.

以−ヒ、説明したように、駆動・リレスミ流増幅部の電
源端子にトランジスタを追加して、電流増幅部の電源端
子電圧の変動を防止したので、シェーディングが極力防
止されると共に、電源・ぐスコンの容量も小さくでき、
撮像装置のサイズを小さくできるという効果もある。
As explained earlier, a transistor is added to the power supply terminal of the drive/resistance current amplifier section to prevent fluctuations in the power supply terminal voltage of the current amplifier section, so shading is prevented as much as possible, and the power supply/region The capacity of the scone can also be reduced,
Another effect is that the size of the imaging device can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、インターライン型撮像素子の構造を示すだめ
の模式図、第2図は、インターライン型撮像素子の各部
の波形図、第3図は、従来の固体撮像装置の駆動回路を
示すブロック図、第4図は、電流増1扁用ICの電流と
映像出力との関係を示す波形図、第5図は、本発明の固
体撮像装置の駆動回路の一実施例を示すブロック図、第
6図は、第5図に示された駆動回路の電流増幅用ICの
電流と映像出力との関係を示す波形図である。 11・・・電流増幅用IC112・・・入力端子、13
・・・出力端子、14・・電源ライン、15・・・可変
抵抗、16 ・電流供給用トラン2スタ、17・・電源
端子、18・・・・Pスコ/、19・・・水平プランキ
ングツξルス、20・・電流増幅用ic流入電流波形、
21・・・撮像素子出力波形、22・・トランジスタ、
23・・・抵抗、25・・トラノノスタ22のベースに
印加されるノ9ルス波形、26・・・電流増幅用IC流
入電流波形、27・・・撮像素子出力波形。
Fig. 1 is a schematic diagram showing the structure of an interline image sensor, Fig. 2 is a waveform diagram of each part of the interline image sensor, and Fig. 3 is a drive circuit of a conventional solid-state image sensor. A block diagram, FIG. 4 is a waveform diagram showing the relationship between the current of the current increasing IC and the video output, and FIG. 5 is a block diagram showing an embodiment of the drive circuit of the solid-state imaging device of the present invention. FIG. 6 is a waveform diagram showing the relationship between the current of the current amplifying IC of the drive circuit shown in FIG. 5 and the video output. 11... Current amplification IC112... Input terminal, 13
...Output terminal, 14...Power line, 15...Variable resistor, 16 - Current supply transformer 2-star, 17...Power terminal, 18...PSco/, 19...Horizontal planking ξ Tsurus, 20... IC inflow current waveform for current amplification,
21...Image sensor output waveform, 22...Transistor,
23...Resistor, 25...Nollus waveform applied to the base of the Toranostar 22, 26...Inflow current waveform of the current amplification IC, 27...Image sensor output waveform.

Claims (2)

【特許請求の範囲】[Claims] (1)固体撮像素子への駆動・ぞルスを供給する電流増
幅部の電源端子に、水平転送パルスが存在しないときに
導通される電流制御素子の一端を接続し、他端を接地し
たことを特徴とする固体撮像装置の駆動回路。
(1) Make sure that one end of the current control element, which is turned on when no horizontal transfer pulse is present, is connected to the power supply terminal of the current amplification unit that supplies the drive signal to the solid-state image sensor, and the other end is grounded. Features a drive circuit for solid-state imaging devices.
(2)該駆動・やルスの電流増幅部の電源端子にノ9ス
コンが接続゛されていることを特徴とする特許請求の範
囲の第(1)項に記載された固体撮像装置の駆動回路。
(2) A driving circuit for a solid-state imaging device according to claim (1), characterized in that a current amplifier is connected to a power terminal of the current amplifying section of the driving circuit. .
JP56153770A 1981-09-30 1981-09-30 Driving circuit for solid-state image pickup device Pending JPS5856582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56153770A JPS5856582A (en) 1981-09-30 1981-09-30 Driving circuit for solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56153770A JPS5856582A (en) 1981-09-30 1981-09-30 Driving circuit for solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS5856582A true JPS5856582A (en) 1983-04-04

Family

ID=15569752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56153770A Pending JPS5856582A (en) 1981-09-30 1981-09-30 Driving circuit for solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS5856582A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0570694A (en) * 1991-09-10 1993-03-23 Shin Etsu Chem Co Ltd Curable silicone composition

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0570694A (en) * 1991-09-10 1993-03-23 Shin Etsu Chem Co Ltd Curable silicone composition

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