JPS5856494A - Method of forming art work film - Google Patents

Method of forming art work film

Info

Publication number
JPS5856494A
JPS5856494A JP56154966A JP15496681A JPS5856494A JP S5856494 A JPS5856494 A JP S5856494A JP 56154966 A JP56154966 A JP 56154966A JP 15496681 A JP15496681 A JP 15496681A JP S5856494 A JPS5856494 A JP S5856494A
Authority
JP
Japan
Prior art keywords
film
holes
hole
surface layer
artwork
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56154966A
Other languages
Japanese (ja)
Inventor
川俣 晴男
宮川 清隆
三ツ井 久三
憲二 山本
邦彦 武田
井村 孝義
黒沢 啓治
光男 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56154966A priority Critical patent/JPS5856494A/en
Publication of JPS5856494A publication Critical patent/JPS5856494A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はアートワークフィルムの形成方法に関し、特に
表面層回路パターン焼成のアートワーク原版と被加ニブ
リント基板のスルーホール部との位置ずれによるランド
リングの変形をなくすことを意因するアートワークフィ
ルムの形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an artwork film, and in particular, to eliminate deformation of landing caused by misalignment between an artwork original plate for baking a surface layer circuit pattern and a through-hole portion of a printed board to be applied. This invention relates to a method of forming an artwork film.

ユニット回路実装等なす多層プリント基板は、近時、個
別部品あるいはLSI素子等を多数塔載することから、
基板内に配線する回路は高密度化しており、これにとも
ない回路導体中は細くなお又層間接続部をなすスルーホ
ール形式の基本的格子間隔いはゆるホール間ピッチも狭
小となる〇かかる状況下で、多層プリント基板の製造は
、例えば前記スルーホール形成用のドリル孔加工は高粉
塵の孔位置出しが必要とされ、尚又前記ドリル加工され
た対象基板(ガラス布基材エポキシ樹ダ 脂燐張積層基板等)に表面層回路パターン焼付をなすア
ートワーク原版との相対的位置合せ精度が厳しく要求さ
れる。
In recent years, multilayer printed circuit boards for mounting unit circuits, etc., are mounting a large number of individual components or LSI elements, etc.
As circuits wired within substrates become denser, circuit conductors become thinner, and the basic lattice spacing of through-holes that form interlayer connections, or the pitch between holes, becomes narrower.Under these circumstances, In the production of multilayer printed circuit boards, for example, drilling holes for forming through holes requires positioning of holes with high dust, and the drilled target board (glass cloth base material epoxy resin phosphorus) Strict relative positioning accuracy is required with respect to the artwork original plate on which the surface layer circuit pattern is printed onto the laminate board, etc.).

本発明は、前記相対的位置合せ8度が必要とされるプリ
ント基板製造にさいし、スルーホール位置におけるラン
ドリングの変形勢が生ずることのない回路パターンフィ
ルムの形成手段を提示するもので、従来のかかる回路パ
ターン焼成時の問題点を第1図によシ説明する。
The present invention provides a means for forming a circuit pattern film that does not generate deformation force of land ring at the through-hole position in the production of printed circuit boards that require the above-mentioned relative alignment of 8 degrees. Problems encountered during firing of such a circuit pattern will be explained with reference to FIG.

同図(a)において、1は加工対象のプリント基板、2
社該基板1に設けるスルーホール、3は加工基準孔であ
シ、これらは多段積層の中間層と表面層とを問わず基板
の第一加工段階にあけられ、次いで無電解銅めりき、更
に電解銅めっきして該ホール2の孔峨内壁面に対する表
裏面導体回路の接続処理をなす。然る後図示4あるいは
4′の回路導体パターンを生成する0該回路導体パター
ン4.4′等はスクリーン印刷技法と写真蝕刻技法を用
い、パターン焼付処理して生成するが、とのさい前記ス
ルーホール形成2と回路導体パターン41等の接続該当
部5との短絡部は、第1図(b)に拡大して示す様なラ
ンド面を形成せしめた導体回路部とし、接続の信頼性並
びに該ホールに挿入のリード線端子との半田付固定を確
実とする。
In the same figure (a), 1 is a printed circuit board to be processed, 2
The through-holes 3 provided in the substrate 1 are processing reference holes, which are drilled in the first processing step of the substrate, regardless of whether it is an intermediate layer or a surface layer of a multi-layer stack, and then electroless copper plating, and then The front and back conductor circuits are connected to the inner wall surface of the hole 2 by electrolytic copper plating. After that, the circuit conductor pattern 4 or 4' shown in the figure is generated.The circuit conductor pattern 4.4' etc. is generated by pattern printing using screen printing technique and photoetching technique. The short-circuit part between the hole formation 2 and the connection corresponding part 5 such as the circuit conductor pattern 41 is a conductive circuit part with a land surface formed as shown in an enlarged view in FIG. Ensures soldering and fixation with the lead wire terminal inserted into the hole.

しかしながら、前記表面層回路導体パターン4焼成用ア
ートワーク原版とホール孔加工のプリント基板との間で
相対的位置合せ基準孔3があるに抱らず、これが有効に
機能せず例えばドリルマシン加工精度やプリント基板自
体の変形等により、両者間に位置ずれを生′し基板内多
数設けるランド面5とスルーホール2とのセンタが一致
せず、拡大図下方に示すランドリング変形6を生じ、孔
位tn度の厳しいプリント基板の製造は困難となる0本
発明は前記の不都合を解消することにある。
However, there is no relative positioning reference hole 3 between the artwork original plate for firing the surface layer circuit conductor pattern 4 and the printed circuit board for hole drilling, and this does not function effectively, for example, to improve the accuracy of drilling machine processing. Due to deformation of the printed circuit board itself, etc., misalignment occurs between the two, and the centers of the many land surfaces 5 provided in the circuit board and the through holes 2 do not match, resulting in land ring deformation 6 shown at the bottom of the enlarged view, and the holes are distorted. The purpose of the present invention is to eliminate the above-mentioned disadvantages, which makes it difficult to manufacture printed circuit boards with a strict temperature of 100 nm.

このため本発明によればホール孔加ニブリント基板から
孔位置を転写したフィルムと表面層アートワーク原版と
からスルーホール部ランドパターンを補正した回路パタ
ーンフィルムを形成して表面層回路パターン焼成をなす
アートワークフィルムの形成方法である。
Therefore, according to the present invention, a circuit pattern film with a through-hole land pattern corrected is formed from a film in which hole positions are transferred from a hole-perforated printed board and a surface layer artwork original plate, and a surface layer circuit pattern is fired. This is a method of forming a workpiece film.

以下、本発明の実施例を示す第2図乃至第3図に従かい
これを説明する。
This will be explained below with reference to FIGS. 2 and 3 showing embodiments of the present invention.

第2図において、7はドリル加工された加工対象基板、
8は前記基板7と一緒に孔あけし孔位置転写の基準孔を
作成するフィルムであって、該フィルム8は黒色(光不
透過性)のプラスチックシートからなる。即ち、図の上
方はプリント基板70ホール孔2の位置を転写した本発
明回路パターンフィルム形成の初期段階フィルムである
0また図中において3は基板積層時、相対的位置決めの
基準となる製造に係わる基準孔である。
In FIG. 2, 7 is a drilled substrate to be processed;
Reference numeral 8 denotes a film for creating reference holes for punching and hole position transfer together with the substrate 7, and the film 8 is made of a black (light-opaque) plastic sheet. That is, the upper part of the figure is the initial stage film of forming the circuit pattern film of the present invention, which is a printed circuit board 70 where the positions of holes 2 are transferred. This is a reference hole.

本発明によれば次いでフィルム8を再びドリルマシ/に
てランド径相当の孔12即ち、第1図のランド面5に該
当する孔あけ加工をなしフィルム9を形成する。孔12
の径はスルーホール2径に応じて、別に標準化された表
面層ランド径指定に章樟腔よる。
According to the present invention, the film 8 is then again drilled with a drill machining machine to form a hole 12 corresponding to the land diameter, that is, a hole corresponding to the land surface 5 in FIG. 1, to form the film 9. Hole 12
The diameter of the through-hole 2 is determined by the separately standardized surface layer land diameter designation.

次いで該孔あけ加工されたフィルム9をもとにして光透
過性白黒逆版フィルム10を形成する。
Next, a light-transmitting black-and-white inverse film 10 is formed based on the perforated film 9.

これによシ加工対象基板7のスルーホール2を忠実に位
置付けせしめたフィルム10が得られたことになる。本
発明はかかるフィルム10と表面層アートワーク原版(
フィルム)11とを重ね合せて焼付けし、表面層アート
ワーク原版のランド部パターンの位置ずれを補正した回
路パターンとするところに要点がある。
As a result, a film 10 was obtained in which the through holes 2 of the substrate 7 to be processed were accurately positioned. The present invention includes such a film 10 and a surface layer artwork original (
The key point is to overlay and print the film 11 to form a circuit pattern that corrects the positional shift of the land pattern of the surface layer artwork original.

^11記説明において、孔位置転写の基準孔が形成され
たフィルム8の作成において、加工対象基板は孔あけ加
工時を対象としたが、これは適宜層敷積鳩した基板から
でも孔位置転写のフィルム10を作成し、これから表面
層アートワーク原版のランド部パターンの位置ずれを補
正した回路パターンを取得することも出来る。
^ In the explanation in Section 11, in creating the film 8 in which reference holes for hole position transfer are formed, the substrate to be processed is used for drilling, but this also means that hole position transfer can be performed even from a substrate laminated with appropriate layers. It is also possible to create a film 10 and obtain a circuit pattern from which the positional deviation of the land pattern of the surface layer artwork original is corrected.

かかる補正ずみ回路パターンを用いて表面層回路パター
ンを焼成すればランドリングの変形は皆無となる。
If the surface layer circuit pattern is fired using such a corrected circuit pattern, there will be no deformation of the randling.

第3図は本発明の他の集T+Ii例を示す図である。FIG. 3 is a diagram showing another example of collection T+Ii of the present invention.

かかる実施例にあっては、表面層回路パターン焼成時、
アートワーク原版の加工基板との相対的位置合せ基準孔
が特に有効に機能しない従来の欠点を改善するため、か
つ前記ランド部位−゛ずれによるランドリングが変形を
最小限に抑えるため、取付基準孔を設ける。
In such an embodiment, when baking the surface layer circuit pattern,
In order to improve the conventional drawback that the reference hole for relative positioning of the artwork original plate to the processing board does not function particularly effectively, and to minimize the deformation caused by the land ring due to the land position misalignment, the mounting reference hole is will be established.

即ち、プリント基板基準孔3が伸縮してアートワーク原
版11が基板7と密着しないため、基準孔3とは別個の
取付基準孔例えば13を設ける。
That is, since the printed circuit board reference hole 3 expands and contracts and the artwork original 11 does not come into close contact with the board 7, a mounting reference hole, for example 13, separate from the reference hole 3 is provided.

かかる取付基準孔13はプリント基板7の孔加工時、表
面層アートワーク原版11の周縁、中央側辺部に複数孔
あけしておく。か様にすれば、表面層アートワーク原版
とスルーホール(スルーホールは図示されない)とが最
屯合うところを選び取付ピンによシ基板7と前記原版1
1とを固定すればランドリングの変形(第1図参照)を
最小にすることが田来る。
When forming holes in the printed circuit board 7, a plurality of such mounting reference holes 13 are drilled at the periphery and central side of the surface layer artwork original 11. In this case, select the place where the surface layer artwork original plate and the through hole (the through hole is not shown) are closest to each other, and attach the mounting pin to the substrate 7 and the original plate 1.
1 is fixed, the deformation of the land ring (see Figure 1) can be minimized.

前1己実施例で説明した本発明のアートワークフィルム
形成方法によれば近時製鎖される高精度表面層回路パタ
ーンの焼成が極めて容易に施行される利点がある。
The method for forming an artwork film of the present invention as explained in the first embodiment has the advantage that high-precision surface layer circuit patterns, which are recently produced, can be fired very easily.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の回路パターン焼成時の状態を示す平面図
、8142図及び第3図は本発明の実施例を示す斜視図
及び平面図である。 図中、2はスルーホール、3は基準孔、6はランド面5
の変形(ランドリング変形)部、1と7は加工対象プリ
ント基板、8と9と10は孔2位置転写の本発明に係る
フィルム、11は表面層アートワーク原版及び13は取
付基準孔である。 見1図 蔦2図 ′5 図 第1頁の続き 0発 明 者 黒沢啓治 川崎市中原区上小田中1015番地 富士通株式会社内 0発 明 者 山下光男 川崎市中原区上小田中1015番地 富士通株式会社内
FIG. 1 is a plan view showing a state during firing of a conventional circuit pattern, and FIG. 8142 and FIG. 3 are a perspective view and a plan view showing an embodiment of the present invention. In the figure, 2 is a through hole, 3 is a reference hole, and 6 is a land surface 5.
deformation (landing deformation) part, 1 and 7 are printed circuit boards to be processed, 8, 9 and 10 are films according to the present invention with hole 2 position transfer, 11 is a surface layer artwork original, and 13 is a mounting reference hole. . Figure 1 Ivy 2 Figure '5 Continuation of figure 1 Page 0 Author: Keiji Kurosawa Inside Fujitsu Limited, 1015 Kamiodanaka, Nakahara-ku, Kawasaki City 0 Author: Mitsuo Yamashita Inside Fujitsu Limited, 1015 Kamiodanaka, Nakahara-ku, Kawasaki City

Claims (2)

【特許請求の範囲】[Claims] (1)  1面層アートワーク原版と、スルーホール並
びに基準孔を加工せるプリント基板と、を重ねて前記基
板上に表面層回路パターンを焼成するに当り、前記被加
ニブリント基板側から孔位置を転写したフィルムと表面
層アートワーク原版とからスルーホール部ランドパター
ンを補正した回路ノ(ターンフィルムを形成して表面層
回路)くターンを形成することを4!−微とするアート
ワークフィルムの形成方法。
(1) When stacking the one-layer artwork original and the printed circuit board on which through-holes and reference holes are to be processed and firing the surface-layer circuit pattern on the substrate, the hole positions are determined from the side of the printed substrate to be applied. Step 4: Form a circuit (surface layer circuit by forming a turn film) by correcting the through-hole land pattern from the transferred film and the surface layer artwork original. - A method of forming a microscopic artwork film.
(2)前記スルーホール並びに基準孔をプリント基板に
加工するドリル孔明は時、表面層アートワーク原版の周
縁に枚数の孔あけをして表面層回路パターン形成時の取
付基準孔とすることを特徴とする特許請求の範囲第1項
記載のアートワークフィルムの形成方法。
(2) When drilling the through-holes and reference holes in the printed circuit board, a number of holes are drilled around the periphery of the surface layer artwork original plate to serve as mounting reference holes when forming the surface layer circuit pattern. A method for forming an artwork film according to claim 1.
JP56154966A 1981-09-30 1981-09-30 Method of forming art work film Pending JPS5856494A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56154966A JPS5856494A (en) 1981-09-30 1981-09-30 Method of forming art work film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56154966A JPS5856494A (en) 1981-09-30 1981-09-30 Method of forming art work film

Publications (1)

Publication Number Publication Date
JPS5856494A true JPS5856494A (en) 1983-04-04

Family

ID=15595786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56154966A Pending JPS5856494A (en) 1981-09-30 1981-09-30 Method of forming art work film

Country Status (1)

Country Link
JP (1) JPS5856494A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01143169U (en) * 1988-03-25 1989-10-02

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01143169U (en) * 1988-03-25 1989-10-02

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