JPS5856465A - Charge transfer device - Google Patents

Abstract

PURPOSE:To improve the charge detecting sensitivity without causing the reduction of the maximum drive frequency by opposing one output gate electrode of two series charge transfer elements and the other output gate electrode. CONSTITUTION:In a charge transfer unit having two charge transfer regions 16, 16', the output gates are opposed to source regions 11'', thereby enabling to reduce the area of the source region 11''. With this system, the capacity of a diffused layer can be reduced without reducing the maximum drive frequency, and the sensitivity of the charge detector can be increased. This can be applied to a CCD in which part or entirety of the detector is a forced channel or further to a BBD, and the charge detecting system is not limited only to an FDA method, but a current outputting method may be employed. The semiconductor substrate is not limited only to P type, but when the polarity of the conductive type is reversely set and the polarity of the voltage is reversed, an N type semiconductor substrate may be employed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charge transfer device such as a charge coupled device (hereinafter referred to as COD) or a packet bridge gate device (hereinafter referred to as BBD), and particularly relates to a charge transfer device such as a charge coupled device (hereinafter referred to as COD) or a packet bridge gate device (hereinafter referred to as BBD). The present invention relates to a charge transfer device that can be used as a charge transfer device.

Conventionally, one of the charge detection methods in COD is FDA (F
floating Diffusion Amplifier
er) There is a law.

FIGS. 1(a) and 1(b) are a plan view and a cross-sectional view along line A- for explaining an example of a conventional charge transfer device.

To simplify the explanation, the charge device is assumed to be a surface channel COD, the semiconductor substrate is of P type, and the transferred charges, that is, carriers, are electrons. In Figures 1(a) and (b), l is P. type semiconductor substrate.

2 to 5 and 7 to 10 are electrodes made of metal such as aluminum wire %6 is an output gate electrode, 11.13 is a Δ type head area, 12
is a gate electrode, where N-type regions 11 and 13 are source and drain regions, and 12 is a gate electrode.
O8) The transistor Tr1 is configured.

The source region 11 is a charge detection region for detecting the transferred charges) and is normally a diffusion layer.
) A charge detection device is constituted by the transistor Trs and the output gate electrode.N16 and 16' are charge transfer regions, and 17 is an insulating film.

FIG. 2 is a time chart for explaining the operation of the charge transfer device shown in FIGS. 1(a) and (b).
, the processed MOS transistor Tr1 is made conductive by applying a "high" level to DaR, and the source potential Vat of Trs is set to T.
Set to the same potential as the drain potential vDD of rl. Time 4
Then, OR is set to a "low" level, and the source region 11 is in a floating state. After this state, at time t, the voltage is set to a "low" level, and the carriers accumulated under the electrode 5 are transferred to the source region 11 through the channel under the output gate electrode 6 to which a constant voltage Voo is applied. Let it flow. Potential change Δ of the source region 11 due to this inflow carrier
V81 is defined as Q, the amount of charge of inflowing carriers, and the parasitic capacitance of the source region 110 to the substrate 1.
If the stray capacitance caused by the wiring, gate, etc. connected to 1 is reduced, then This potential change is applied to the gate of the MOS transistor 14 of the source follower circuit, which includes the MOS transistor 14 and a resistor.

The output signal is taken out from the Vovt terminal 15). Here, if the voltage gain of this source 7 subordinate circuit is G, then the net signal output ΔVOut is obtained.

In order to increase the sensitivity of this charge detection device,
That is, in order to obtain a larger signal output for a certain amount of inflow charge Q, c, +c.

It can be seen that it is best to make G smaller and G larger.

However, G cannot be increased by more than 1 due to the characteristics of the source 7 subordinate circuit. Therefore %CI-)-C.

efforts are being made to make it smaller.

FIG. 3 is a plan view of another example of the conventional charge detection device.

This can be achieved by reducing the area of the source region 11' to reduce the density, thereby reducing the value of C, +C.

However, in this example, the carriers accumulated under the electrode 5 or the electrode 7 pass through the channel under the output gate electrode 6 to which a constant voltage Voa is applied to the source region. When flowing into 11',
The rice carriers flowing into the shaded area B in the figure must pass through a long channel under the electrode 6 toward the source region 11'.

Therefore, the time required for all the carriers accumulated under the electrode 5 or the electrode 7 to flow into the source region 11' is
In other words, it takes a long time to complete the potential change of the source region 1f due to the signal charge. This increase in time has the disadvantage of reducing the maximum driving frequency of the charge detection device.

The present invention eliminates the above drawbacks and provides a charge transfer device that improves charge detection sensitivity without reducing the maximum drive frequency.

The charge transfer device of the present invention includes a 92-series charge transfer element provided on the surface of a semiconductor substrate via an insulating film, an output gate electrode provided via the insulating film, and a portion immediately below the output gate electrode. a charge detection device including two regions that are adjacent to each other and have a conductivity type opposite to that of the semiconductor substrate, and a gate electrode that extends between the two regions with an insulating film interposed therebetween;
In the charge transfer device of a type in which the outputs of the two rows of charge transfer elements are taken out alternately, the charge transfer device is configured by facing one output gate electrode of the two rows of charge transfer elements and the other output gate electrode. Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 4 is a plan view of one embodiment of the present invention.

In a charge transfer device having two charge transfer regions 16 and 16', each output gate is formed to face the source region 11'', thereby reducing the area of the source region 11''. I can do it. If this method is adopted, the capacitance of the diffusion layer can be reduced without causing a reduction in the maximum driving frequency as explained using FIG. 3, and the sensitivity of the charge detection device can be increased. I conducted this on the surface channel COD.
The invention is applicable to CODs and even BBDs where part or all of the device is a forced channel. The charge detection method is not limited to the PDA method; for example, the current output method (
Current 0outpnt method) may also be used. Further, the semiconductor substrate is not limited to the P type, but may be an N type semiconductor substrate by reversing the polarity of the conductivity type and reversing the sign of the potential.

As described in detail above, according to the present invention, a charge transfer device with improved charge detection sensitivity without reducing the maximum drive frequency can be obtained, and the effect is significant.

[Brief explanation of drawings]

1A and 1B are a plan view and a sectional view of an example of a conventional charge transfer device, and FIG. 2 is a time chart for explaining the operation of the charge transfer device shown in FIG. FIG. 3 is a plan view of another example of a conventional charge transfer device. FIG. 4 is a plan view of one embodiment of the present invention. 1.--P-type semiconductor substrate, 2.3.4.5, 7.8
．． 9゜10.3', 4', 5', 7', 8'
, 9'-one transfer electrode, 6...output gate electrode,
11.11', 11"---N-type source region%
12...Gate electrode, 13...H-shaped drain region, 14...MO8 transistor, 15...Output terminal, 16.16'...・・−
- Charge transfer region, 17...Insulating film. (Rita rshii 'shi 81 False 2 figure

Claims (1)

[Claims] two rows of charge transfer elements provided on the surface of a semiconductor substrate with an insulating film interposed therebetween; an output gate electrode provided with the insulating film interposed therebetween; and at least immediately below and adjacent to the output gate electrode and the semiconductor substrate. and a charge detection device including two regions of opposite conductivity type and a gate electrode extending between the two regions 9 with an insulating film interposed therebetween, and alternately extracting the outputs of the two rows of charge transfer elements. A charge transfer device, wherein one output gate electrode and the other output gate electrode of the two rows of charge transfer elements face each other.