JPS5854456A - Debugging control system for program to be debugged - Google Patents

Abstract

PURPOSE:To enable an operator to execute debugging control only by inserting a branch instruction instead of an instruction in a program to be debugged by dumping the status just before the execution of the instruction in every formation of the instruction to be executed. CONSTITUTION:Instead of an instruction A, a branch instruction X is inserted into a progam 1 stored in a main storage 7 through the debugging program (I)4. The program 1 is converted into a program 2 by said operation and a data processing unit 8 executes the program 2. After executing the branch instruction X, the program 2 is branched to a debugging probram (II)5. The temporary execution of said instruction A during the execution of the program (II) is performed by using the contents of a register in an operation processing part 12 or the like. Then the program 2 is executed again and branched to a program (III)6 by the execution of a branch instruction Y. After that the program 2 is executed again.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a debugging control method for a program to be debugged, and in particular to a derailleur control method for inserting a branch instruction X in place of any one instruction in the program to be debugged.
) When dumping the intermediate results of processing by the debugged program, the data processing device automatically executes the post-processing by inserting the branch instruction X. This relates to debugging programs and debugging control methods.

Conventionally, as shown in FIG. 1, intermediate results of processing by a program to be debugged have been dumped. That is, at the ninth point in time after the instruction person's immediately preceding processing in the illustrated program to be debugged IK is completed, the results of the processing up to that point by the program to be debugged IK are dumped. In this case, as in program 2 shown in the figure, a branch instruction Xt- is inserted instead of the sum of the instructions on program 1, and summation is performed to start program 2. When the branch instruction Return the branch maiden command X- to the original commandant, (1)
Store the contents of the address register as instruction A.

As a result, the immediately preceding command of the command person in program 1 can be executed and the resulting state can be dumped.

However, after the instruction A is executed, the 1-branch instruction X disappears from the program 2. For this reason, for example, if a loop exists in program 1 and the command immediately before the command is executed again, the dump cannot be performed.

Therefore, an operator performing debugging can (1) add, for example, the instruction BA4Il1, which is executed after the instruction in the program IK is executed, and (or)
Insert another branch instruction Y in place of the instruction BK, and (-) replace the instruction AQ with the branch instruction XK restored on the program 2 by the subprogram using the branch instruction YK.

(tv) Return branch instruction Y to original instruction B, (V) Instruction B
Care must be taken to restart Glogram 2 again.

Considering #IC, if the above instruction A itself is a conditional branch instruction, the above instruction Bt after the instruction (conditional branch) is executed on program 2 cannot be issued. It's difficult and trivial, not trivial.

The present invention aims to solve the above points,
The purpose of this invention is to enable the operator to simply issue an instruction to insert a branch instruction X in place of the instruction AK without being aware of the above-mentioned problem. And for that reason,
The lag program debugging control system of the present invention includes a storage device in which a program to be debugged is stored and a data processing device that successively reads the contents of the storage device and executes processing.・Insert a branch instruction In the lag processing method, the subroutine replaces the branch instruction X with the original instruction AK, and executes the instruction. A is tentatively executed, and based on the result of the tentative execution, the instruction person extracts the address of the instruction B that the debugged program will execute after the actual execution, and replaces the instruction B. It is configured to insert a branch instruction Y and set the contents of an address register for the storage device in order to execute an instruction A on the debugged program, and by executing the branch instruction Y, the debugged program is configured to branch to a second subroutine that replaces the above instruction with branch instruction X, returns the branch instruction Y to instruction B, and sets the contents of the address register to execute instruction B'i; The present invention is characterized in that by executing the branch instruction Xt, the intermediate results of processing by the program to be debugged are dumped every time the program passes through the instruction.

This will be explained below with reference to the drawings.

FIG. 2 is an explanatory diagram illustrating a control aspect of an embodiment according to the present invention, and FIG. 3 shows a configuration of an embodiment of the present invention.

In the JIIEZ diagram, 1 is the program to be debugged.

2 is a program in which a branch instruction X' is inserted in place of instruction AK, and 4 is a debug program (I) in which one branch instruction △Debug・1
0 grams (represents the present invention).In addition, in the 21st article.

The instruction person is shown as being a conditional branch instruction.

When the program being debugged (I[) branches to the program in question, (1) it first performs a dump process, (ken) returns the branch instruction (If the pause is not canceled, temporarily execute the process corresponding to the returned instruction AK,
(V) When it is determined that instruction B will be executed after executing instruction m based on the result of temporary execution, address AD=R is set in debug program (1), and (-instruction in program 2 Insert branch instruction Y instead of B,
(The contents of the v1 address register are configured to be the Q address.

The above "temporary execution" means simply reading the contents of registers, etc. on the data processing device, prohibiting rewriting, and trying to execute the process corresponding to instruction A by reading the contents of registers, etc. It corresponds to For this reason, the state immediately before the execution of the instruction At is not changed by the temporary execution of the instruction by the instruction person. However, by temporarily executing the process corresponding to the instruction A, the instruction B It can be determined whether instruction 0 or instruction 0 will be executed. Needless to say, due to the provisional execution of instruction A, instruction B is executed after the actual execution of instruction A.
If the instruction 0 is to be executed instead, the debug program (II) sets address D=8 for the debug program (■) and inserts a branch instruction Y in place of the OK instruction. Then, the contents of the address register are designated as address tS.

When the debug program () branches to the program, (1) replaces instruction A1 in program 2 with branch instruction is configured to be the R address.

When instructed to insert a branch instruction The instruction X't-insertion causes execution of the inserted program 2 to begin.

When branch instruction X is executed during the execution of program 2,
Branches to debug program (II).

The debug program (II) dumps the result of the execution of the instruction immediately before the branch instruction, returns it to the branch instruction
/c temporarily executes instruction A, and after actual execution by the person instructing K, for example, if instruction B is to be executed.

Address AD=R is set in debug program 1, branch instruction Y is inserted in place of instruction BK in program 2, the content of the address register is set to address Q, and execution of program 2 is returned to.

As a result, regarding the execution of program 2, the instruction is actually executed, and the program proceeds to execution of branch instruction Y.

When branch instruction Y is executed, the debug program (I
Therefore, by changing the instruction person in program 2 to branch instruction XK, changing the branch instruction Yt to instruction BK in program 2, and setting the content of the address register to address R, program 2
to return to execution.

As a result, instruction B is executed in connection with the execution of program 2. In program 2 at this time, the state is the same as that in which branch instruction It becomes. Accordingly, whenever program 2 forms a loop and branch instruction X is executed, a dump is performed each time. That is, the operator only needs to instruct that instruction A be replaced with branch instruction X.

FIG. 3 shows the configuration of an embodiment of the present invention.

Reference numbers 1, 2, 4, 5.6 in the figure correspond to those in Fig. 2, 1 is the main memory, 8 is the data processing device, 9 is the address register, 10 is the step circuit, and 11 is the instruction register. 1, in which instructions successively issued from the main memory 7 are set;
2 represents an arithmetic processing section.

For program 1 stored on main storage device '7,
Debug Proger A (I) 4 K Therefore, as described above, instruction A [branch instruction X is inserted instead]. Then, the program 1 is made into the program 2, and the data processing device 8
executes program 2. When the branch instruction X is executed as described above, the debug program (I) 5
It is branched into. During the execution of the debug program (1), the temporary execution of the instructions is performed using the contents of registers in the arithmetic processing unit 12.

Next, as described above, the program returns to execution of program 2, and debug program (1) 6K is executed by executing branch instruction Y.
Branched out. Then, the program returns to execution of program 2 again.

As described above, according to the present invention, each time the instruction A in the program to be debugged 1 is to be executed, the state immediately before the instruction is executed can be dumped.

In addition, the operator is only required to be aware of the point of view of debugging.

In the above description, it has been shown that only the instruction A is played, but it goes without saying that it is also possible to instruct the insertion of the branch instruction X for a plurality of instructions in the program 1.

[BRIEF DESCRIPTION OF THE DRAWINGS] Fig. 1 is an explanatory diagram illustrating a process corresponding to a conventional playl; Fig. 2 is an explanatory diagram illustrating a control aspect of an embodiment according to the present invention; The configuration of one embodiment is shown. 1 In the figure, l is a program to be debugged, 2 is a program in which instruction A is replaced with a branch instruction, 4, 5.6 are debug programs, respectively, 7 is a main memory, 8 is a data processing device, and 9 is an address.・Register, 11 is instruction register, 12
represents an arithmetic processing unit. Patent applicant Hiroshi Mori, agent patent attorney of Fujitsu Ltd.

Claims (1)

[Scope of Claims] A storage device in which a program to be debugged is stored, and a data processing device that reads the contents of the storage device and executes processing, and any one of the programs to be debugged is provided.
Insert a branch instruction In a depatch processing method in a data processing device, the above-mentioned subroutine is used. After executing predetermined processing including dump processing, the branch instruction Extracts the address of instruction B that will be executed by the debugged program after the instruction person executes it,
The branch instruction Yt- is inserted in place of the instruction B, and the content of the address register for the memory device rtK is set to execute the instruction A on the depacked program, and the branch instruction Y The second subroutine changes the instruction person on the debugged program to branch instruction X, returns the branch instruction Y to instruction B, and sets the contents of the address register to execute instruction B. The above branch instruction
A method for controlling debugging of a program to be debugged, characterized in that intermediate results of processing by the program to be debugged are dumped each time the program passes through the instruction person.