JPS5852358B2 - Manufacturing method for double-sided flat circuit board - Google Patents
Manufacturing method for double-sided flat circuit boardInfo
- Publication number
- JPS5852358B2 JPS5852358B2 JP5297379A JP5297379A JPS5852358B2 JP S5852358 B2 JPS5852358 B2 JP S5852358B2 JP 5297379 A JP5297379 A JP 5297379A JP 5297379 A JP5297379 A JP 5297379A JP S5852358 B2 JPS5852358 B2 JP S5852358B2
- Authority
- JP
- Japan
- Prior art keywords
- double
- sided
- circuit board
- manufacturing
- flat circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】 本発明は、両面平面回路板の製造法の改良に関する。[Detailed description of the invention] The present invention relates to an improved method for manufacturing double-sided planar circuit boards.
従来、各種電子機器の摺動部などに使用する両面平面回
路板は次のように製造している。Conventionally, double-sided flat circuit boards used for sliding parts of various electronic devices have been manufactured as follows.
すなわち、第1図に示すように、片面金属箔張積層板に
常法の印刷、エツチング、メッキなどを施して得た片面
回路板1,1′を使用し、該片面回路板1゜1′の回路
が表面になるように配置し所定枚数のプリプレグ2を介
在させて積層成形する。That is, as shown in FIG. 1, single-sided circuit boards 1 and 1' obtained by printing, etching, plating, etc. in a conventional manner on a single-sided metal foil-clad laminate are used, and the single-sided circuit boards 1°1' The circuit is placed on the surface, and a predetermined number of prepregs 2 are interposed and laminated and molded.
積層成形に際しては両面の回路の位置を合せる必要があ
るが、その手段として、予め位置合せをした片面回路板
1,1′およびプリプレグ2に穴3をあけ、該穴3に当
板lに垂設したガイドピン5を挿通し、更にガイドピン
5を当板4に設けたガイド穴6に挿通することを行なっ
ている。During lamination molding, it is necessary to align the circuits on both sides, and as a means to do so, holes 3 are drilled in the single-sided circuit boards 1 and 1' and the prepreg 2 that have been aligned in advance, and holes 3 are inserted into the holes 3 to hang down from the contact plate l. The provided guide pin 5 is inserted through the guide pin 5, and the guide pin 5 is further inserted into a guide hole 6 provided in the backing plate 4.
この積層成形により片面回路板1,1′およびプリプレ
グは一体となり、両面の回路が基板中に没入した両面平
面回路板となる。By this lamination molding, the single-sided circuit boards 1, 1' and the prepreg are integrated, forming a double-sided flat circuit board in which the circuits on both sides are immersed in the board.
しかし、上記従来方法は次の欠点がある。However, the above conventional method has the following drawbacks.
(1)片面金属箔張積層板2枚から製作するため、2枚
の積層板の間に特性の差があると一体化したとき反りな
どを発生し易い。(1) Since it is manufactured from two single-sided metal foil-clad laminates, if there is a difference in properties between the two laminates, warping is likely to occur when they are integrated.
そして、この特性の差は、たとえ同一品種の積層板であ
っても成形時には微妙な条件変動などがあり、避けるこ
とができない。This difference in properties cannot be avoided even if the laminates are of the same type because there are subtle variations in conditions during molding.
(2)2枚の片面金属箔張積層板は、一体化したときに
所定の厚さになるように板厚の薄いものが使用される。(2) The two single-sided metal foil-clad laminates are thin enough to have a predetermined thickness when integrated.
従って、反りが大きく、印刷、エツチングなどの工程の
自動化が困難であり、手作業による場合でも取扱いが煩
しく割れなどの不良が多発する。Therefore, warping is large, making it difficult to automate processes such as printing and etching, and even when done manually, handling is cumbersome and defects such as cracks occur frequently.
(3)2枚の片面回路板をプリプレグを介在させて一体
に積層成形するときには、両面の回路の位置ずれを防止
するために両面の回路の位置合せをした後回路板および
プリプレグに穴あけを要し、ガイドピンなど特別の治具
を必要とする。(3) When two single-sided circuit boards are laminated together with prepreg interposed, it is necessary to drill holes in the circuit board and prepreg after aligning the circuits on both sides to prevent the circuits on both sides from shifting. However, special jigs such as guide pins are required.
また、ガイドピンは積層成形時の圧力により変形し易く
両面の回路の位置ずれ生じる慎れがある。Further, the guide pin is easily deformed by the pressure during lamination molding, and there is a need to avoid misalignment of the circuits on both sides.
本発明は上記の点に鑑み、作業効率がよく、かつ不良の
発生を抑えて量産性に優れ、品質の良い両面平面回路板
を製造することを目的とする。In view of the above-mentioned points, an object of the present invention is to manufacture a double-sided flat circuit board of high quality with good work efficiency and excellent mass productivity by suppressing the occurrence of defects.
本発明を第2図により製造工程に従って説明する。The present invention will be explained according to the manufacturing process with reference to FIG.
(a)中間層に離型層7を介在させ、周辺部のみを一体
に接着した両面金属箔張積層板8を製作する。(a) A double-sided metal foil-clad laminate 8 is produced in which a release layer 7 is interposed as an intermediate layer and only the peripheral portions are bonded together.
9,9′は銅、真鍮、ニッケル、ニクロム、アルミニウ
ムなどの金属箔で、厚さは18〜70μが適している。9 and 9' are metal foils of copper, brass, nickel, nichrome, aluminum, etc., with a suitable thickness of 18 to 70 μm.
(b) 金属箔9.グを通常の印刷、エツチング処理
し、所定の回路10,1σを形成する。(b) Metal foil9. The etching is subjected to normal printing and etching processing to form a predetermined circuit 10,1σ.
回路10.1σには、必要に応じ対摩耗性の金属メッキ
、例えば、ニッケル下地ロジウムメッキなどを施す。If necessary, the circuit 10.1σ is coated with wear-resistant metal plating, such as rhodium plating on a nickel base.
印刷、エツチング工程は、形成する回路10,1σの位
置合せをして行なう必要がある。The printing and etching steps must be performed with the circuit 10 to be formed aligned 1σ.
(C)上記両面回路板の周辺接着部分のうち2辺あるい
は3辺を切断除去し、離形層7を取り出す。(C) Two or three sides of the peripheral adhesive portion of the double-sided circuit board are cut and removed, and the release layer 7 is taken out.
従って、両面回路板は、切断しなかった接着部分を残し
て剥離した状態となる。Therefore, the double-sided circuit board is in a peeled state, leaving the adhesive portion that was not cut.
(d) 剥離した部分に所定厚さになるようにプリプ
レグ2を挿入し、これを金属製当板に挾んで加熱加圧す
る。(d) Insert the prepreg 2 into the peeled part so that it has a predetermined thickness, sandwich it between metal backing plates, and heat and pressurize it.
条件は、温度150〜1800C1圧力40〜150
kg/ffl、加熱加圧時間30〜60分が適当である
。Conditions are temperature 150-1800C1 pressure 40-150
kg/ffl and heating and pressurizing time of 30 to 60 minutes are appropriate.
周辺部のうち、一部は接着した状態にあるので、この加
熱加圧工程で両面の回路10,1σが位置ずれを起こす
ことはない。Since a portion of the peripheral portion is in a bonded state, the circuits 10 and 1σ on both sides do not shift in position during this heating and pressurizing process.
(e) 上記加熱加圧により回路10.10’は基板
中に没入し両面平面回路板12となる。(e) The circuits 10 and 10' are immersed into the substrate by the heating and pressurization, forming a double-sided planar circuit board 12.
(d)の加熱加圧工程においては、周辺部のうち切断さ
れていない接着部分にはプリプレグ2を挿入できず、従
って、底形した両面平面回路板12はその部分が若干薄
くなる。In the heating and pressing step (d), the prepreg 2 cannot be inserted into the uncut bonded portion of the peripheral portion, and therefore, the bottom-shaped double-sided flat circuit board 12 becomes slightly thinner in that portion.
しかし、使用に際しては、薄い部分を切断除去すれば何
ら支障はない。However, when using it, there will be no problem if the thin part is cut and removed.
本発明は従来からある種々の熱硬化性樹脂積層板に適用
できる。The present invention can be applied to various conventional thermosetting resin laminates.
本発明は次の作用効果を有する。The present invention has the following effects.
(1)従来のように別個に製作した2枚の片面金属箔張
積層板からなるものでないので、特性の差に起因する反
りなどがなくなり、品質が安定する。(1) Since it is not made of two single-sided metal foil-clad laminates manufactured separately as in the past, there is no warping caused by differences in properties, and the quality is stable.
(2)印刷、エツチング処理は両面一度に行なえ、従来
の半分の工程で済む。(2) Printing and etching can be done on both sides at the same time, requiring only half the process compared to conventional methods.
また、従来の片面金属箔張積層板2枚に相当する板厚で
印刷、エツチング処理するので、反りが少なく取り扱い
易く、割れなどの不良も発生しない。In addition, since printing and etching are carried out to a thickness equivalent to two conventional single-sided metal foil-clad laminates, there is less warping and ease of handling, and defects such as cracks do not occur.
(3)回路の平面化のための加熱加圧工程において、両
面の回路の位置ずれを防止するための特別な作業、治具
を必要とせず、通常の積層成形で済むので能率的である
。(3) In the heating and pressing process for flattening the circuit, no special work or jig is required to prevent the circuits on both sides from shifting, and ordinary lamination molding can be used, which is efficient.
第1図は従来の両面平面回路板の成形状態を示す断面図
、第2図は本発明の製造工程を示す断面図である。
7は離型層、8は両面金属箔張積層板、9,9′は金属
箔、i o 、 i o’は回路、11.11’は金属
製当板、12は両面平面回路板。FIG. 1 is a sectional view showing the molding state of a conventional double-sided flat circuit board, and FIG. 2 is a sectional view showing the manufacturing process of the present invention. 7 is a release layer, 8 is a double-sided metal foil clad laminate, 9 and 9' are metal foils, io and io' are circuits, 11 and 11' are metal backing plates, and 12 is a double-sided flat circuit board.
Claims (1)
り小さい離型層を介在させ周辺部のみ一体に接着した両
面金属箔張積層板を得、該積層板の両面に常法の印刷、
エツチングにより所定の回路を形成する工程、前記積層
板の一体に接着された周辺部を少なくとも一部を残して
切除し離形層を除去する工程、離型層を除去した層間に
所定枚数のプリプレグを挿入しこれを金属製当板に挾ん
で加熱、加圧する工程からなる両面平面回路板の製造法
。1. Obtain a double-sided metal foil-clad laminate in which a release layer smaller than the prepreg is interposed in the middle of a plurality of laminated prepregs and only the peripheral portions are bonded together, and a conventional printing method is applied to both sides of the laminate.
a step of forming a predetermined circuit by etching, a step of removing the mold release layer by removing at least a portion of the integrally bonded peripheral portion of the laminate, and a predetermined number of prepreg sheets between the layers from which the mold release layer has been removed. A manufacturing method for double-sided flat circuit boards, which consists of the process of inserting the board, sandwiching it between metal plates, and heating and pressurizing it.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5297379A JPS5852358B2 (en) | 1979-04-27 | 1979-04-27 | Manufacturing method for double-sided flat circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5297379A JPS5852358B2 (en) | 1979-04-27 | 1979-04-27 | Manufacturing method for double-sided flat circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55145398A JPS55145398A (en) | 1980-11-12 |
JPS5852358B2 true JPS5852358B2 (en) | 1983-11-22 |
Family
ID=12929828
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5297379A Expired JPS5852358B2 (en) | 1979-04-27 | 1979-04-27 | Manufacturing method for double-sided flat circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5852358B2 (en) |
-
1979
- 1979-04-27 JP JP5297379A patent/JPS5852358B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS55145398A (en) | 1980-11-12 |
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