JPS5850765U

JPS5850765U - Vertical contour correction circuit

Info

Publication number: JPS5850765U
Application number: JP14046881U
Authority: JP
Inventors: 田山　春蔵
Original assignee: アルプス電気株式会社
Priority date: 1981-09-24
Filing date: 1981-09-24
Publication date: 1983-04-06

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の垂直輪郭補正回路の一例を示すブロック
図、第２図は第１図の各部の信号を示す波形図、第３図
は本考案による垂直輪郭補正回路の一実施例を示すブロ
ック図、第４図は第３図の各部の信号を示す波形図。１・・・・・・入力端子、７・・・・・・ＩＨ遅延線、
８・・・・・・自動利得制御回路、９・・・・・・比較
器、１８．１９・・・・・・出力端子、２０・・・・・
・減算回路、２３・・・・・・ＩＨ遅延線、２６・・・
・・・減算回路。第２図 −第４図Fig. 1 is a block diagram showing an example of a conventional vertical contour correction circuit, Fig. 2 is a waveform diagram showing signals of each part in Fig. 1, and Fig. 3 shows an embodiment of the vertical contour correction circuit according to the present invention. FIG. 4 is a block diagram and a waveform diagram showing signals of each part in FIG. 3. 1...Input terminal, 7...IH delay line,
8... Automatic gain control circuit, 9... Comparator, 18.19... Output terminal, 20...
・Subtraction circuit, 23... IH delay line, 26...
...Subtraction circuit. Figure 2-Figure 4

Claims

[Scope of utility model registration request]

(1) Vertical contour correction circuit that uses the vertical correlation of images to create a vertical contour correction signal from the 1-1 video signal and adds the video signal to a signal delayed by IH (H is a horizontal scanning period) In the first step, the video signal is delayed by 7H.
a delay line, a first subtraction circuit that generates a difference signal between the output signal of the first delay line and the video signal;
and a second subtraction table for generating the vertical contour correction signal from the output signal of the second delay line and the difference signal from the first subtraction circuit; 1st
A vertical contour correction circuit, characterized in that the vertical contour correction circuit is configured to be able to narrow a pass band of the second delay line with respect to the delay line.

(2) Utility model registration In claim 1, an automatic gain control circuit is provided between the first delay line and the first subtraction circuit, and an automatic gain control circuit is provided between the first delay line and the first subtraction circuit; A vertical contour correction circuit characterized in that it is configured to be capable of compensating for level changes caused by a delay line.

(3) Utility model registration In claim 2, the automatic gain control circuit compares the levels of the video signal supplied to the first delay line and the output signal of the automatic gain control circuit. A vertical contour correction circuit characterized in that it is configured to be gain controlled by a control signal obtained. book