JPS5848478A - Forming method of inp diode in which be is implanted - Google Patents
Forming method of inp diode in which be is implantedInfo
- Publication number
- JPS5848478A JPS5848478A JP56145469A JP14546981A JPS5848478A JP S5848478 A JPS5848478 A JP S5848478A JP 56145469 A JP56145469 A JP 56145469A JP 14546981 A JP14546981 A JP 14546981A JP S5848478 A JPS5848478 A JP S5848478A
- Authority
- JP
- Japan
- Prior art keywords
- guard ring
- junction
- light receiving
- receiving part
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 12
- 239000010409 thin film Substances 0.000 claims abstract description 9
- 238000000151 deposition Methods 0.000 claims abstract description 4
- 238000002513 implantation Methods 0.000 claims description 8
- 239000005360 phosphosilicate glass Substances 0.000 claims description 6
- 238000009792 diffusion process Methods 0.000 abstract description 9
- 230000000694 effects Effects 0.000 abstract description 7
- 238000005468 ion implantation Methods 0.000 abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract description 4
- 230000002093 peripheral effect Effects 0.000 abstract description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 1
- 229910052698 phosphorus Inorganic materials 0.000 abstract 1
- 239000011574 phosphorus Substances 0.000 abstract 1
- 239000005368 silicate glass Substances 0.000 abstract 1
- 238000009826 distribution Methods 0.000 description 25
- 239000010410 layer Substances 0.000 description 20
- 239000012535 impurity Substances 0.000 description 14
- 238000000137 annealing Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000031700 light absorption Effects 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002689 soil Substances 0.000 description 2
- 229930091051 Arenine Natural products 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000002848 electrochemical method Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
- H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
- H01L31/1075—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure
Abstract
Description
【発明の詳細な説明】
本発明はダイオードを形成する方法、特にＢｅ”注入を
使用してＩｎＰ層にダイオードを形成する方法に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a diode, and more particularly to a method of forming a diode in an InP layer using Be'' implantation.
ＩｎＰ層にダイオードを形成して成る半導体装置は広い
用途を考えることができるが、光通信用受光素子はその
重要なものの一つである０例えば１μｍ帯光通信用受光
素子は、第１図を参照すると、ＩｎＰ基板１上に光吸収
層２をエピタキシャル成長し、その上にＰＮ接合を形成
して構成される。光吸収層２は、ＩａＰ基板１に格子整
合した多元の半導体層であるが、１．５μｍ帯用ではＩ
ｎＧ１Ａ１を、ｔ ５ ｐｍ帯用ではＩｎＧｍＡｓにＩ
ＮＧ畠ＡｓＰ （この四元層はアンチメルＦパック層の
役割を持つ）を加えたものを、それぞれ用いる。光吸収
層２内にＰＮ接合を設けると暗電流が高くなるので、光
吸収層２の上にＩｆｉＰ層Ｓを成長させた上でＩｎＰ表
面層３ＫＰＮ接合を形成する。Semiconductor devices consisting of diodes formed in an InP layer can be used for a wide range of applications, and a light-receiving element for optical communication is one of the important ones. Referring to this, a light absorption layer 2 is epitaxially grown on an InP substrate 1, and a PN junction is formed thereon. The light absorption layer 2 is a multi-component semiconductor layer lattice-matched to the IaP substrate 1.
For the t 5 pm band, nG1A1 is used as InGmAs.
NG Hatake AsP (this quaternary layer plays the role of an antimel F pack layer) is used, respectively. Since providing a PN junction in the light absorption layer 2 increases dark current, an IfiP layer S is grown on the light absorption layer 2 and then a KPN junction is formed in the InP surface layer.
第１図では、単一に選択的な熱拡散又はイオン注入を行
なってＩｆｉＰ層に受光部４を形成したプレーナ形ダイ
オードを示した。との構造セは、逆電圧印加時ｍ、ＰＮ
接合面の周辺部で優先的な降伏が発生し、アバ２ンシ、
ホトダイオード（Ａ′ＰＤ）としての正常動作が望めな
い、そとで周辺部での優先的壜降伏を防止するために、
受光部の外周部に環状のガードリング部５を設ける。こ
のガードリング部５は、受光部４と同じＰ影領域である
が、受光部４によるＰＮ接合面を急峻な片側接合（階段
接合）とし、他方ガードリング部５によるＰＮ接合面を
傾斜接合にすると、ガードリング効果が得られることを
ねらった一〇である。FIG. 1 shows a planar diode in which a light receiving portion 4 is formed in the IfiP layer by single selective thermal diffusion or ion implantation. The structure of m, PN when reverse voltage is applied is
Preferential yielding occurs at the periphery of the joint surface, resulting in aberrations,
In order to prevent preferential breakdown in the peripheral area where normal operation as a photodiode (A'PD) cannot be expected,
An annular guard ring portion 5 is provided on the outer periphery of the light receiving portion. This guard ring part 5 has the same P shadow area as the light receiving part 4, but the PN junction surface by the light receiving part 4 is a steep junction on one side (staircase junction), and the PN junction surface by the guard ring part 5 on the other side is a slope junction. Then, it is 10 that aims to obtain the guard ring effect.
このようなガードリングを形成するために、特別に低い
温度で熱拡散を行なうことによって拡散不純物の深度分
布をゆるやかな傾斜の本のとして形成する手法がある（
例えばＣｄ拡散を４５０℃で実施し九例がある）、この
ように不純物の接散温度を変えることＫよって不純物の
深度分布のプロフィールを変える手法は基本接衝である
けれども、ガードリング形成には極めて長時間の拡散工
程が必要であり（前記の４５０℃でのＣｄ拡散は５日間
を要した）、シかも、不純物の深度分布を極めてゆゐや
かな傾斜のプロフィールに形成することは任意的ではな
いので、実際には、ガードリング部５の逆耐電圧受光部
４の逆耐電圧と殆んど差がなく、従って低温度拡散でガ
ードリングを形成しようとして亀十分表ガードリング効
果を発揮できないのが現状である。In order to form such a guard ring, there is a method of forming the depth distribution of diffused impurities as a book with a gentle slope by performing thermal diffusion at a particularly low temperature (
For example, there are nine examples of Cd diffusion carried out at 450°C). Although the method of changing the depth distribution profile of impurities by changing the impurity diffusion temperature in this way is basic contact, it is difficult to form guard rings. This requires an extremely long diffusion process (the above-mentioned Cd diffusion at 450°C took 5 days), and it is optional to form the impurity depth distribution into a very gently sloped profile. Therefore, in reality, there is almost no difference between the reverse withstand voltage of the guard ring part 5 and the reverse withstand voltage of the light receiving part 4, and therefore, when trying to form a guard ring by low temperature diffusion, the guard ring effect is fully exerted. The current situation is that this is not possible.
本発明は、十分なガードリング効果を発揮するＩｎＰ系
人ＰＤのガードリングを形成する方法を提示することを
目的の一つとしている。One of the objects of the present invention is to present a method for forming a guard ring of InP-based PD that exhibits a sufficient guard ring effect.
しかし、本発明は、さらに、ＩｎＰ層にゆるやかな傾斜
プロフィールの不純物分布を形成する方法を提供し、よ
ってその特徴を利用した様々のダイオードを提供するこ
と自体を目的としている。However, a further object of the present invention is to provide a method for forming an impurity distribution with a gentle slope profile in an InP layer, and therefore to provide various diodes that utilize this feature.
本発明は、ｎ形ＩｎＰ層に選択的Ｂｔ＋注入を行ない、
そのＩｎＰ層表面にＰ含有量が７重量ζ以下の沙ん珪酸
ガラス（ＰＥＧ）薄膜を被着し、その後で熱処理するこ
とを含んでいる方法を提出することによって、上記の目
的を達成する。The present invention performs selective Bt+ implantation into the n-type InP layer,
The above object is achieved by proposing a method comprising depositing a thin film of phosphosilicate glass (PEG) with a P content of 7 weight ζ or less on the surface of the InP layer, followed by heat treatment.
また、本発明においては、上記熱処理の効果を高めるた
めに、前記ＰｓＧ薄膜上に別Ｏ１ｌ電体薄膜を被着して
から熱処理を実施することができる。Further, in the present invention, in order to enhance the effect of the heat treatment, the heat treatment can be performed after another O1l electric thin film is deposited on the PsG thin film.
本発明においては、Ｂｅ＋注入及びその後のアニール処
理によってＩｎＰ層にダイオードを形成することを本質
的な特徴としており、これによって初めて不純物のゆる
やかな深度分布プロフィールを意図的に形成することが
可能となったのである。The essential feature of the present invention is that a diode is formed in the InP layer by Be+ implantation and subsequent annealing treatment, and this makes it possible for the first time to intentionally form a gentle depth distribution profile of impurities. It was.
Ｂｅ注入後にアニール処理したＩｎＰ層におけるＢｅ不
純物の深度分布は、従来、十分に調べられていないが、
数少なり報告を参照しながら本発明の特徴を以下に説明
する。Although the depth distribution of Be impurities in an InP layer annealed after Be implantation has not been sufficiently investigated,
The features of the present invention will be explained below with reference to a few reports.
その数少ない報告の−っは、熱処理用保護膜としてプラ
ズマＣＶ Ｄ ＝ ８１！ＩＮ４薄膜を用い死場合でＩ
ｎＰＫＢｅ＋注入を行ない、その打込みＢｅ不純物の濃
度ピークが２ Ｘ １０” ａｍ−’より低い場合には
、熱処理後のＢｅ ｊ［子の深度分布は渫部側で急激に
減少すると述べている（Ｗ、Ｊ、 Ｄｅマ１１ｎ他、Ｉ
ｎ５ｔ、Ｐｈｙｓ、Ｃｏｎｆ、８ｅｒ、 ｌ６４５．
Ｌｏｎｄｏｎ。One of the few reports is that plasma CV D = 81! as a protective film for heat treatment. I in case of death using IN4 thin film
It is stated that when nPKBe+ implantation is performed and the concentration peak of the implanted Be impurity is lower than 2 x 10"am-', the depth distribution of Be , J. Dema11n et al., I
n5t, Phys, Conf, 8er, l645.
London.
Ｔｈｅ Ｉｎ５ｔｉｔｕｔｅ ｏｆ Ｐｈｙｓ１ｃ＠、
１９７９．Ｐ、５１０参照）、シかし、本発明者らは、
Ｐ含有量が７重量ζ以下ｏｃｖｎ−ｐｓｏ薄膜をＩｎＰ
表面層に被着して熱処理用保護膜とすると、Ｂｅ十土性
ＩＭＦ表面層をアニール処理した場合、打込み時の゛Ｂ
ｅ不純物の濃度ピークが２ Ｘ １０” ａｓ−’よシ
低いときでも、Ｂｅ不純物分布は深部側で顕著１（Ｂｅ
拡散が行なわれ九分布となることを見出した。＠５図に
％ 加１［電圧１５０ ｋ＠ＶζＢ＠”注入量Ｉ Ｘ唱
０１３１！！ｌＩｌ″２でイオン注入し、７！ＳＯ℃で
アニール処理した場合（ＤＢ＊ ｇ子濃度を、アニール
処理部イオン注入時の分布人及びアニール処理後の分布
Ｂとして示した。Ｂｅ不純物のイオン注入時の濃度ピー
タは２ Ｘ １０１８ ＝−５よ）低いのであるが、７
ｘ−ルミ理後の分布曲線ｉはゆるヤかな傾斜プロフィー
ルとなっていることが見られる。参考のために、加速電
圧１５０ｋｅＶ、Ｂ・土性入量５×１０” ｃｓ−”で
イオン注入し、注入Ｂ・＋の濃度ピークを約１０１９国
−ＩＳ、−即ち２ Ｘ １０” ｍ””よシ高い濃度ピ
ークとしくその分布曲線Ｘ）、アニール処理して得られ
たＢｅ原原子一度の分布Ｙを同図に示し九が、これらＯ
分布曲線を比較すると、曲ｌｓＢが曲線Ｙと同様にゆる
やかな傾斜であることが明らかであろう０本発明は、前
記の報告と相違する本発明者らによるこの実験事実に基
づいてなされたも゛のである。The In5titude of Phys1c@,
1979. P, 510), but the inventors
InP ocvn-pso thin film with P content of 7wt
When applied to the surface layer and used as a protective film for heat treatment, when the Be-rich IMF surface layer is annealed, the
Even when the concentration peak of the e impurity is as low as 2 × 10"as-', the Be impurity distribution is significantly 1 (Be
It was found that diffusion occurred and resulted in a nine-fold distribution. @5 Add % to figure 1 [Voltage 150 k@VζB@”Ion implantation amount I In the case of annealing at SO℃ (DB* G concentration is shown as the distribution at the time of ion implantation in the annealed part and the distribution B after the annealing treatment.The concentration peak at the time of ion implantation of Be impurity is 2 x 1018 = - 5) Although it is low, 7
It can be seen that the distribution curve i after the x-lumi process has a gentle slope profile. For reference, ions were implanted at an accelerating voltage of 150 keV and a B soil loading of 5 x 10"cs-", and the concentration peak of the implanted B. The distribution curve (X) of a very high concentration peak, and the distribution Y of one Be source atom obtained by annealing are shown in the same figure.
Comparing the distribution curves, it is clear that the curve lsB has a gentle slope similar to the curve Y. The present invention was made based on this experimental fact by the present inventors, which is different from the above report. It is ゛.
次に、別の一つ０報告は、ｌ５Ｐ）ＣＢｅ＋ｌＩ人を行
なったウェーハに、約８重量％ＯＰを含有するｃｖＤ−
ｐｓｏ’＊ｘｔ表裏両面ｇ被着して、又は片面に被着し
かつＰＨｓ ガス雰囲気中で、保護膜アニール処理し
た場合、打込みＢｅ不純物の濃度ピークが２Ｘ１０”ａ
ｓ→より低ければ、Ｂｅ不純物の深度分布はＬ８８分布
（Ｌｌｎｄｈａｒｄ Ｂｃｈａｒｆおよび８ｃｈ１ｏｔ
ｔの分布）を維持すると電気化学的な測定の結果から主
張している（Ｊ、Ｐ、ＤｏｎｎｅｌｌｙおよびＣ，Ａ、
Ａｒｍ１ｅｎｔｏ、 人ｐｐ１．Ｐｈｙｓ、Ｌｅｔｔ。Next, another report showed that cvD-
pso'
If lower than s→, the depth distribution of Be impurity is L88 distribution (Llndhard Bcharf and 8ch1ot
It is claimed from the results of electrochemical measurements that the distribution of t is maintained (J. P. Donnelly and C. A.
Arm1ento, people pp1. Phys, Lett.
５４ （１） 、Ｊａｎｕａｒｙ １ 、１９７９．
Ｐ、 ９４ 参照）、シかし、本発明者らは、この場
合に％、アニール処理後にＢ＠不純物の深度分布はゆる
やかな傾斜Ｏプロフィールとなり、Ｂ・不純物分布は深
奥部までゆる中かな傾斜で延びて−ることを見い出した
。54 (1), January 1, 1979.
However, in this case, the inventors found that after the annealing process, the depth distribution of B@ impurity becomes a gently sloped O profile, and the B impurity distribution has a gentle slope to the deep part. I found that it can be extended.
第４図に１注入エネルギー１５０ｋｅｙ、Ｂｅ注入量Ｉ
Ｘ １０１３ａｓ−’ （この場合の濃度ピークは約
２Ｘ１０ ａｓ であム）でイオン注入し、７５０
℃でアニール処理した場合の正孔濃度分布りを示した。Figure 4 shows one implantation energy of 150 keys and Be implantation amount I.
Ion implantation was performed at X 1013as-' (the concentration peak in this case is approximately 2X10as),
The hole concentration distribution when annealing at ℃ is shown.
ｔた、Ｂｅ十十人入量５Ｘ １０１４ｎｓ−” （濃度
ピーク約１×１０ ａｌ ）の場合Ｖを比較のために併
記し九、同図から、濃度ピークが１０５１ よシ低い場
合も、１０” ｏｔｔ−”よシ高い場合と同様に１アニ
ール処理後の正孔濃度分布はゆるやかな傾斜を持う九プ
四ツイールとなっていることが明らかである０本発明は
、第二の報告と相異する本発明者らの見い出したこのよ
うな事ｇＡＫも基づいているものである。In addition, V is also shown for comparison when the amount of Be 10 is 5X 1014 ns-'' (concentration peak is about 1×10 al)9.From the same figure, even when the concentration peak is lower than 1051, it is 10'' It is clear that the hole concentration distribution after the 1st annealing process has a gentle slope, similar to the case where the temperature is higher than 0. gAK is also based on the findings of the present inventors.
こうして本発明の方法は、ＩｎＰ層におけるＢｅＩ＋の
深度分布においてゆるやかな傾斜を有するプロフィール
を与えることが明らかとなった。It has thus been revealed that the method of the present invention provides a profile with a gentle slope in the depth distribution of BeI+ in the InP layer.
本発明方法を用＾て第２図に示したガードリング５を形
成したととろ、受光部４の端部における降伏のない曳好
なガードリング効果を有する人ＰＤ装置を製造すること
ができた。By forming the guard ring 5 shown in FIG. 2 using the method of the present invention, it was possible to manufacture a human PD device having a good guard ring effect without breakdown at the end of the light receiving section 4.
まえ、本発明の方法は、上聞Ｂ・十分布プロフィールか
ら予想されるように１耐逆電圧、低リーク電流を示すダ
イオードを利用したＩｎＰ−ＩＣを製造すること、など
にも広く応用できることは当業者には明らかであろう。First, the method of the present invention can be widely applied to manufacturing InP-ICs using diodes that exhibit reverse voltage resistance and low leakage current as expected from the above-mentioned profile. It will be clear to those skilled in the art.
なお、Ｂ・土性入機、ＰＥＧ被着法及び熱処理（アニー
ル処理）法は、慣用のいずれの方法によるとと−できる
こと社当業者にとって拡明らかであろう。It will be obvious to those skilled in the art that any conventional method can be used for B. Soil pouring, PEG deposition, and heat treatment (annealing).
第１図はガードリング無し人ＦＤの断面構造概略図であ
り１
第２図はガードリング付きＡＰＤの断面構造概略図であ
シ、
第Ｓ図はＰ８Ｇ保穫膜を用い九Ｂ＠＋注入ＩｎＰＯ熱処
理の前後のＢｅ不純物濃度分布を示す図であり、
第４図はＰＳＧ保護膜を用い九Ｂ＠＋注入ＩｎＰＯ熱処
理の前後の正孔の濃度分布を示す図である。
１：ｎ十−ＩｎＰ基板、 ２：ｎ−光吸収層、５：ｎ
−ＩｎＰウィンド層、 ４：ｐ＋−受光部、５：ｐ−
ガードリング部、 ’ ： ｆｉ −Ｉ ｎ ｐバッ
ファ一層； 曲線人、Ｘ、Ｃ，Ｕ：熱処理前、曲線Ｂ、
Ｙ、Ｄ、Ｖ：熱処履後。
以下余白
第１図
集２図
１ＪｐＪ３覆
Ｏｉ ２ ３ ４
表面からの距離（μｍ）
ｆｌＪ、４０
表面からの距１Ｉｉ（μｍ）Figure 1 is a schematic diagram of the cross-sectional structure of a human FD without a guard ring. Figure 2 is a schematic diagram of the cross-sectional structure of an APD with a guard ring. Figure S is a schematic diagram of the cross-sectional structure of an APD with a guard ring. FIG. 4 is a diagram showing the Be impurity concentration distribution before and after the heat treatment, and FIG. 4 is a diagram showing the hole concentration distribution before and after the 9B@+ injection InPO heat treatment using the PSG protective film. 1: n-InP substrate, 2: n-light absorption layer, 5: n
-InP wind layer, 4: p+- light receiving section, 5: p-
Guard ring part, ': fi-I n p buffer layer; curved line, X, C, U: before heat treatment, curved line B,
Y, D, V: After heat treatment. Below is the margin Figure 1 Collection 2 Figure 1 JpJ3 Overview Oi 2 3 4
Distance from surface (μm) flJ, 40 Distance from surface 1Ii (μm)
Claims (1)
ｎＰ層表面にシん、含！量が７重量パーセント以下のり
ん珪酸ガラス薄膜を被着し、そしてそれを熱処理する工
程を含んでいることを特徴とするＩｎＰ層にダイオード
を形成する方法。 ２ 前記熱処理を、前配りん珪酸ガラス薄膜上に他の誘
電体薄膜を被着して、から実施する、特許請求の範囲第
１項記載０方法・[Claims] 1. Selective Be implantation is performed into the n-type InP layer, and the I
Contains a thin layer on the surface of the nP layer! A method of forming a diode in an InP layer comprising the steps of depositing a thin film of phosphosilicate glass in an amount of 7 weight percent or less and heat treating the same. 2. The method described in claim 1, wherein the heat treatment is performed after another dielectric thin film is deposited on the pre-distributed phosphosilicate glass thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56145469A JPS5848478A (en) | 1981-09-17 | 1981-09-17 | Forming method of inp diode in which be is implanted |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56145469A JPS5848478A (en) | 1981-09-17 | 1981-09-17 | Forming method of inp diode in which be is implanted |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5848478A true JPS5848478A (en) | 1983-03-22 |
Family
ID=15385956
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56145469A Pending JPS5848478A (en) | 1981-09-17 | 1981-09-17 | Forming method of inp diode in which be is implanted |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5848478A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7538367B2 (en) | 2005-09-12 | 2009-05-26 | Mitsubishi Electric Corporation | Avalanche photodiode |
-
1981
- 1981-09-17 JP JP56145469A patent/JPS5848478A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7538367B2 (en) | 2005-09-12 | 2009-05-26 | Mitsubishi Electric Corporation | Avalanche photodiode |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4717631A (en) | Silicon oxynitride passivated semiconductor body and method of making same | |
| CA1199097A (en) | Preparation of photodiodes | |
| US5233209A (en) | Guard ring structure with graded be implantation | |
| JPH02202071A (en) | Semiconductor photodetector and manufacture thereof | |
| JPH0287579A (en) | Manufacture of semiconductor device | |
| JPH077173A (en) | Preparation of photodetector sensitive within range of short wavelength light | |
| JPS5848478A (en) | Forming method of inp diode in which be is implanted | |
| US4415370A (en) | Method of beryllium implantation in germanium substrate | |
| JPH02248081A (en) | Avalanche photodiode and manufacture thereof | |
| JPS63215084A (en) | Semiconductor photodetector | |
| JP4401036B2 (en) | Photodiode manufacturing method | |
| US10566416B2 (en) | Semiconductor device with improved field layer | |
| JPS59106165A (en) | Manufacture of semiconductor light receiving device | |
| JP2736089B2 (en) | Semiconductor device and manufacturing method thereof | |
| JPS633448B2 (en) | ||
| JPS6259898B2 (en) | ||
| JPS61220481A (en) | Manufacture of semiconductor light receiving device | |
| JPS6298721A (en) | Zn solid-state diffusing method for iii-v compound semiconductor | |
| JPS58122721A (en) | Impurity diffusion to compound semiconductor | |
| JPS61144077A (en) | Manufacture of semiconductor light-receiving element | |
| JPS5853867A (en) | Semiconductor light sensitive element | |
| JPS6259907B2 (en) | ||
| JPS60178674A (en) | Manufacture of avalanche photo diode | |
| JPS6244870B2 (en) | ||
| JPS58151074A (en) | Manufacture of semiconductor device |