JPS5847837Y2 - Inverter - Google Patents

Description

[Detailed Description of the Invention] This invention relates to an inverter configured with field effect transistors and converting a DC input signal into an AC signal.

Conventional inverters have mainly been constructed using bipolar transistors.

That is, as shown in FIG.
1 and 12 are provided, each collector of which is connected to a transformer 13
It is connected to both ends of the primary winding 14 , and the midpoint of the primary winding 14 is connected to one input terminal 15 .

The other input terminal 16 is connected through a common emitter resistor 17 to the emitter of the transistor 11.12.

The output is taken out from both ends of the secondary winding 18 of the transformer 13, and the transformer 13 is provided with a tertiary winding 19, both ends of which are connected to the transistors 11.2 through resistors 21.22.
12 bases respectively.

The bases of these transistors 11 and 12 are diode 2
The polarity of these diodes 23, 24 is connected to the emitter through the transistors 11, 12, respectively.
The polarity between the base and emitter is opposite to the polarity between the base and emitter.

The terminal 15 is connected to the midpoint of the tertiary winding 19 through a bias resistor 25, and the midpoint of the tertiary winding 19 is connected to the capacitor 2.
6 to the terminal 16 in an alternating current manner.

Such an arrangement allows the transistors 11, 12 to alternately conduct, thereby avoiding charge storage effects in the transistors, such that there is a delay in the conduction of the other transistor corresponding to the delay when the transistor becomes non-conducting. Diodes 23, 24 are provided, thus preventing transistors 11, 12 from becoming conductive together.

In an inverter using such a bipolar l-run raster, when the input voltage between the input terminals 15 and 16 changes, the bias current of the transistors 11 and 12 changes accordingly, and the current that can be supplied to the load also varies depending on the input voltage. changes proportionally to

The state is the collector-emitter voltage ■ shown in FIG.

Collector current i for E.

As understood from the characteristics, for example, its base current ib
When the current decreases from 16 mA to 8 mA, that is, by half, the collector current only decreases from 1.5 A to 0.75 A. In other words, when the base current is halved, the collector current is also halved, but depending on how you look at it, the change is The target is small.

However, this bipolar transistor cannot be operated at high speed due to its charge storage effect.

Field-effect transistors can perform high-speed switching operations.

FIG. 3 shows an example of an inverter using field effect transistors.

That is, field effect transistors 28 and 29 are provided, the sources of which are connected to the input terminal 16 through a common source resistor 17, the drains of which are connected to both ends of the primary winding 14 of the transformer 13, and the gates of which are connected to the tertiary winding. Connected to both ends of line 19.

A resistor 31 is connected in parallel with the capacitor 26 to provide appropriate bias to the field effect transistors 28 and 29.

The rest is the same as in the case of FIG.

An inverter using this field-effect transistor has the advantage of being able to perform a high-speed switching operation because the field-effect transistor does not have a charge accumulation effect.

Drain-source voltage V1 of the field effect transistor
As shown in Fig. 4, the drain current 11) for 5 is dependent on the gate voltage V68, that is, the input terminal, and if the voltage between terminals 15 and 16 changes significantly, the current that can be supplied to the load decreases. It fluctuates greatly.

For example, in the example shown in Figure 4, the gate voltage is from 6 to 3V.
The drain current decreases from 0.9 A to 0.
It decreases to 2A, about ↓ or less.

The purpose of this invention is to provide an inverter that can be operated at high speed using field effect transistors and is less susceptible to input voltage.

According to this invention, field-effect transistors are connected in a push-pull structure, and an AC positive feedback circuit is constructed from the drain of each one to the gate of the other, and these field-effect transistors are gate-biased in the forward direction. A sensor diode is connected between the gate and one input terminal to limit the amount of AC feedback.

In this way, a stable output can be obtained against fluctuations in input voltage.

For example, as shown in FIG. 5 with the same reference numerals as in FIG. Connected.

Both ends of the tertiary winding 19 are connected through a resistor 21.22 to the gate of a field effect transistor 28.29.

As a result, the Zener voltage of the Zener diodes 33 and 34 is applied to the gates of the transistors 28 and 29.

In addition, the transformer 1 is connected between the drains of the transistors 28 and 29.
3, and the output is taken out from the secondary side of the transformer 13 to form a push-pull structure.

Further, through the tertiary winding 19 of the transformer 13, the drain output of one transistor is positively fed back to the gate of the other transistor in an alternating current manner.

From the input terminal 15, the resistor 31. Tertiary winding 19, resistor 2
A DC bias is applied to the gates of transistors 28 and 29 through 1.22.

In such a configuration, a Zener voltage is applied to the gates of the transistors 28 and 29, that is, a constant voltage is applied.

Therefore, when one transistor, e.g. 28, becomes conductive and its conduction current increases so that the voltage drop across the common source resistor 17 becomes equal to the zener voltage of the zener diode 33, the transistor 28 becomes non-conducting and its non-conducting causes the tertiary winding A switching voltage is applied to the gate of transistor 29 through line 19, making transistor 29 conductive.

This conduction increases its source current, causing transistor 29 to become non-conductive and the other transistor 28 to conduct, in the same manner as described above, and transistors 28 and 29 to be alternately conductive.

At this time, since the Zener voltage is applied to the gate of the L transistor, that voltage determines the saturation value of the drain current of the transistor.In other words, the input terminal changes without depending on the input terminal between the input terminals 15° and 16. However, the drain current remains constant and the output does not fluctuate.

Further, when the transistor is off, a forward bias current is applied to the Zena diode, and by utilizing a slight delay effect due to the charge accumulation effect, the conduction of the transistor is slightly delayed.

Therefore, in the switching waveform, for example, as shown in FIG. 6, there is a period during which both transistors are non-conductive at the rising and falling edges of a short period TD, and both transistors are prevented from becoming conductive at the same time.

In this way, high-speed switching can be performed by utilizing the high-speed properties of field-effect transistors, and simultaneous conduction can be avoided.

Since the input impedance of the gate of a field effect transistor is high, for example, as shown in FIG. The drain of the transistor 29 is connected to the gate of the transistor 28 through a series circuit including a resistor 38, a parallel circuit of a capacitor 39, and the resistor 29.

In this way, an AC positive feedback circuit from one drain to the other gate is constructed by the capacitors 37 and 39,
Furthermore, the resistors 36 and 38 can constitute a DC bias circuit at startup.

Resistors 36 and 38 are for starting and may be high impedance circuits.

Other configurations of these circuits are also possible.

For example, as shown in FIG. 8, a resistor 36 is connected between the drain and gate of the field effect transistor 28, and the resistor 36 is
8 may be connected between the train and gate of the field effect transistor 29.

Alternatively, as shown in FIG. 9, resistors 36 are connected between the terminal 15 and the gates of the field effect transistors 28 and 29, respectively.
, 38 may be connected.

These DC biases become unnecessary if vibrations grow, so they are selected to be much smaller than the AC feedback amount.

As mentioned above, this invention makes it possible to reliably perform high-speed switching operations by utilizing the high-speed properties of field-effect transistors, and also to obtain a stable and constant output regardless of the input voltage. .

[Brief explanation of drawings]

Figure 1 is a connection diagram showing a conventional inverter using bipolar transistors, Figure 2 is a collector-emitter voltage vs. collector current characteristic curve of a bipolar transistor, and Figure 3 is a diagram showing a conventional inverter using field-effect transistors. 4 is a drain-source voltage vs. drain current characteristic curve, FIG. 5 is a connection diagram showing an example of an inverter according to this invention, FIG. 6 is a diagram showing an example of its switching waveform, and FIG. 9 to 9 are connection diagrams showing other examples of the inverter according to this invention.

Claims (1)

[Scope of utility model registration request] In a push-pull structure constituted by a pair of field effect transistors connected to a common source resistor, an AC positive feedback circuit from the drain of one field effect transistor to the gate of the other field effect transistor;
A DC bias circuit that applies a forward bias to the gate of the field effect transistor, and a Zena diode connected between the gate of the field effect transistor and one terminal of the input to limit the amount of AC feedback are provided. Inverter.