JPS5845176B2 - 3↓-Plasma anodic oxidation method for group 5 compound semiconductors - Google Patents

3↓-Plasma anodic oxidation method for group 5 compound semiconductors

Info

Publication number
JPS5845176B2
JPS5845176B2 JP54024525A JP2452579A JPS5845176B2 JP S5845176 B2 JPS5845176 B2 JP S5845176B2 JP 54024525 A JP54024525 A JP 54024525A JP 2452579 A JP2452579 A JP 2452579A JP S5845176 B2 JPS5845176 B2 JP S5845176B2
Authority
JP
Japan
Prior art keywords
semiconductor
plasma
oxide film
atoms
anodic oxidation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54024525A
Other languages
Japanese (ja)
Other versions
JPS55117244A (en
Inventor
吉孝 古川
猛 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP54024525A priority Critical patent/JPS5845176B2/en
Publication of JPS55117244A publication Critical patent/JPS55117244A/en
Publication of JPS5845176B2 publication Critical patent/JPS5845176B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/06Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
    • C23C8/36Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases using ionised gases, e.g. ionitriding

Description

【発明の詳細な説明】 本発明はDI−V族化合物半導体表面一絶縁膜の界面に
準位の少ない、優れた電気特性を有する絶縁膜の形成法
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an insulating film having excellent electrical properties with few levels at the interface between the surface of a DI-V compound semiconductor and the insulating film.

従来から、プラズマ陽極酸化法は半導体表面に酸化膜を
形成する手法として使用されてきたものであるが、m−
v族化合物半導体、たとえば、GaAs表面を酸化した
場合に得られる半導体−酸化膜界面は必らずしも良好な
特性を示さなかった。
Conventionally, plasma anodic oxidation has been used as a method to form an oxide film on the surface of a semiconductor, but m-
The semiconductor-oxide film interface obtained when the surface of a V-group compound semiconductor, for example, GaAs, is oxidized does not necessarily exhibit good characteristics.

これはプラズマ陽極酸化を0□ガスのプラズマ放電で進
行させているため、O原子が化合物半導体表面のダング
リングボンドに結合しにくいからである。
This is because plasma anodic oxidation is progressed by plasma discharge of 0□ gas, so O atoms are less likely to bond to dangling bonds on the surface of the compound semiconductor.

5i−8i02が安定した界面特性をもつのは、膜中の
O原子がSi表面層原子のダングリングボンドと結合し
、準位密度を著しく低減しているからである。
The reason why 5i-8i02 has stable interface properties is that the O atoms in the film combine with the dangling bonds of the Si surface layer atoms, significantly reducing the level density.

以上の理由で、02プラズマ放電で作製した■−■族化
合物半導体表面−酸化膜界面には準位密度が太きいとい
う電気特性の悪ざがあった。
For the reasons mentioned above, the interface between the surface of the ■-■ group compound semiconductor and the oxide film produced by 02 plasma discharge had a bad electrical characteristic such as a high level density.

本発明はこれらの欠点を解決するために、I−V族化合
物半導体上に酸化膜を形成する場合に、半導体結晶表面
のダングリングボンドと結合しやすい水素ガスをプラズ
マ陽極酸化の過程に導入しとくに酸化膜中に水素原子を
含有させることを特徴とし、その目的は■−■族化合物
半導体表面と酸化膜界面の準位を減らして良質の電気特
性を示す界面をもった半導体装置を得ることにある。
In order to solve these drawbacks, the present invention introduces hydrogen gas, which easily combines with dangling bonds on the semiconductor crystal surface, into the plasma anodization process when forming an oxide film on a group IV compound semiconductor. It is particularly characterized by containing hydrogen atoms in the oxide film, and its purpose is to reduce the levels at the interface between the ■-■ group compound semiconductor surface and the oxide film, thereby obtaining a semiconductor device with an interface that exhibits good electrical characteristics. It is in.

以下に本発明を実施例により詳細に説明する。The present invention will be explained in detail below using examples.

H原子が結晶表面層原子のダングリングボンドと強い結
合をすることはよく知られている。
It is well known that H atoms form strong bonds with dangling bonds of crystal surface layer atoms.

本発明はm −、、−v族化合物半導体のプラズマ陽極
酸化の過程において、■−■原子の活性な作用を有効に
利用しようとするものである。
The present invention aims to effectively utilize the active action of the -■ atoms in the process of plasma anodic oxidation of m-, -v group compound semiconductors.

すなわち、本発明は酸化膜中にH原子を取り込むように
酸化膜の形成を進行させる方法を提供するものである。
That is, the present invention provides a method for advancing the formation of an oxide film so as to incorporate H atoms into the oxide film.

第1図は本発明に使用するプラズマ放電装置であり、1
はチャンバ、2はチャンバ1へのガス導入管、3は水蒸
気溜め、4はFI2ガス溜め、5は真空ポンプに連結さ
れた排気管、6は高周波コイル、7は試料8を載置する
下部電極、9は−L部電極、10は減速調整電極である
FIG. 1 shows a plasma discharge device used in the present invention.
is a chamber, 2 is a gas introduction pipe to chamber 1, 3 is a water vapor reservoir, 4 is an FI2 gas reservoir, 5 is an exhaust pipe connected to a vacuum pump, 6 is a high frequency coil, and 7 is a lower electrode on which a sample 8 is placed. , 9 is a −L part electrode, and 10 is a deceleration adjustment electrode.

チャンバ1内に水蒸気()、−I 20 )溜め3、あ
るいはこれとH2ガス溜め4からH2O、あるいは■I
2ガスとFI20の混合ガス(ただし、混合比は幅があ
るので制限しない)を導入し、高周波放電を開始すれば
、チャンバ1内の雰囲気ガスは次式のような成分でプラ
ズマ放電する。
In the chamber 1, water vapor (), -I 20 ) is supplied from the reservoir 3, or from this and the H2 gas reservoir 4, H2O, or ■I
When a mixed gas of 2 gas and FI20 (however, the mixing ratio is not limited as there is a range) is introduced and high frequency discharge is started, the atmospheric gas in the chamber 1 generates a plasma discharge with components as shown in the following equation.

(■■2+H20)→(H+0+OH) いま、半導体試料8を載置した下部電極7をアノード、
上部電極9をカソードとして放電させれば、0原子によ
り酸化が進行する。
(■■2+H20) → (H+0+OH) Now, the lower electrode 7 on which the semiconductor sample 8 is placed is the anode,
When the upper electrode 9 is used as a cathode and discharge is caused, oxidation progresses due to zero atoms.

たとえば、半導体試料8としてGaAs結晶を用いれば
、(酸化ガリウム、酸化ヒ素)を主成分とする酸化膜が
結晶表面に形威されて行く。
For example, if a GaAs crystal is used as the semiconductor sample 8, an oxide film containing (gallium oxide, arsenic oxide) as a main component is formed on the crystal surface.

この場合、従来の方法と違って、本発明の方法ではプラ
ズマ雰囲気内にH原子が多量に存在するため、形成され
る酸化膜内には■4原子が多量に取り込まれるという特
徴がある。
In this case, unlike the conventional method, the method of the present invention is characterized in that a large amount of 4 atoms are incorporated into the formed oxide film because a large amount of H atoms are present in the plasma atmosphere.

雰囲気内にH2ガスを混入しなくても、H原子はH20
ガスの分解から得られるので、あえて混入する必要もな
いが、しかし、多量にI−1原子を酸化膜中に取り込む
ためには、F■2ガスを混入することが必要である。
Even if H2 gas is not mixed into the atmosphere, H atoms are H20
Since it is obtained from the decomposition of the gas, there is no need to intentionally mix it in. However, in order to incorporate a large amount of I-1 atoms into the oxide film, it is necessary to mix F2 gas.

このようにして酸化膜中に取り込まれた)(原子は半導
体結晶−酸化膜の界面で重要な働きをする。
The atoms thus incorporated into the oxide film play an important role at the semiconductor crystal-oxide film interface.

すなわち、従来、結晶表面層原子のダングリングボンド
は半導体表面に準位を形威し、電気特性を低下させてき
たが、本発明においては、酸化膜中に取り込まれたH原
子がこのダングリングボンドと結合し、準位密度を著し
く減少させる。
In other words, in the past, dangling bonds of atoms in the crystal surface layer formed levels on the semiconductor surface and deteriorated electrical properties, but in the present invention, H atoms incorporated into the oxide film form dangling bonds. It combines with bonds and significantly reduces the level density.

この結果として、本発明で作成された半導体結晶−酸化
膜界面は優れた電気特性を示すようになった。
As a result, the semiconductor crystal-oxide film interface created according to the present invention showed excellent electrical properties.

酸化膜形成前の半導体結晶面は、通常種々の理由で汚染
されている。
A semiconductor crystal surface before an oxide film is formed is usually contaminated for various reasons.

したがって、酸化膜形成前に表向を清浄化することは価
値がある。
Therefore, it is worthwhile to clean the surface before forming the oxide film.

これは、本発明においては、同一雰囲気のまま、下部電
極γと上部電極9の電位を逆にすれはよい。
In the present invention, it is preferable to reverse the potentials of the lower electrode γ and the upper electrode 9 while keeping the same atmosphere.

このエツチング過程で、結晶の表面は清浄化される。This etching process cleans the surface of the crystal.

従来の方法では、この過程で結晶表面層に多くのダング
リングボンドができてしまうが、本発明では、この段階
ですでに雰囲気中のH原子がダングリングボンドと結合
するという利点がある。
In the conventional method, many dangling bonds are formed in the crystal surface layer during this process, but the present invention has the advantage that H atoms in the atmosphere are already bonded to the dangling bonds at this stage.

以上説明したように、本発明による水蒸気あるいは水蒸
気と水素の雰囲気中のプラズマ放電を利用した■−V族
化合物半導体の陽極酸化は、(1)ダングリングボンド
の激減した良質の半導体−酸化膜界面が得られる、 (2)結晶表向の清浄化が電極電位の反転のみで行なう
ことができる。
As explained above, the anodic oxidation of a ■-V group compound semiconductor using plasma discharge in an atmosphere of water vapor or water vapor and hydrogen according to the present invention achieves (1) a high-quality semiconductor-oxide film interface with a sharp reduction in dangling bonds; (2) Cleaning of the crystal surface can be performed only by reversing the electrode potential.

そして、結晶表面のダングリングボンド密度を大幅に抑
えることを可能とする、 などの特徴があり、本方法は、■I−■族化合物半導体
のMOSFETのゲート酸化膜の作製に有効であり、こ
れにより、II−V族化合物半導体の反転領域が実現で
きる。
This method has the following characteristics: it is possible to significantly suppress the dangling bond density on the crystal surface, and this method is effective for manufacturing gate oxide films of MOSFETs of group I-■ compound semiconductors. Accordingly, an inversion region of a II-V compound semiconductor can be realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に使用するプラズマ放電装置の概略図で
ある。 図において、1・・・・・・チャンバ、2・・・・・・
ガス導入管、3・・・・・・水蒸気溜め、4・・・・・
・FI2ガス溜め、5・・・・・・排気管、6・・・・
・・高周波コイル、7・・・・・・下部電極、8・・・
・・・試料、9・・・・・・−1部電極、10・・・・
・・減速調整電極。
FIG. 1 is a schematic diagram of a plasma discharge device used in the present invention. In the figure, 1...chamber, 2...
Gas introduction pipe, 3... Steam reservoir, 4...
・FI2 gas reservoir, 5...exhaust pipe, 6...
...High frequency coil, 7...Lower electrode, 8...
...Sample, 9...--1 part electrode, 10...
...Deceleration adjustment electrode.

Claims (1)

【特許請求の範囲】 1 水蒸気あるいは水蒸気と水素との混合雰囲気をプラ
ズマ放電させ、III−V族化合物半導体をアノード側
に配置して、前記半導体の表面を酸化させることを特徴
とする■−■族化合物半導体のプラズマ陽極酸化法。 2 水蒸気あるいは水蒸気と水素との混合雰囲気をプラ
ズマ放電させ、■−■族化合物半導体をカソード側に配
置して前記該半導体の表面をプラズマエツチングし、し
かる後、前記と同一雰囲気をプラズマ放電させ、前記半
導体をアノード側に配置して前記半導体の表面を酸化さ
せることを特徴とする■−■族化合物半導体のプラズマ
陽極酸化法。
[Claims] 1. A method characterized in that: 1. A plasma discharge is performed in a water vapor or a mixed atmosphere of water vapor and hydrogen, a III-V compound semiconductor is placed on the anode side, and the surface of the semiconductor is oxidized. Plasma anodic oxidation method for group compound semiconductors. 2 Plasma discharge is performed in water vapor or a mixed atmosphere of water vapor and hydrogen, a ■-■ group compound semiconductor is placed on the cathode side, and the surface of the semiconductor is plasma etched, and then the same atmosphere as described above is plasma discharged; A method for plasma anodization of a (1)-(2) group compound semiconductor, characterized in that the semiconductor is placed on the anode side and the surface of the semiconductor is oxidized.
JP54024525A 1979-03-05 1979-03-05 3↓-Plasma anodic oxidation method for group 5 compound semiconductors Expired JPS5845176B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54024525A JPS5845176B2 (en) 1979-03-05 1979-03-05 3↓-Plasma anodic oxidation method for group 5 compound semiconductors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54024525A JPS5845176B2 (en) 1979-03-05 1979-03-05 3↓-Plasma anodic oxidation method for group 5 compound semiconductors

Publications (2)

Publication Number Publication Date
JPS55117244A JPS55117244A (en) 1980-09-09
JPS5845176B2 true JPS5845176B2 (en) 1983-10-07

Family

ID=12140564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54024525A Expired JPS5845176B2 (en) 1979-03-05 1979-03-05 3↓-Plasma anodic oxidation method for group 5 compound semiconductors

Country Status (1)

Country Link
JP (1) JPS5845176B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61279180A (en) * 1985-06-04 1986-12-09 Semiconductor Energy Lab Co Ltd Manufacture of photoelectric conversion device
EP0419693A1 (en) * 1989-09-25 1991-04-03 Siemens Aktiengesellschaft Process for passivating crystal defects in a polycrystalline silicon material
FR2741361B3 (en) * 1995-11-22 1998-04-17 Balzers Hochvakuum PROCESS FOR THERMOCHEMICAL SURFACE TREATMENT BY IMMERSION IN PLASMA, PLANT FOR THIS PROCESS, USES AND PARTS OBTAINED

Also Published As

Publication number Publication date
JPS55117244A (en) 1980-09-09

Similar Documents

Publication Publication Date Title
KR101232470B1 (en) Semiconductor device and method of manufacturing the same
Faur et al. XPS investigation of anodic oxides grown on p‐type InP
US5210056A (en) Method for forming a gate oxide film of a semiconductor device
US7615441B2 (en) Forming high-k dielectric layers on smooth substrates
CN1333445C (en) An oxide layer on a GAAS-based semiconductor structure and method of forming same
JP4221601B2 (en) Etching solution and etching method
US7435301B2 (en) Cleaning solution of silicon germanium layer and cleaning method using the same
Liu et al. Deep level transient spectroscopy study of GaAs surface states treated with inorganic sulfides
US5336361A (en) Method of manufacturing an MIS-type semiconductor device
JPS5845176B2 (en) 3↓-Plasma anodic oxidation method for group 5 compound semiconductors
JP2808799B2 (en) Etching method of silicon nitride film
JPH0473613B2 (en)
JP3336175B2 (en) Silicon wafer and cleaning method thereof
JP2970236B2 (en) GaAs wafer and method of manufacturing the same
JPH0524990A (en) Surface treatment of diamond
JPS60246636A (en) Manufacture of semiconductor device
KR20020066011A (en) Dry etching process for the high Efficient SiC devices
JP2706964B2 (en) Method for manufacturing semiconductor device
Ohmi Proposal of Advanced Wet Cleaning of Silicon Surface
KR0137716B1 (en) Contact etching method of semiconductor device
KR930011114B1 (en) Surface cleaning method of semiconductor substrate
JP3228143B2 (en) Method of forming SiOF film and semiconductor device
KR0166803B1 (en) Stabilization method of bpsg thin film
KR100243902B1 (en) Method for manufacturing gate insulating film of semiconductor device
KR940002738B1 (en) Surface cleaning method of semiconductor substrate