JPS5844762A - Integrated structure of high voltage complementary mos inverter array - Google Patents

Abstract

PURPOSE:To obtain inexpensively an inverter array by integrating a circuit which is formed of a load side transistor, a shunt resistor and a diode on a semiconductor substrate and a circuit which is formed of a drive side transistor, a shunt resistor, a diode and a gate input condenser, and connecting them by external wirings. CONSTITUTION:Four high withstand voltage PMOS transistor circuits having integrated high resistors and a diode between a gate electrode and a source electrode on an N type semiconductor substrate as an integrated circuit element 19. Four integrated high withstand voltage NMOS transistor circuits are formed on a P type semiconductor substrate as an integrated circuit element 29, and the elements 19, 29 are connected to each other. In other words, the gate terminals 11, 13, 15, 17 of the element 19 are respectively connected via external wirings to the gate input condenser terminals 21, 23, 25, 27 of the element 29. The drain terminals 12, 14, 16, 18 of the element 19 are respectively connected by external wirings similarly to the drain terminals 22, 24, 26, 28 of the element 29.

Description

[Detailed description of the invention] The present invention uses low voltage input at the MOS IC level.

- Complementary type MOI9 (0M
O8) Regarding the *building structure of the inverter array.

In addition to the low-voltage IIII4stgI circuit, high-voltage, +4-current output circuits are often required in terminal devices such as display devices and printers. Conventionally, this tC has been conveniently used as a d4im pressure bipolar transistor, or the operating frequency l due to the thermal runaway interlayer of the bipolar element 41# or the tI transverse effect of minority carriers has been used.
! Due to the limitations, it has not been possible to fully satisfy the required performance of the device. -The development of transistors is progressing, but since the A element is new, the IIfl transistor τ is used as an aid. Much is known about circuit formation for this purpose. Fugakuban et al. 1, already xJO8I
As a circuit that operates with low voltage input of C level and can generate at noodle ratio, large current output pulse t, and island frequency, one circuit is shown in 6% 1 figure. No. 54-44014, Machigan No. 55-84750, Mochil
Ii was already proposed in No. 85367/1983. In the same figure, [4.
, 5' and 4, 6 are diodes and gate charges 7 which serve both to protect the gate oxide film and to clamp the gate voltage 77, respectively, a -4 resistor for preventing voltage leakage, and 7 a capacitor with high withstand voltage. When a low-voltage gate signal Via, such as that shown in Figure 2+a), is applied to the input voltage 48 of this inverter circuit, the signal voltage changes, and the load side P108 transistor 2 It is divided between the gate power #tCg and the capacitor C, and the gate input voltage τ of the negative transistor 2 is generated. Here, capacitor C
If the capacitance of Cg and Kjt is selected to be sufficiently large, the input terminal 8 will be
Since the voltage change IVin I appears in the -1 dome transistor 2's goo-tooth 4 engine with almost the same magnitude, the present inverter can be efficiently driven with a low input terminal. The output terminal 9 of this inverter, which is connected to the output terminal am, outputs 1.1 in response to the human power signal Vin. hs
A high voltage pulse Volt with a magnitude equal to the vt pressure V,
(Fig. 2 1b) ) is output. The feature of this inverter is that since the photodischarge to the load is also carried out by hydrogen atoms, an extremely high load m excitation force can be achieved. This inverter circuit uses high-voltage P and N+408 transistors, and a capacitor that can withstand a voltage of 1 cm and a capacitor that grows the desired 4ft. Can be widely composed of resistors and diodes,
A series of high voltage pulses can be used for safe applications.

By the way, recent wooden devices are becoming increasingly smaller, ^1
Aiming to improve the quality of fI and to make low 1 song pronunciation τ, the accumulation of Ayu for convenience is progressing. The above 4 voltage pulse generation circuit t
In the table mounted for &6, there are quite a few sternums that have many of the same circuits connected in series, and the Toyoko style of the same circuit array is used.

Let us consider applying an 8 inverter to the drive circuit of an AC refresh type plasma display device for displaying characters or characters. In this case, the required 4 voltages, J, is approximately 150 V, but the display panel is a matrix driver with 224 columns and 80 rows of signal input terminals, and the present MCJ8 inverter is connected to the column counters. If each ↓ζ connection is made individually for each row and row, a total of 304 Iti1i voltage inverters will be required.If the display product is omitted, the number of rows and columns will further increase; Inevitably, the number of inverters will also increase.Assembling these 4-pressure inverters with 7 layers of individual parts increases the cost of goods and the number of man-hours for assembly, and the price of display devices and dynamic circuits increases. rises (if J)
vinegar! This may lead to an increase in the volume occupied by the 1Ihl tract and a decrease in attention. The problem with these is the book-
This problem can be solved if the integration of voltage complementary M08 inverter arrays can be realized. 70) C, ^ Voltage number confectionery separation,
Ant field of wiring, latch peculiar to phase ring type, pu4'llk
Because of this, the so-called PN Iwao's spoiled henchman's secret crime, the station's high voltage 4111 葡形 1v08 inverter monolin in a way that is too expensive, and the V-yu, which is extremely one-sided. In the end, this integration in other countries has so far prevented the practical application of this Ik range pressure inverter array to plasma display drives.

The purpose of the lawsuit is to realize the overuse of *multiplying times in the high four-voltage phase bucket type MOS inverter array.
According to the design of the present invention, an armpit high voltage inverter array can be constructed simply by externally wiring the flat voltage output circuit elements, so that a high voltage inverter array can be put into practical use using conventional integrated i4j functionality. All problems will be resolved. According to the present invention, V, gate source, and VC,
Several series of shunt resistors and diodes oriented to hold the gate voltage are connected: C/, l: 4 iN and P
The type MO8 transistor with withstand voltage is used in the configuration. In the 11Im positive complementary MOS inverter array with the top C1, the transistors for each inverter and the shunt resistors and diodes for each inverter are placed on the same semiconductor substrate, and the drive side transistor and the shunt resistor for it are placed on the same semiconductor substrate. High voltage complementary type MO8 with diodes, differential capacitors, and gate power capacitors integrated on other same semiconductors.
A dye 61i # structure of the f inverter array is obtained.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

First, let us consider the case of a high-range voltage Ch10B inverter in which a high voltage resistance 1'MJ8) transistor is used as 14JII111, and a high voltage resistance Nr11IO8) transistor is used for 14JII111. lli 31d(a
), tb), and (c) are book @ Ming ni or ρ, respectively.
) This is a schematic diagram of the current example of the current example of the current PMO 8 channel bond circuit U and ^ withstand voltage z'JzJ (J & Sada Yoko 1 package. The dots indicate the range of integration. That is, the same @
(a) is a circuit diagram of a 401 high-voltage PMUS) transistor with a diode at the gate and threshold. Figure 1b) Kuzuyo-c) yyo, P bull\ body 4
FIG. 4 is a circuit diagram of four high-voltage N5vlOB) run restors integrated on a board. In this example, NMOi9) In order to use the transistor as the source τ, the capacitors C1 to C4 for one gate are replaced with NMO8 for the four reasons described below.
Integration into an integrated circuit: Also, as shown in the same figure fc),
t magnetic pressure Nr4US logic circuit for inverter excitation,
+1llI+withstanding voltage N1% It can be used with a 408 transistor circuit on a P-shaped four-layer board with gC overcompensation.

Figure 4 shows an example of the structure of 8 inverters and 7 lays.

That is, the dirt terminal 11°13 of the high voltage PMO8) transistor on the high voltage PtJ08 integrated circuit in Figure 3 1a)
．． 15,178 machined drain terminal 12,14°16.1
8i, tAI A lc) high withstand voltage NML) 8-side horizontal circuit with high withstand voltage N, V10B) Lanonstar's gate input capacitor terminals 2'l, 23, 25.27 and drain terminals 22, 24, 26, 28 By carefully connecting each wire with sophisticated external wiring,! (The positive complementary form nviu8i/vertahii's 4#1 can be realized.

For multi-layer 44 construction and 6, control # circuit 4 area each height' (pressure ML
) 8 Low voltage goo to inverter - Ura No. Vial ~ Vi
Q41i-Manual C-Pat work, output terminal Voutl~
Vout4 machining, electric solder pressure VDWζ equal size Ii
& Voltage voltage pulse can be taken out. In this case, P
1d08) The source electrode lO of the transistor is at a positive high voltage ($1).

ISJMO8) The source 30 of the transistor is brought to ground level IIkM, and the output pulse is specific.

VC1 instead of the high voltage NMO8 integrated circuit of lsa (c)
Exactly the same dovetail structure of a high voltage inverter array can be realized by using the high voltage NMO 8 stacks 1 g ITNt shown in tb) in the same figure.

The feature of the non-4-meter example is that the integration is a national electric power system, and it does not use the monolithic multiplication product 1- of the high-voltage CMtJS 4Gl circuit, which is cost-friendly, and only uses the conventional MOS 4-product circuit fatigue technique.
By combining the voltage-resistant PnliO8# and NMOM m-product circuit, -voltage complementary type ML)8 inverter 7 can be realized.
I am sorry for the stupid structure of the ship. However, with the non-AM structure, σ, and just by externally disposing the integrated circuit elements, it is possible to create an individual single m-product TF! Wanai Co., Ltd. can reduce the cost of LI11 items, 1 cm of assembly, and the width rcM, +4-voltage M
The low price of Yamaha Innovator Frey's circuit becomes popular.

Now, the previous example is - withstand voltage PMt) J) U/The positive #! It was the time when the housing Hals occurred, but the high withstand voltage N, dOti ) U/
A negative pulse generation circuit using a negative transistor as a negative transistor can also be constructed in exactly the same manner. In other words, the jth worst,
#! Figure 4: By replacing the transistors (ρ, C1p, and NMOM) with the polarities of diodes, etc., we can create a high-complementary MOS inverter array that generates a tAI-type pulse 1. An integrated structure can be realized.

By the way, the gate manual capacitors C1 to C4 for transmitting the gate signal to the open transistor are all
- It is necessary to place #4 body on the upper plate on the side where the cutting transistor is integrated. In the following, I will explain the reasons for this. Figure 5+1) is an example of a circular planar type high-voltage m08 transistor and a gate power capacitor C0 that is integrated around it. Figure +b) is a surveillance diagram of the same transistor d and capacitor of C along the mn line. The gate power capacitor C6 must have a withstand voltage higher than the power supply voltage! /1″ et al/,
1", in this case, the thick layer directly above the semiconductor base - 14
2, ^- is the mineral mosquito layer 41, and 3tJ4゛≦4 billion
It is composed of 3. On the other hand, the capacitance of the same capacitor must be sufficiently larger than the gate power capacitance of the single load transistor (11 bar), so its occupied Ii[l product is
It is larger than a transistor. Follow me, Gate I! It is necessary to widen the convergence of the high mIf spread mosquito M41 connected to L-, and the PN-coupling 4@C of the leap with the semiconductor substrate 40 of the type 4), which is different from the same diffusion layer, is large. becomes. Since this CP occurs by chance between the gate and the ground, the appearance becomes larger as the gate force vl*μC2 of the HM(M transistor increases) from the perspective of external ρ.

Now, as mentioned above, the capacitance of the gate power capacitor 7, which is 8 in Figure 1, must be sufficiently larger than the gate power #ff1c of the transistor 2, 11, so bL, the gate power capacitor 7. The capacitor for woven # side PMO
B) The same as the transistor - provided on the fast conductor plate, and the cocoon m
If 1C1 increases, the gate force capacity XC, , of the PMO 8) increases, and therefore the capacitance 11 of the capacitor 7 increases.
This means that we have to choose a larger value. This is also
I pray for M1614 circulation as it will lead to an increase in CP.

To obtain this f′L, connect the gate human power capacitor to d@
It may be provided on the same semiconductor substrate as @MO&transistor. Of course, in the case of , the apparent gate power capacity of the drive-M08 transistor increases, but
It will affect the size of the gate human power capacitor.

[Brief explanation of drawings]

1st. ! firi, low-voltage gate The basics of the +14i''It pressure complementary MO8 inverter that can generate high-speed, high-voltage pulses manually, Figure 2 ta) + tb
) are the waves showing the relationship between the human input signal and the output pulse of the inverter, respectively, and Figure 43 is the integration diagram for realizing the east-horizontal structure of the high-forming complementary bucket MO8 inverter array according to the present invention. Withstand voltage rys08 Transistor and gate input capacitor/suno's nameless map, Figure 4 is an 11-way connection diagram showing the embodiment of the present invention (VC power), Figure 46 (heat)
, (b) A plan view showing an integrated Toyoko structure of a resistor and a capacitor for gate manpower, with a withstand voltage MO8) l . 2 are 4 withstand voltage Ng and PMO8) transistors respectively. 3.5 is a diode, 4 and 6 are resistors, 7r is a gate power capacitor, 8 and 9 are input and output terminals respectively, 19, 29.39 are integrated circuit elements, -10, 20, 3
0 is the source terminal of the integrated circuit element, 11.13, 15.1
? , 21, 23, 25° 27.31, 33, 35.37
are the gate input terminals of each transistor, 12, 14, 16
,114°22.24,26,28,32,34,36
゜38 is the drain terminal, 4G is the semiconductor substrate, and 41 is connected to the gate electrode II! 42 is an insulating layer, and 43 is a gold layer. Sai 1rg: J D O 2 Ro 73 Concave Spear 3 Illustration Sai 4 Four Skills f 5 Illustration CQ) (b) Procedural Amendment Form) 57.10.21 Showa Year Month Date Director General of the Patent Office Representation of Cases 1-6 1981 Patent Application No. 619
No. 93 No. 2, Title of the invention: High-voltage complementary WiMOB inverter array structure 3, Person making the amendment Relationship to the case: Applicant: 5-33-1-4 Shiba, Minato-ku, Tokyo, Attorney: Date of amendment order Showa S7, September 28th (shipment date) Kametori Masa's counterweight @ subscript with a simple explanation of the genus bacteria (1) @ subscript of the 12th summer, 16th line 1111611 (
a). (b)" should be corrected to "5m (a), (b) J. 1-cho 7' 1 patent attorney HARA 67.'" No +, -〆

Claims (1)

[Claims] N and P type high voltage withstand voltage m09) transistors are connected in parallel with VC, shunt resistor, and a diode oriented to hold the gate input voltage between the gate and the gate input voltage. M08), in an axial voltage complementary MOS inverter array consisting of a gate power capacitor t-series*M with a static voltage larger than the gate power capacity of the transistor,
The transistor 8 of each inverter, its Jd shunt resistor and diode are on the same semiconductor substrate, and the drive side transistor, the shunt resistor and diode, and the gate human power capacitor are on the same semiconductor. It is a 1-pressure complementary MUfl/Parter Frey sliding frame structure whose value is that it is formed on the substrate.゛