JPS584466A - Control system for storage constitution - Google Patents

Abstract

PURPOSE:To attain the mixture of memory units of different storage capacity arbitrarily without manual job such as setting, by providing a constitition information storage section generating unit selection information based on address information. CONSTITUTION:A constitution information storage section generating unit selection information is provided based on the address information from a controller. For example, address information 1 from the controller is set to a register 2 and an output signal of a memory unit address ADD1 is inputted to constitution information storage sections 7-9. Unit selection signals 13-15 are inputted to memory units 0-2 via OR circuits 10-12 from the constitition information storage sections 7-9 designated with the memory unit. An address ADD2 in the memory unit is inputted to the selected memory unit and processings such as processing of write data 6 and readout data 19 is performed with an address readout/write control signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the allocation of addresses to each memory unit in a storage device configured with a plurality of memory units, and specifically relates to the allocation of addresses to each memory unit in a storage device configured with a plurality of memory units. Allocating unique addresses is the key to controlling the configuration of storage devices.

In conventional storage devices, in order to allow memory units of different capacities to coexist, logic circuits and settings for decoding addresses are required, and resetting, etc. is required when replacing units. manual operation was required.

According to the present invention, it is possible to freely set the memory capacity of different storage capacities without requiring manual work such as purpose setting.
The purpose of the present invention is to provide a configuration control method for a storage device that allows the presence of Ik, and thereby makes it easy to replace a memory unit of any storage capacity with a failed memory unit when a failure occurs, and also allows the memory unit to By performing arbitrary address assignment, if a faulty memory unit occurs, it is possible to disconnect the faulty memory unit and reallocate addresses in a short period of time, reduce the storage device, and reconfigure the system. The purpose of this invention is to provide a possible storage device control method.

In order to achieve the above object, the present invention provides a storage device configured with a plurality of memory units based on address information from a control device, etc. It is equipped with a configuration information storage section that generates insect selection information, and a detection means for access exceeding the storage capacity of each unit, and generates selection information in the nuclear detection means, and detects the selection information. is stored in the skeleton configuration information storage section, and a desired memory unit is selected according to address information from a control device or the like.

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 1 is a configuration diagram of a storage device according to the present invention.

In the figure, UnltO-Unit2 is a memory z=it, 2-hiro address register, 7-9 are memory configuration information storage units, 10-12. 20 is a selection information write control circuit, and 21 is comparison data. Expand each signal line, l is address information, 5 (R/W) is read/write signal, 6 (WD) is write 16.1? , 18.19 (R
D) is read data, RAT is an initial setting signal, and 22 is a write enable signal.

In this example, three memory units) UnitO~
To explain the storage device configured by Unit2, address information from a control device (not shown) is divided into a memory unit address ADD1 and a memory unit internal address ADD2. Memory unit address A
The memory unit address can address the memory unit with the maximum capacity that can be implemented in the DD2til unit, and the memory unit address can address the memory unit with the minimum capacity.

First, in normal operation, when an access is made from a control device (not shown), address information 1 is set in register 2, and the memory unit address ADDI of the address information is input to ADD of the configuration information storage section 7.8.9. OR circuit 10 from the configuration information storage unit specified by the own memory gourd
．． A unit selection signal 13, 14 or 15 is output to the memory unit via 11 or 12, and one memory unit operates. Then, the internal memory unit address ADD2 is input to the selected memory unit, and the remaining layer of the write data 6, the read data 19, etc. are processed in accordance with the read/write control signal to the address of the memory unit.

Next, writing of the selection signal to the configuration information storage section 8.9 is carried out at the time of initialization when the system is powered on. First, set the unit setting signal 23°24.25 to 111
Then, select all memory units F and write any data pattern from address O in the memory unit to the maximum capacity. Next, select all of the ah items and write a data pattern different from other areas to address O. Writing to the memory units may be performed individually instead of all at the same time. Next, set only the unit 0 setting signal 23 to 11@ and set Unit 0 to
(address 0 in the memory unit) is sequentially read out. Every time reading is performed, a match is checked between the RDlG and the comparison data 21, and if they do not match, the configuration information storage 7
．． 8. Send a write signal to 9 and write each setting signal. However, when address 0 is selected, writing is performed unconditionally.

Note that the comparison data is the same as the data pattern written to address O. Do this step by step in this way, and R
When D19 and comparison data 21 match, omitting is not performed, and this time, only the unit setting signal 24 is set to wll, and the above-mentioned operation is performed, and all units are written to the configuration information storage. In this way, when an address bit that exceeds the storage capacity of each memory unit is designated, the address bit is overlooked, which is used to detect capacity over. Therefore, each configuration information storage section 7, 8.9 can determine the address range controlled by each unit among the addresses developed as consecutive addresses by each unit.

Furthermore, if the setting signal is specified, for example, 0.2 (Units) in sequence, it will be separated and processed as not being implemented. Therefore, a reduced storage device is constructed in unit 0.2. That is, it is also possible to configure the storage device using only arbitrarily selected memory units.

For example, in the table below, memory=, )Q, 1.2 are each 2KW
, IKW, and 2KW and the memory addresses are configured in this order.

The table address 12.11.10 is the upper 12 bits, 1 of the address information (13 bits) sent from the control device.
This is a 1-bit or 10-bit position or value.

That is, according to the information of address ADD1, each configuration storage section uses the signals in the table as selection signals 26(13), 27α4).

According to the present invention, the mounting state of each memory unit can be determined by one selection signal, and subsequent access processing is performed with the determined memory configuration. Automatic configuration and reconfiguration can be easily performed.

[Brief explanation of drawings]

The drawing is a configuration diagram of a storage device of the present invention. 2 Near address register, 7, 8, 9: configuration information storage section,
? 0: Selection information writing control circuit, 21: Comparison data, U
nitO, Unitl, Unit2: Mesori unit.

Claims (1)

[Claims] In a storage device configured with a plurality of messages s-=, ), a configuration information storage 11 generates unit selection information based on address information from a control device, etc.;
y) a detection means for an access having a storage capacity exceeding the storage capacity, the detection means generates unit selection information;
- Store the knit selection information in the panel configuration information storage section, and select the desired memo according to the address information from the control device, etc. A storage configuration control method characterized by selecting an enit.