JPS5843776B2 - Microprocessor operating status monitoring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention describes the operation of a control device using a microprocessor.
This invention relates to an operating state monitoring device for a microprocessor.

Microprocessors are used as the core of various control devices because of their digital arithmetic processing functions.

In this case, the microprocessor software executes control compensation calculations that were performed by conventional analog control circuits.

In such a device, it is difficult to monitor or adjust control performance by outputting part of the data of the control circuit to a recorder as in the past.

In other words, in order to make this possible, a configuration in which part of the program is outputted as a partial calculation result would result in a long program, which cannot be adopted in a system where processing time is an issue.

Furthermore, extra hardware is required as an input/output circuit, making the device expensive.

SUMMARY OF THE INVENTION An object of the present invention is to provide an operating state monitoring device for a microprocessor that can monitor the operating state without disturbing the control operations of the microprocessor.

The present invention has input means for specifying an address, and the contents of the data bus at the time when the contents match the address of the microprocessor are converted into an analog value and output.

Embodiments of the present invention will be described below with reference to the drawings.

The figure shows an embodiment in which the present invention is applied to a control device 1 whose main components are a microprocessor 2, ROM 3, and RAM 4.

The operating state monitoring device includes an address bus ABUS of the microprocessor 2, a data bus DBUS, a signal R/W for controlling whether to write or read the contents of the data bus into the ROM 3, RAM 4, or other external equipment, and a synchronization signal R/W. A buffer circuit 5 that takes in and amplifies the clock pulse signal φ as a signal, a switch circuit of the same number as the number of bits of the address bus, a coincidence circuit 7, an AND circuit 8, a latch circuit 9, and a DA that converts a digital value into an analog value. It is composed of a converter 10 and a display circuit 11.

Now, the microprocessor 2 operates according to the contents stored in the ROM 3, performs calculations and other processing, and functions as the control device 1.

During such an operation, the result of the operation is sent to RA.
M4# is stored or read.

This operation is called 5'i execution.

When the content of the address bus ABUS during execution is α, the deviation ε is sent to RA via the data bus DBUS.
M4) Assume that the following command is stored in ROM3.

It is assumed that the output As of the switch 6 indicates the value of α.

In this way, when the address bus ABUS reaches α while the microprocessor 2 is executing a control operation, the output AB of the buffer circuit 5 and the output As of the switch 6
The matching circuit γ detects that the values are equal to each other.

As a result, the output C0UT of the coincidence circuit γ becomes a level and becomes an input to the AND circuit 8.

On the other hand, from the buffer circuit 5, the microprocessor 2
The signal W for writing to AM4 and the clock pulse signal φ are input to the AND circuit 8, and when all become the level, the output TS of the AND circuit 8 becomes the level.

At the timing when this TS becomes the level, the output DB from the data bus DBUS at that time passed through the buffer circuit 5 is stored in the latch circuit 9.

The output LOUT of the latch circuit 9 is then transferred to the DA converter 10.
The signal is then converted into an analog value and becomes the output X, which is then displayed on the display circuit 11 in a visual manner.

In this way, each time the microprocessor 2 executes the operation of storing the deviation ε in the RAM 4, the value of the deviation ε can be outputted as an analog value X).

As a result, the movement of the deviation ε can be output to the recorder and monitored, and the numerical value can also be monitored.

Furthermore, various operations of the microprocessor 2 can be monitored by simply extracting address bus lines, data bus lines, and control signals, without changing any hardware or software.

Furthermore, another calculation result can be easily obtained as an analog value simply by changing the contents of the switch 6.

Although the present invention has been described only for the case where information from one location is monitored, it is clear that obtaining information from multiple locations can be carried out by using the necessary number of circuits shown in the figure. It is clear that this can also be realized by sharing the converter section.

[Brief explanation of drawings]

The figure is a block diagram showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Control device, 2...Microprocessor, 3.
...ROM, 4...RAM, 5...buffer circuit,
6... Switch, 7... Matching circuit, 8... AND circuit, 9... Latch circuit, 10... DA converter, 1
1...Display circuit.

Claims (1)

[Claims] 1 Microprocessor address bus, data bus,
a first input means for inputting a control signal and a clock signal;
a second input means for specifying an address;
the data bus at the time when the contents of the input means match the contents of the address bus obtained from the first input means at the time of execution of the microprocessor, and the control signal and the clock signal are in a predetermined state; An operating state monitoring device for a microprocessor, characterized in that the contents of the microprocessor are converted into analog values and output.