JPS5840983A - Synchronizing signal generating circuit of image pickup device - Google Patents

Abstract

PURPOSE:To stabilize a VCO frequency, by subjecting phase detection to an output obtained by frequency-dividing the outputs of the 1st and 2nd oscillators and then applying this output as the control voltage of either one of the two oscillators consisting of the VCO. CONSTITUTION:An output 2 of the 1st oscillator 1 which has an integer-fold value compared with the horizontal frequency of a TV signal is divided into 1/2 in frequency by a frequency divider. Thus a horizontal clock pulse is generated. On the other hand, the output 2 is divided into 644 parts by a frequency divider 5 and an output 6 is used to the input of one side of a phase detector 7. The 2nd oscillator 8 produces the secondary carrier wave. An output 9 is divided into 1/648 in frequency by a frequency divider 10, and an output 11 is used to the input of the other side of the detector 7. An output 12 is fed to the oscillator 8 in the form of the oscillating frequency control voltage 14 via a low pass filter 13. Thus the oscillating frequency of the oscillator 8 is stabilized.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a synchronization signal generation circuit for an imaging device using a solid-state imaging device.

Solid-state imaging devices photoelectrically convert light incident on the surface of the device using photoelectric conversion elements such as photodiodes arranged two-dimensionally on the surface of the device, or photoelectric conversion films coated on the surface of the device. It is an element that can read out optical information as an electrical signal by sequentially scanning an integral number of signal detection sections in the horizontal and vertical directions.

Therefore, in an imaging device using a solid-state imaging device (hereinafter referred to as a solid-state imaging device), in order to scan an integer number of signal detection units arranged in the horizontal direction and read out the signals sequentially, it is generally Kuro, Kubarusu (hereinafter referred to as horizontal Kuro, Kubarsu) with a repeating frequency that is an integer multiple of the horizontal frequency.
is used. Further, in a color one-type imaging device, a subcarrier pulse for color signal transmission is required. These pulses are generated by a synchronization signal generation circuit.

In the conventional NT80 type solid-state image sensor,
The frequency of the subcarrier is specified as 45V twice the horizontal frequency of the Chimpigene signal, and is generally 9V of the horizontal frequency.
It is generated by dividing the frequency of the reference clock t-4 by 10 times. In addition, horizontal black, Kubarsuha, 1/2 of the above reference clock
frequency is used. 910 times the horizontal frequency (approximately 14.! IMH2) or 18.
One 20 times (approximately 28.6 MHz) oscillator is provided. An oscillator with a frequency of this level or a branching unit to which it is connected can be realized using circuit elements such as those used in general household equipment.However, for example, in the PLA system adopted in European countries, , the frequency of the subcarrier is specified to be 709579/2500 times the horizontal frequency of the previsual signal, and the frequency of the subcarrier is set to be an integral multiple of the horizontal frequency as in the NT80 system. Generating subcarriers using 4! i! It is extremely difficult to use as a vessel.

The purpose of the present invention is to be compatible with the above-mentioned PAL system,
Another object of the present invention is to provide a synchronization signal generation circuit for a solid-state image sensor that can be easily realized as a consumer device.

The gist of the invention is to provide a first oscillation at a frequency that is an integer multiple of the horizontal frequency of a television broadcast signal, and a second oscillation at a frequency that is an integer multiple of the subcarrier frequency; It is composed of a so-called voltage controlled oscillator (hereinafter referred to as VOO) whose oscillation frequency is variable by an externally applied DC voltage, and generates horizontal black and white pulses for the solid-state image sensor from the first oscillator output, and generates the second oscillator output. At the same time, a subcarrier is generated from the first oscillator output tg & an output whose frequency is reduced to a fraction of -, and a second oscillator output whose frequency is reduced to a fraction of an integer are phase detected, and a phase detection output is generated. The synchronizing signal generating circuit is configured to stabilize the frequency of the VCO by applying it as a control voltage to one of the nine oscillators composed of VOO through a low-pass filter.

The present invention will be explained in detail using specific examples.

FIG. 1 is a block diagram showing one embodiment of the present invention. The present invention will be explained using a specific numerical example when applied to a PAL solid-state imaging device.

In Figure 1, 1 is the horizontal frequency of the television signal.
, 17 which is an integer (1128) times 15.625KHss
．． ．． It is a 625MHg oscillator. The output 2 of the oscillator 1 is divided by 2 by the frequency divider 3 to generate a horizontal clock pulse 4 of 8.8125 MHg.

On the other hand, the output 2 is frequency-divided by 644 by the frequency divider 5, and the frequency-divided output 6 is used as one input of the phase detector 7. Further, the oscillator 8 is a sophisticated oscillator for generating subcarriers, and is composed of VaO. The output 9 is frequency-divided by 648 by a divider 10 and is used as the other input of the output 11t-phase detector 7. Phase detection output 12
By inputting the oscillation frequency control voltage 14 to the oscillator 8 through the t-low-pass filter 13, a known face-lock loop circuit is constructed, and the oscillator frequency can be stabilized by 800.

In the above example, the oscillation center frequency of the oscillator 8; fs is fs """'
2 (MHz) 44, and the oscillation output is 9t - 4 by the frequency divider 15.
The frequency is divided to generate a subcarrier 16. At this time, the subcarrier center frequency ', flo is fsc = ``'' = 4.433618 (lJHz
). In the PAL system, the width carrier wave is 4.433
It is specified as 61875MHz, but the above 0.75H
A center frequency shift of about z does not pose a practical problem.

Moreover, the oscillation frequency fluctuation of the oscillator 1 or the frequency fluctuation due to the frequency control characteristics of the oscillator 8 can be easily suppressed to a level that causes no practical problems using current circuit technology.

Note that the oscillation frequencies of the oscillators 1 and 8 or the frequency division numbers of the frequency dividers 3, 5, 10, and 15 are not limited to the above numerical examples. For example, if the oscillator 1 has a frequency of about 17.625 MHz, the oscillator can be easily constructed using current so-called MO8I, 8M digital circuit technology, but due to the structure of the solid-state image sensor, the frequency is 8.8125 MHz! A four-phase horizontal clock pulse is required, and the oscillator 1 is 35.250M)
Even in cases where you want to oscillate with i, so-called TTL
It can be realized using circuit technology used in conventional consumer devices, such as by using elements. Moreover, when the horizontal clock pulse is two-phase, the oscillator 1 t-&8125
M- is oscillated, and this output 2 is inverted in polarity using an inverter circuit known in digital circuit technology, and the specific output is 2.
It is also possible to generate phase horizontal clock pulses,
In this case, the branching unit 3 becomes unnecessary, and the number of branches of the branching unit 5 is reduced to 3.
If it is set to 22, performance equivalent to that of the previous embodiment can be obtained.

FIG. 2 shows another embodiment of the invention in a schematic diagram. In the figure, parts having the same function as those in FIG. 1 are given the same numbers. The difference from the embodiment shown in FIG. 1 is that the oscillator 1, which has an integral multiple of the horizontal frequency, is composed of a VOO and is structured in the same way. Here, the oscillation frequency of the oscillator 8 for subcarrier generation is set to 17
．． If it is set to 754475 MHI and each branching value explained at the beginning of the explanation regarding FIG.
)48, and the horizontal frequency '*'He'<
Counting backwards from fH” 15.6250026 (KHz).PA
Compared to the specified horizontal frequency of 15.625KHz for the L method,
A frequency shift of the above degree does not pose a practical problem.

Furthermore, as in the explanation with reference to FIG. 1, the oscillation frequency of the oscillator 1.8 or the number of branch stations 65.5.10.15 are not limited to the above numerical examples.

As explained above, according to the present invention, a first oscillator for horizontal clock pulses and a second oscillator for subcarriers are provided, one of the oscillators is configured with a VCO, and the other oscillator is configured with a VCO. Since it is configured to apply frequency control using the oscillator output, the frequency stability is high, and a synchronization signal generation circuit for solid-state imaging devices that can be applied to the PAL system can also be easily realized for consumer equipment. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing an embodiment of the oil of the present invention. Code explanation 1: a first oscillator that oscillates at an integral multiple of the horizontal frequency;
4...Horizontal clock pulse, 5.10...Frequency divider,
7... Phase detector, 8... Second oscillator that oscillates at an integral multiple of the subcarrier frequency, 15... Low pass filter, 14
...Frequency control voltage. Representative Patent Attorney Susuki 1) Toshiyuki t'1 Figure

Claims (1)

[Claims] 1) a first oscillation means whose oscillation frequency is an integer multiple of the horizontal frequency of the television gene signal; and a horizontal scanning clock for a solid-state image sensor in an imaging device to which the oscillation output of the first oscillation means is input; means for generating and outputting the oscillation output of the first oscillation means as a synchronization signal; a second oscillation means,
The oscillation output of the second oscillation means is divided by an integer by IK@
low-pass filtering the output of the phase detection means that generates nine outputs according to the phase difference between the output signal of the tenth frequency dividing means and the output signal of the second frequency dividing means; and one of the first and second oscillation means is configured using a voltage-controlled token oscillator, and the oscillation frequency of the oscillation device configured with the voltage-controlled token oscillator is set to the lower oscillation frequency. By controlling using the output signal of the area filtering means, the first
1. A synchronization signal generation circuit for an imaging device, characterized in that the oscillation frequency of the oscillation means and the oscillation frequency of the second oscillation means are set in an integer ratio relationship.