JPS5838957B2 - Method for manufacturing through-hole printed wiring board - Google Patents

Method for manufacturing through-hole printed wiring board

Info

Publication number
JPS5838957B2
JPS5838957B2 JP2044876A JP2044876A JPS5838957B2 JP S5838957 B2 JPS5838957 B2 JP S5838957B2 JP 2044876 A JP2044876 A JP 2044876A JP 2044876 A JP2044876 A JP 2044876A JP S5838957 B2 JPS5838957 B2 JP S5838957B2
Authority
JP
Japan
Prior art keywords
hole
wiring board
etching
manufacturing
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2044876A
Other languages
Japanese (ja)
Other versions
JPS52102568A (en
Inventor
治 藤川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2044876A priority Critical patent/JPS5838957B2/en
Publication of JPS52102568A publication Critical patent/JPS52102568A/en
Publication of JPS5838957B2 publication Critical patent/JPS5838957B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 本発明は低価格でかつ簡易に高信頼性を得るスルーホー
ルプリント配線板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a through-hole printed wiring board that is inexpensive and easily obtains high reliability.

従来この種の配線板の製造方法としては、一般に両面銅
張積層板に所望の箇所に孔をあけ、その孔の内壁を含む
全面に化学メッキ及び又は化学メッキ後電気メッキなど
の方法により導通メッキを施し、次にスルーホールメッ
キした孔の内壁を保護すべく耐エツチング性を有する選
択的可溶性ワニス又はインク等により孔内を被覆又は充
填した後、前記基板の両面にエツチングレジストを所望
のパターンに形成させ、パターン以外の導電層をエツチ
ング除去した後、残存するエツチングレジスト膜を溶剤
にて剥離除去し、その後選択的溶剤にて可溶性保護材で
あるワニス又はインク等を除去する方法がある。
Conventionally, the manufacturing method for this type of wiring board is to drill holes at desired locations in a double-sided copper-clad laminate, and conductive plating is applied to the entire surface including the inner wall of the hole by a method such as chemical plating and/or electroplating after chemical plating. Then, in order to protect the inner wall of the through-hole plated hole, the inside of the hole is covered or filled with etching-resistant selectively soluble varnish or ink, and then etching resist is applied to both sides of the substrate in a desired pattern. There is a method in which the conductive layer other than the pattern is removed by etching, the remaining etching resist film is peeled off with a solvent, and then the soluble protective material such as varnish or ink is removed with a selective solvent.

さらに具体的には、例えば特公昭47−39672号、
特公昭49−26784号等の方法、並びにスルーホー
ルメッキした両面銅張基板に剥離紙又は離型性フィルム
等に感光性樹脂膜層を附着させたものを、前記基板の表
裏面に感光性樹脂膜層の側を導電層の面に貼着させて孔
部を閉塞した後、剥離紙又は壁型性フィルム等を取除い
てから露光処理により所望のパターンを形成させた後、
エツチング処理を行い、その後感光硬化したレジスト膜
を剥離してスルーホールプリント配線板を製造するなど
の方法として、特公昭46−3746号の方法が用いら
れていた。
More specifically, for example, Japanese Patent Publication No. 47-39672,
A method such as Japanese Patent Publication No. 49-26784, and a method in which a photosensitive resin film layer is attached to a release paper or a release film on a double-sided copper-clad board plated through holes, are coated with a photosensitive resin on the front and back surfaces of the board. After adhering the membrane layer side to the surface of the conductive layer to close the hole, removing the release paper or wall-type film, etc., and forming the desired pattern by exposure treatment,
The method disclosed in Japanese Patent Publication No. 3746/1983 was used to manufacture a through-hole printed wiring board by performing an etching process and then peeling off a photocured resist film.

しかしながら、前者の特公昭47−39672号、特公
昭49−26784号の方法は、孔内保護材としてワニ
ス又はインク等を用いるため使用材料が高価であるばか
りでなく孔内保護材の除去に際してアルコール、アルカ
リ液などの溶剤を高玉スプレィ等を用いて処理する必要
があり、特に多層板などの基板の厚みの犬なるものとか
孔径の小なるものは、ワニス、インク等の保護材の除去
が困難となる。
However, the former method of Japanese Patent Publication No. 47-39672 and Japanese Patent Publication No. 49-26784 uses varnish or ink as a hole protection material, which not only requires expensive materials, but also requires the use of alcohol when removing the hole protection material. , it is necessary to treat with a solvent such as alkaline liquid using a sprayer, etc., and it is difficult to remove protective materials such as varnish and ink, especially when the substrate is thick or has small pores such as multilayer boards. becomes.

更に孔内に保護材の残渣が微量でも残存すると有機物で
あるため半田付は時に残渣の分解ガスが発生し、スルー
ホール内の半田付は性を阻害し、スルーホールの信頼性
を著しく悪くする欠点を有していた。
Furthermore, if even a small amount of protective material residue remains in the hole, it is an organic substance, and decomposition gas from the residue is sometimes generated during soldering, which impedes soldering properties in the through-hole and significantly deteriorates the reliability of the through-hole. It had drawbacks.

一方後者の特公昭46−3746号の方法は、いわゆる
剥離紙又は離型性を有するドライフィルムに感光性樹脂
膜層を附着させたもので感光樹脂膜層の側を導電層の表
裏面に貼着させて孔部を閉塞した後、剥離紙又は離型フ
ィルムを取除くテンティング法と呼ばれる方法であり、
例えばリストン等を用いるので材料が極めて高価であり
、多量生産時にはコスト高となる。
On the other hand, the latter method, disclosed in Japanese Patent Publication No. 46-3746, involves attaching a photosensitive resin film layer to so-called release paper or a dry film with release properties, and the photosensitive resin film layer side is attached to the front and back surfaces of the conductive layer. This is a method called the tenting method, in which the release paper or release film is removed after the hole is closed.
For example, since Liston is used, the material is extremely expensive, and the cost becomes high when mass-produced.

また、孔とランドの差の少いものは孔位置の僅かのずれ
によりエツチング液に孔内にエツチング液が流入して孔
内壁の銅がエツチングされるのでスルホールの信頼度を
著しく悪くする欠点があった。
In addition, with a small difference between the hole and the land, a slight deviation in the hole position causes the etching liquid to flow into the hole, etching the copper on the inner wall of the hole, which significantly reduces the reliability of the through-hole. there were.

本発明は上記従来法の欠点を除去しかつ安価にして簡易
なる工程で高信頼性を得るスルーホールプリント配線板
を製造する方法を提供することを目的とするものである
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a through-hole printed wiring board that eliminates the drawbacks of the above-mentioned conventional methods and achieves high reliability through a simple process at low cost.

以下、本発明の製造方法の一例を図面に基いて工程順に
説明する。
Hereinafter, an example of the manufacturing method of the present invention will be explained in order of steps based on the drawings.

第1工程としての第1図は、両面銅張積層板に穿孔を施
したものであり、1は絶縁層、2は銅箔層、3は穿孔し
た貫通孔を示している。
FIG. 1, which shows the first step, shows a double-sided copper-clad laminate in which holes are drilled, and 1 indicates an insulating layer, 2 indicates a copper foil layer, and 3 indicates a drilled through hole.

第2工程としては、貫通孔を施した両面鋼張積層板の孔
部を含めた全面に導通を施すべく、例えば無電解による
化学銅メッキ及び又は無電解銅メッキの上に更に電気メ
ッキを施す等の周知の方法であり、第2図に示す如く導
通メッキを施したものであり、4はスルーホール内壁と
導通した銅メッキ層を示している。
In the second step, in order to provide conductivity to the entire surface of the double-sided steel-clad laminate including the holes, for example, electroless chemical copper plating and/or electroplating is applied on top of the electroless copper plating. This is a well-known method such as that in which conductive plating is applied as shown in FIG. 2, and numeral 4 indicates a copper plating layer that is electrically connected to the inner wall of the through hole.

第3工程は、スルーホールメッキした前記基板の孔内に
例えばシラス、硅藻土、粘土、泥土、土石、岩石等の粉
末を水を介して混合したる後、孔内に圧入にて充填又は
被覆してから乾燥後基板の表裏面に残留する無機質粉末
等をブラシ、パフ等を用いて除去する。
The third step is to mix powder such as whitebait, diatomaceous earth, clay, mud, clay, rock, etc. into the holes of the through-hole plated substrate through water, and then fill or fill the holes by press-fitting. After coating and drying, inorganic powder and the like remaining on the front and back surfaces of the substrate are removed using a brush, puff, etc.

第3工程は、第3図に示す。この図面において、5は無
機質粉末と水との混合物でこの粉末の粒径は細いものが
よく凡そ300メツシュ程度のものが望ましい。
The third step is shown in FIG. In this drawing, 5 is a mixture of inorganic powder and water, and the particle size of this powder is preferably fine and preferably about 300 mesh.

又水との混合比は重量比で1:0.5乃至1:l程度が
作業性が良好である。
Further, the mixing ratio with water is about 1:0.5 to 1:1 by weight for good workability.

第4工程は、スルーホール内に無機質粉末等の充填物又
は被覆物を保持した前記基板の両面の導電層に耐エツチ
ング性を有するエツチングレジストを、第4図の6に示
す如く所望の回路パターンに形成被着させる。
In the fourth step, an etching resist having etching resistance is applied to the conductive layers on both sides of the substrate, which holds a filler or coating such as an inorganic powder in the through hole, to form a desired circuit pattern as shown in 6 of FIG. Form and adhere to the surface.

このエツチングレジスト被着の方法としては耐エツチン
グ性インクをスクリーン印刷する方法。
The method for applying this etching resist is to screen print an etching-resistant ink.

又は感光性液状レジストを塗布し、必要部分を露光によ
り硬化現像させる方法が用いられる。
Alternatively, a method may be used in which a photosensitive liquid resist is applied and required portions are cured and developed by exposure.

第5工程としては、塩化第二鉄液等の安価なエツチング
液にてエツチングを行いレジスト膜によって被覆された
以外の銅の導電層を、第5図の如く溶解除去して回路部
を形成する。
In the fifth step, etching is performed using an inexpensive etching solution such as ferric chloride solution, and the copper conductive layer other than that covered by the resist film is dissolved and removed, as shown in Figure 5, to form a circuit section. .

第6エ程としては、回路部の上にはレジスト膜が被着し
ているためこのレジスト膜を有機溶剤等を用いて、第6
図に示す如く剥離する。
As the sixth step, since a resist film is adhered on the circuit part, this resist film is removed using an organic solvent or the like.
Peel off as shown in the figure.

最後に第7エ程としては、圧水の噴霧又は水中への浸漬
などの方法で基板の孔内を洗滌することで簡単に孔内の
無機質粉末等の充填物又は被覆物を除去することにより
、第7図に示す如く目的とするスルーホールプリント配
線板を得る。
Finally, in the seventh step, the inside of the hole of the substrate is cleaned by spraying with pressurized water or dipping in water to easily remove the filler or coating such as inorganic powder inside the hole. , the desired through-hole printed wiring board as shown in FIG. 7 is obtained.

本発明の製造方法によれば、スルーホールメッキした基
板の孔内にどこでも簡単に入手できる無機質粉末と媒体
として水を使用するだけで、孔内保護の充填又は被覆を
させるため従来法の有機質のワニス及びインク等にくら
べて極めて安価となり、有害性もなくワニス、インクな
どの如く濃度調整の必要もなく作業性が著しく向上する
According to the manufacturing method of the present invention, the hole of a through-hole plated substrate can be filled or covered with an inorganic powder, which is easily available anywhere, and water as a medium, instead of the conventional organic material. It is extremely inexpensive compared to varnishes, inks, etc., is not harmful, and unlike varnishes, inks, etc., there is no need for concentration adjustment, and workability is significantly improved.

またワニス、インク等で孔部を保護被覆する場合、基板
の表裏面に残ったワニス、インク等を研磨にて取除くが
本発明の方法においては、研磨の必要はなく無機質粉末
等であるのでブラシ、パフ等での除去でよ<、シかもワ
ニス、インク等の孔部保護材にくらべて乾燥後の孔部の
上下面での収縮が少く表裏面が平滑な基板としてエツチ
ングレゾストが均一に被着され、孔の肩の部分のレジス
ト切れが起るようなことはない。
In addition, when the holes are coated with varnish, ink, etc., the varnish, ink, etc. remaining on the front and back surfaces of the substrate are removed by polishing, but in the method of the present invention, polishing is not necessary and the inorganic powder is used. It can be removed with a brush, puff, etc. Compared to hole protection materials such as varnish and ink, there is less shrinkage on the upper and lower surfaces of the hole after drying, and the etching resin is uniform as a substrate with smooth front and back surfaces. There is no chance of resist breakage at the shoulder of the hole.

次に、エツチングに際して有機物の微量残渣が基板の導
電層上にあるとエツチングむらの起る心配があるが本発
明の方法はか\る危惧をすら念頭におくことなく作業す
ることが出来る。
Next, there is a concern that uneven etching may occur if a trace amount of organic residue is present on the conductive layer of the substrate during etching, but the method of the present invention can be operated without even considering such concerns.

本発明の方法における孔内保護材としての無機質粉末等
を水洗除去した後の廃液は、有機材料のワニス、インク
等と異なり処理が極めて容易で公害上や衛生上の設備の
必要もなく沈澱などの処理にて再生利用出来る利点があ
る。
In the method of the present invention, the waste liquid after removing inorganic powder, etc. as a pore protection material by washing with water is extremely easy to dispose of, unlike organic material varnishes, inks, etc., and there is no need for pollution or sanitary equipment, and it does not cause sedimentation. It has the advantage of being recyclable through processing.

又スルーホールフリント配線板上に部品の取付けを確実
にするための孔内の半田付は性はたとえスルーホール孔
内に残渣が微量残存しても無機質材であるため影響はな
く銅への化学作用も起らない。
In addition, soldering inside the holes to ensure the attachment of components on the through-hole flint wiring board is difficult. Even if a small amount of residue remains inside the through-hole, it will not affect the soldering process because it is an inorganic material and will not be chemically applied to the copper. No effect occurs.

以上の如く本発明の方法は、従来のこの種配線板の製造
方法の数ある欠点を克服し、極めて安価な材料の使用と
作業性の向上で短期間に確実性の高い製造方法により信
頼性の高いスルーホールプリント配線板の製造方法を可
能にしたものであり、設備の簡素化とコストの大巾低下
に寄与するものであって、極めて有用なものである。
As described above, the method of the present invention overcomes the many drawbacks of the conventional manufacturing method of this type of wiring board, and achieves reliability by using extremely inexpensive materials and improving workability in a short period of time and with a highly reliable manufacturing method. This makes it possible to manufacture a through-hole printed wiring board with high performance, and contributes to the simplification of equipment and a significant reduction in costs, making it extremely useful.

【図面の簡単な説明】 第1図〜第7図は本発明によるスルーホールプリント配
線板の製造方法の各工程の順序を説明する縦断面図であ
る。 上記図面において、 1は絶縁層、 2は銅箔層、 3は貫通孔、4は導通メッキ層、5は無機質粉末と水と
の混合物、6はエツチングレジストである。
BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 to 7 are longitudinal sectional views illustrating the order of each step of the method for manufacturing a through-hole printed wiring board according to the present invention. In the above drawings, 1 is an insulating layer, 2 is a copper foil layer, 3 is a through hole, 4 is a conductive plating layer, 5 is a mixture of inorganic powder and water, and 6 is an etching resist.

Claims (1)

【特許請求の範囲】[Claims] 1 スルーホール内壁および表裏面に導電性物質膜が被
着されている銅張積層基板の孔内に無機質粉末を水を介
在させて充填又は被覆し、これを乾燥した後、前記基板
表の裏面に残留する無機質粉末等を除去し、次に前記基
板表の裏面の導電性物質膜上に所望のパターンのエツチ
ングレジスト膜を被着し、露出せる導電性物質膜をエツ
チング除去した後、前記エツチングレジスト膜を溶剤に
より剥離除去した後、充填又は被覆せる無機質粉末等を
水洗し除去することを特徴とするスルーホールプリント
配線板の製造方法。
1. Fill or cover the holes of a copper-clad laminate board with a conductive material film coated on the inner wall of the through hole and on the front and back surfaces of the board with water interposed therebetween, and after drying this, After removing inorganic powder etc. remaining on the substrate, an etching resist film with a desired pattern is deposited on the conductive material film on the front and back surfaces of the substrate, and after etching away the exposed conductive material film, the etching resist film is removed. A method for manufacturing a through-hole printed wiring board, which comprises peeling and removing a resist film using a solvent, and then washing and removing inorganic powder, etc. to be filled or coated.
JP2044876A 1976-02-25 1976-02-25 Method for manufacturing through-hole printed wiring board Expired JPS5838957B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2044876A JPS5838957B2 (en) 1976-02-25 1976-02-25 Method for manufacturing through-hole printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2044876A JPS5838957B2 (en) 1976-02-25 1976-02-25 Method for manufacturing through-hole printed wiring board

Publications (2)

Publication Number Publication Date
JPS52102568A JPS52102568A (en) 1977-08-27
JPS5838957B2 true JPS5838957B2 (en) 1983-08-26

Family

ID=12027332

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2044876A Expired JPS5838957B2 (en) 1976-02-25 1976-02-25 Method for manufacturing through-hole printed wiring board

Country Status (1)

Country Link
JP (1) JPS5838957B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515704Y2 (en) * 1987-08-21 1993-04-26

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5595395A (en) * 1979-01-13 1980-07-19 Sony Corp Method of fabricating printed circuit board
JPS5615096A (en) * 1979-07-18 1981-02-13 Shindo Denshi Kogyo Kk Method of manufacturing film circuit board
JPS5626496A (en) * 1979-08-10 1981-03-14 Matsushita Electric Ind Co Ltd Method of manufacturing through hole printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515704Y2 (en) * 1987-08-21 1993-04-26

Also Published As

Publication number Publication date
JPS52102568A (en) 1977-08-27

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