JPS583787U - DC-DC converter circuit - Google Patents
DC-DC converter circuitInfo
- Publication number
- JPS583787U JPS583787U JP9650281U JP9650281U JPS583787U JP S583787 U JPS583787 U JP S583787U JP 9650281 U JP9650281 U JP 9650281U JP 9650281 U JP9650281 U JP 9650281U JP S583787 U JPS583787 U JP S583787U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- sub
- switching element
- transformer
- main
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dc-Dc Converters (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図A及び第1図Bはそれぞれ従来技術の回路図、第
2図はそれら6電圧・電流波形図、第3図は本考案の一
実施例を示す回路図、第4図はその各部の波形図、゛第
5図、第6図、第7図はそれぞれ本考案の他の実施例を
示す回路図である。
1・・・活流・平滑回路、2・・・パルス列発生回路、
; 5・・・整流回路、T□・・・主トランス、T2・
・・副トランス、Q□・・・主スイツチング素子、Q2
・・・副スイツチング素子。
メーFigures 1A and 1B are circuit diagrams of the prior art, Figure 2 is a diagram of the six voltage and current waveforms, Figure 3 is a circuit diagram showing an embodiment of the present invention, and Figure 4 is a circuit diagram of each of its parts. The waveform diagrams of FIG. 5, FIG. 6, and FIG. 7 are circuit diagrams showing other embodiments of the present invention, respectively. 1... Active current/smoothing circuit, 2... Pulse train generation circuit,
; 5... Rectifier circuit, T□... Main transformer, T2...
・・Sub-transformer, Q□・・Main switching element, Q2
... Sub-switching element. Baa
Claims (1)
続される主スイツチング素子と、主トランスの2次巻線
に接続さiる整流平滑回路と、主スイツチング素子を駆
動するパルス列発生回路と、主トランスの磁束をリセッ
トするりセット回路を備えたDC−DCコンバータ回路
において、リセット回路のコンデンサに対して並列に、
副トラレスの1次巻線と副スイツチング素子との直列回
路を接続すると共に、副トランスの2次巻線を整流回路
を介して負荷側に接続し、かつ、前記パルス列発生回路
により副スイツチン□ グ素子を主スイツチング素子と
同期して駆動するようにし、それによってリセット回路
のコンデンサに蓄積されるエネルギーを副スイツチング
素子と副トランスとによって2次側の負荷に放出させる
ようにしたDC−DCCコンパ−回路二2 副トランス
の1次巻線と副スイツチング素子との直列回路が、主ス
イツチング素手に対して□。 並列に組込まれている実用新案登録請求の範囲第1項記
載の回路。 3 副トランスの1次巻線と副スイツチング素子との直
列回路が、主、ト、、ランスの1次巻線に対して並列に
接続されている実用新案登録請求の範囲第1項記載の回
路。 4 副スイツチング素子は、主スイツチング素子よりも
オン時間が短かくされている実用新案登録請求の範囲第
1項記載の回路。[Claims for Utility Model Registration] 1. A main transformer, a main switching element connected in series to the primary winding of the main transformer, a rectifier and smoothing circuit connected to the secondary winding of the main transformer, and a main switching element connected in series to the primary winding of the main transformer. In a DC-DC converter circuit equipped with a pulse train generation circuit that drives a switching element and a reset circuit that resets the magnetic flux of the main transformer, in parallel to the capacitor of the reset circuit,
A series circuit of the primary winding of the sub-traless and the sub-switching element is connected, and the secondary winding of the sub-transformer is connected to the load side via a rectifier circuit, and the sub-switching element is connected by the pulse train generating circuit. This is a DC-DCC comparator in which the element is driven in synchronization with the main switching element, and thereby the energy stored in the capacitor of the reset circuit is released to the load on the secondary side by the sub-switching element and the sub-transformer. Circuit 22 The series circuit of the primary winding of the sub-transformer and the sub-switching element is □ with respect to the main switching bare hand. The circuit according to claim 1 of the utility model registration, which is incorporated in parallel. 3. The circuit according to claim 1, in which the series circuit of the primary winding of the sub-transformer and the sub-switching element is connected in parallel to the primary windings of the main, transformer, and transformer. . 4. The circuit according to claim 1, wherein the sub-switching element has a shorter on-time than the main switching element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9650281U JPS583787U (en) | 1981-06-29 | 1981-06-29 | DC-DC converter circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9650281U JPS583787U (en) | 1981-06-29 | 1981-06-29 | DC-DC converter circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS583787U true JPS583787U (en) | 1983-01-11 |
Family
ID=29891352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9650281U Pending JPS583787U (en) | 1981-06-29 | 1981-06-29 | DC-DC converter circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS583787U (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178964A (en) * | 1983-03-29 | 1984-10-11 | Mitsubishi Electric Corp | Chopper device |
JPS6225877A (en) * | 1985-07-26 | 1987-02-03 | Nippon Telegr & Teleph Corp <Ntt> | Snubber circuit |
JPS63302759A (en) * | 1987-05-29 | 1988-12-09 | Nemitsuku Ramuda Kk | Snubber circuit for switching power source |
JP2012147610A (en) * | 2011-01-13 | 2012-08-02 | Fujitsu Ltd | Dc-dc converter, power supply device and information processing apparatus |
WO2012111070A1 (en) * | 2011-02-14 | 2012-08-23 | 富士通株式会社 | Power factor correction circuit |
EP2884646A3 (en) * | 2013-12-13 | 2015-08-05 | LG Innotek Co., Ltd. | Multiple-output DC/DC converter and power supply having the same |
-
1981
- 1981-06-29 JP JP9650281U patent/JPS583787U/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178964A (en) * | 1983-03-29 | 1984-10-11 | Mitsubishi Electric Corp | Chopper device |
JPS6225877A (en) * | 1985-07-26 | 1987-02-03 | Nippon Telegr & Teleph Corp <Ntt> | Snubber circuit |
JPS63302759A (en) * | 1987-05-29 | 1988-12-09 | Nemitsuku Ramuda Kk | Snubber circuit for switching power source |
JP2012147610A (en) * | 2011-01-13 | 2012-08-02 | Fujitsu Ltd | Dc-dc converter, power supply device and information processing apparatus |
WO2012111070A1 (en) * | 2011-02-14 | 2012-08-23 | 富士通株式会社 | Power factor correction circuit |
JP5729395B2 (en) * | 2011-02-14 | 2015-06-03 | 富士通株式会社 | Power factor correction circuit |
US9166480B2 (en) | 2011-02-14 | 2015-10-20 | Fujitsu Limited | Insulation-type power factor correction circuit |
EP2884646A3 (en) * | 2013-12-13 | 2015-08-05 | LG Innotek Co., Ltd. | Multiple-output DC/DC converter and power supply having the same |
US9490708B2 (en) | 2013-12-13 | 2016-11-08 | Lg Innotek Co., Ltd. | Multiple-output DC/DC converter and power supply having the same |
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