JPS59178964A - Chopper device - Google Patents

Chopper device

Info

Publication number
JPS59178964A
JPS59178964A JP5559883A JP5559883A JPS59178964A JP S59178964 A JPS59178964 A JP S59178964A JP 5559883 A JP5559883 A JP 5559883A JP 5559883 A JP5559883 A JP 5559883A JP S59178964 A JPS59178964 A JP S59178964A
Authority
JP
Japan
Prior art keywords
capacitor
current
reactor
diode
current transformer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5559883A
Other languages
Japanese (ja)
Other versions
JPH0548069B2 (en
Inventor
Takeaki Asaeda
健明 朝枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5559883A priority Critical patent/JPS59178964A/en
Publication of JPS59178964A publication Critical patent/JPS59178964A/en
Publication of JPH0548069B2 publication Critical patent/JPH0548069B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/125Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M3/135Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To improve the efficiency by connecting a current transformer and a reactor to a discharging circuit of a snubber capacitor, and connecting the secondary side of the transformer to a power source side, thereby supplying the discharging current of the capacitor to the power source side. CONSTITUTION:When a gate signal is applied to a gate of a GTO12, the GTO12 is turned ON, and the discharging current of a capacitor 34 is flowed to the GTO12 by superposing on the current of a reactor 11 through a current transformer 36, a diode 37 and a reactor 17. The voltage induced in the secondary winding of the transformer 37 is applied through a diode 38 to a capacitor 19, and supplied to a load connected between DC output terminals P2 and N2. When the GTO12 is turned OFF, the capacitor 34 is charged by the current flowed to the GTO12. The energy of the reactor 11 charges the capacitor 19 and is supplied to the load.

Description

【発明の詳細な説明】 この発明は、自己消弧形スイッチング素子(以下自己消
弧形素子と称す)を使用して、直流入力電力を直流出力
電力に変換するチョッパ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a chopper device that converts DC input power into DC output power using a self-arc-extinguishing switching element (hereinafter referred to as a self-arc-extinguishing element).

従来のこの種のチョツノや装置としては第1図のものが
あった。図において、P 1 % Nlは正極、負極の
直流入力端子、P2、N2は正極、負極の直流出力端子
、11.17はリアクトル、12は自己消弧形素子であ
るダートターンオフサイリスク(以下GTOと称す)、
13はコンデンサ14、ダイオード15、及び抵抗16
から成るGTO’iサージ電圧から保護するスナバ−回
路、18はフライバックダイオード、19は平滑用コン
デンサである。
A conventional chotsuno or device of this type was the one shown in Figure 1. In the figure, P 1 % Nl is a positive and negative DC input terminal, P2 and N2 are positive and negative DC output terminals, 11.17 is a reactor, and 12 is a self-extinguishing element dirt turn-off switch (GTO). ),
13 is a capacitor 14, a diode 15, and a resistor 16
18 is a flyback diode, and 19 is a smoothing capacitor.

次に動作を第2図の波形図にエリ説明する。時刻t1 
 において、GTOl2のダートに第2図(a)のよう
にオン信号が印加されると、GT012がターンオンロ
、第2図(f)の直流入力電圧はりアクドル11に印加
され、リアクトル11に流れる電流は第2図(b)のよ
うに増加する。このとき、GT。
Next, the operation will be explained with reference to the waveform diagram in FIG. Time t1
When the ON signal is applied to the dart of GT012 as shown in FIG. 2(a), GT012 turns on, the DC input voltage as shown in FIG. 2(f) is applied to the accelerator 11, and the current flowing through the reactor 11 is It increases as shown in FIG. 2(b). At this time, GT.

12には、リアクトル11に流れる電流に重畳して、ス
ナバ−回路13のコンデンサ14の放電電流が抵抗16
を通して流れ、その電流波形は第2図(c)のようにな
る。またフライバックダイオード18がオンしている状
態でGTOl 2がターンオンすると、コンデンサ19
の電荷は、フライバックダイオード18の向きと逆方向
にリアクトル17全通ってGTOl2に放電するが、こ
の放電電流のdi/dt  ’!f軽減するために、リ
アクトル17が接続されている。次に時刻t2  にお
いてGTOI 2がターンオフすると、GTOl2に流
れていた電流はスナバ−回路13のダイオード15を通
り、コンデンサ14を充電する。このコンデンサ14の
充電が完了すると、リアクトル11のエネルギーはりア
クドル17及びフライバックダイオード18(第2図(
d))を通り、コンデンサ19を充電し、出力端子P 
2 、N 2間には第2図(e)の直流出力電圧が得ら
れる。
12, the discharge current of the capacitor 14 of the snubber circuit 13 is superimposed on the current flowing through the reactor 11, and the discharge current flows through the resistor 16.
The current waveform is as shown in Fig. 2(c). Also, when GTOl 2 is turned on while the flyback diode 18 is on, the capacitor 19
The electric charge passes through the entire reactor 17 in the direction opposite to the direction of the flyback diode 18 and is discharged to GTOl2, but this discharge current di/dt'! A reactor 17 is connected to reduce f. Next, when the GTOI 2 is turned off at time t2, the current flowing through the GTOI 2 passes through the diode 15 of the snubber circuit 13 and charges the capacitor 14. When charging of the capacitor 14 is completed, the energy of the reactor 11 is transferred to the accelerator 17 and the flyback diode 18 (see Fig. 2).
d)), charges the capacitor 19, and outputs the output terminal P.
2 and N2, the DC output voltage shown in FIG. 2(e) is obtained.

従来のチョツ・ぐ装置は上記のような構成であるので、
スナバ−回路13のコンデンサ14の放電電流がGTO
l 2に流れるため、GTOI 2はその電流変化に充
分耐えるものでなければならず、また、コンデンサ14
の電荷は抵抗16でほとんど消費されて損失となり、チ
ヨツ・ぐ装置の効率が悪いという欠点があった。
Since the conventional chotu-gu device has the above configuration,
The discharge current of the capacitor 14 of the snubber circuit 13 is GTO
GTOI 2 must be able to withstand the current change sufficiently, and the capacitor 14
Most of the electric charge is consumed by the resistor 16 and becomes a loss, resulting in a drawback that the efficiency of the switching device is low.

この発明は、上記従来装置のもつ欠点全除去し、自己消
弧形素子に流れる電流変化を少なくすると共に、スナバ
−回路のコンデンサ電荷全電源側に放電して装置の効率
を向上させること全目的とするものであり、その構成は
、スナバ−回路のコンデンサの放電回路に変流器とりア
クドル金接続し、変流器の2次側を電源側に接続するチ
ョッパ装置である。
The overall purpose of the present invention is to eliminate all of the drawbacks of the above-mentioned conventional device, to reduce changes in the current flowing through the self-extinguishing element, and to improve the efficiency of the device by discharging all of the capacitor charges in the snubber circuit to the power supply side. The configuration is a chopper device in which a current transformer is connected to the discharge circuit of the capacitor of the snubber circuit, and the secondary side of the current transformer is connected to the power supply side.

次に本発明の第1の実施例を第3図により説明する。図
において、33はダイオード35、コンデンサ34から
成るスナバ−回路、36は変流器、37.3Bはダイオ
ードで、その他の符号の構成は第1図のものと同一であ
る。
Next, a first embodiment of the present invention will be described with reference to FIG. In the figure, 33 is a snubber circuit consisting of a diode 35 and a capacitor 34, 36 is a current transformer, 37.3B is a diode, and the other symbols are the same as in FIG.

次にこの回路の動作を第4図の波形図により説明する。Next, the operation of this circuit will be explained using the waveform diagram shown in FIG.

時刻t1  において、第4図(a)のf−)信号がG
TOl2のダートに印加すると、GTOl2はターンオ
ンし、直流入力電圧(第4図(f))がリアクトル11
に印加され、リアクトル11の電流は、第4図(b)の
ように増加する。このとき、GTOI 2にはこの電流
に重畳してコンデンサ34の放電電流が、変流器36、
ダイオード37゜リアクトル17を介して流れる。変流
器36の2次巻線に誘起する電圧はダイオード38を介
してコンデンサ19に印加され、第4図(、)の電圧が
直流出力端子P2、N2間に接続される図示しない負荷
に供給される。コンデンサ35の放電電流はりアクドル
17により限流されてGTOl2に重畳するから、GT
Ol2に流れろ′電流は第4図(c)のようになり、G
TOl2のターンオン時に流れる電流の急変が回避され
る。
At time t1, the f-) signal in FIG. 4(a) becomes G
When applied to the dart of TOl2, GTOl2 is turned on and the DC input voltage (Fig. 4(f)) is applied to the reactor 11.
is applied to the reactor 11, and the current in the reactor 11 increases as shown in FIG. 4(b). At this time, the discharge current of the capacitor 34 is superimposed on this current in the GTOI 2, and the current transformer 36,
It flows through the diode 37° reactor 17. The voltage induced in the secondary winding of the current transformer 36 is applied to the capacitor 19 via the diode 38, and the voltage shown in FIG. be done. Since the discharge current of the capacitor 35 is limited by the accelerator 17 and superimposed on GT012, GT
The current flowing through Ol2 becomes as shown in Fig. 4(c), and G
A sudden change in the current flowing when TOl2 is turned on is avoided.

次に時刻t2  においてGTOl2がターンオフする
と、GTOl2に流れていた電流がダイオード35を介
してコンデンサ34を充電する。充電が完了すると、リ
アクトル11のエネルギーは、リアクトル17及びフラ
イバックダイオード18を通り、コンデンサ19を充電
すると共に図示しない負荷にも供給される。このように
して昇圧テヨツノ母動作が行なわれる。このときりアク
ドル11及び17にはコンデンサ19の電圧(直流出力
電圧〕と直流入力電圧の差電圧が印加され、リアクトル
11の電流は減少する。壕だ、リアクトル17に印加さ
れる電圧極性はダイオード35.37に対して逆方向に
なるから、変流器36、コンデンサ34へは流れない。
Next, when GTOl2 is turned off at time t2, the current flowing through GTOl2 charges the capacitor 34 via the diode 35. When charging is completed, the energy of the reactor 11 passes through the reactor 17 and the flyback diode 18, charges the capacitor 19, and is also supplied to a load (not shown). In this way, the boost operation is performed. At this time, the voltage difference between the voltage of the capacitor 19 (DC output voltage) and the DC input voltage is applied to the actuators 11 and 17, and the current of the reactor 11 decreases. Since it is in the opposite direction to 35.37, it does not flow to the current transformer 36 and capacitor 34.

第5図は本発明の第2の実施例で、第3図の実施例にお
けるリアクトル17會、GTOl2に対し直列に接続し
たもの(リアクトル57)である。
FIG. 5 shows a second embodiment of the present invention, in which the reactor 17 in the embodiment of FIG. 3 is connected in series with GT012 (reactor 57).

GTOl 2がターンオンするときには、コンデンサ3
4の放電電流が変流器36、ダイオード37、リアクト
ル57を介・してGTOI 2に流れ、その電流は限流
される。次にGTOI 2’にターンオフした後にコン
デンサ34が充電を完了すると、リアクトル5Tのエネ
ルギーはダイオード35、変流器36、ダイオード31
を介して流れ、このときも変流器36の2次巻線からコ
ンデンサ19及び負荷に供給される。
When GTOl 2 turns on, capacitor 3
A discharge current of 4 flows through the current transformer 36, the diode 37, and the reactor 57 to the GTOI 2, and the current is current limited. Next, when the capacitor 34 completes charging after being turned off to GTOI 2', the energy of the reactor 5T is transferred to the diode 35, the current transformer 36, and the diode 31.
The current flows through the current transformer 36 and is also supplied to the capacitor 19 and the load from the secondary winding of the current transformer 36.

第6図は本発明の第3実施例で、第3図の実施例におい
て変流器36の2次巻線に中間タツノ金設けたもので、
変流器66の2次端子8a、8bをダイオード68a、
68bf、H介してコンデンサ19(直流出力端子Pz
 )に接続し、中間タップ端子8cを直流出力端子N2
に接続する。GTOl2がターンオンしたときのコンデ
ンサ34の放電電流は交流器66を流れ、2次端子8a
に接続したダイオード68ai通してコンデンサ19及
び負荷に流f1−る。コンデンサ34の放止、電流が零
になり、変流器66の励磁電流が減少するときには、変
流器66の2次端子sb、ae間に誘起した電圧はダイ
オード68bを介してコンデンサ19及び負荷に供給さ
れる。
FIG. 6 shows a third embodiment of the present invention, in which an intermediate tatsuno metal is provided in the secondary winding of the current transformer 36 in the embodiment of FIG.
The secondary terminals 8a and 8b of the current transformer 66 are connected to a diode 68a,
68bf, capacitor 19 (DC output terminal Pz
) and connect the intermediate tap terminal 8c to the DC output terminal N2.
Connect to. When GTOl2 is turned on, the discharge current of the capacitor 34 flows through the alternator 66 and is connected to the secondary terminal 8a.
The current f1- flows through the diode 68ai connected to the capacitor 19 and the load. When the capacitor 34 is released, the current becomes zero, and the excitation current of the current transformer 66 decreases, the voltage induced between the secondary terminals sb and ae of the current transformer 66 flows through the diode 68b to the capacitor 19 and the load. supplied to

上記各実施例では、自己消弧形素子としてGTOを用い
て説明したが、トランジスタ、静電誘導形トランジスタ
(SIT)、5ITH,MOSFETを用いることもで
きろ。1だ、直流入力TkjJXと負荷間に上記のよう
なテヨツノや装置を多数並列接続して多重ナヨツノ9構
成にしてもよい。さらに、直流電源の正極側の母線にリ
アクトル11.17、ダイオード18を接続したもの金
示したが、負極側母線に接続してもよい。変流器36.
66の2次側出力を直流入力電源側あるいは別の直流電
源に・  接続してもよい。
In each of the above embodiments, GTO is used as the self-extinguishing element, but a transistor, static induction transistor (SIT), 5ITH, or MOSFET may also be used. 1. A large number of devices such as those described above may be connected in parallel between the DC input TkjJX and the load to form a multiplex configuration. Furthermore, although the reactor 11, 17 and the diode 18 are shown connected to the positive side bus of the DC power source, they may be connected to the negative side bus. Current transformer 36.
The secondary output of 66 may be connected to the DC input power supply side or to another DC power supply.

以上説明したように、本発明は、チョッパ装置における
スナバ−回路のスナバーコンデンザの放の2次側を電源
側に接続したから、スナバ−コンデンサの放電電流が′
電源側に供給さノー1.るのでチョッパ装置としての効
率が向上すると共に、自己消弧形スイッチング素子へ流
れるスナバ−コンデンサの放電電流が限流されるから、
自己消弧形スイッチング素子に流れる電流の急変化が抑
制されるという効果がある。
As explained above, the present invention connects the discharge secondary side of the snubber capacitor of the snubber circuit in the chopper device to the power supply side, so that the discharge current of the snubber capacitor is
No 1. No power supplied to the power side. This improves the efficiency of the chopper device, and limits the discharge current of the snubber capacitor flowing to the self-extinguishing switching element.
This has the effect of suppressing sudden changes in the current flowing through the self-extinguishing switching element.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のチョッパ装置の回路図、第2図は第1図
の動作波形図、第3図は本発明の第1実施例の回路図、
第4図は第3図の動作波形図、第5.6図は本発明の他
の実施例の回路図である。 P I % Nl・・・・・・直流入力電源端子P2、
NZ・・・・・・直流出力端子 11.17.57・・・・・・リアクトル12・・・・
−・GTO13,33・・・・・・スナバ−回路14.
34・・・・・・スナバ−コンデンサ19・・・・・・
平滑コンデンサ 36.66・・・・・・変流器 なお、図中、同一符号は同−又は相当部分を示す。 代理人    葛   野   信   −tl   
t2tl   t2
FIG. 1 is a circuit diagram of a conventional chopper device, FIG. 2 is an operation waveform diagram of FIG. 1, and FIG. 3 is a circuit diagram of a first embodiment of the present invention.
4 is an operational waveform diagram of FIG. 3, and FIG. 5.6 is a circuit diagram of another embodiment of the present invention. P I % Nl...DC input power supply terminal P2,
NZ...DC output terminal 11.17.57...Reactor 12...
-・GTO13,33...Snubber circuit 14.
34...Snubber capacitor 19...
Smoothing capacitor 36.66...Current transformer In the drawings, the same reference numerals indicate the same or equivalent parts. Agent Shin Kuzuno -tl
t2tl t2

Claims (1)

【特許請求の範囲】[Claims] 直流入力電源にリアクトルと自己消弧形スイッチング素
子を直列接続し、該自己消弧形スイッチング素子に並列
に、ダイオードとスナバ−コンデンサの直列回路を接続
したチョツzJ?装置において、該スナバ−コンデンサ
の放電回路に変流器とりアクドルを接続し、該変流器の
2次側全電源側に接続したことを特徴とするチヨ“ツ・
ぞ装置。
A reactor and a self-arc-extinguishing switching element are connected in series to a DC input power source, and a series circuit of a diode and a snubber capacitor is connected in parallel to the self-arc-extinguishing switching element. In the device, a current transformer handle is connected to the discharge circuit of the snubber capacitor, and the current transformer is connected to the entire secondary power source side of the current transformer.
A device.
JP5559883A 1983-03-29 1983-03-29 Chopper device Granted JPS59178964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5559883A JPS59178964A (en) 1983-03-29 1983-03-29 Chopper device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5559883A JPS59178964A (en) 1983-03-29 1983-03-29 Chopper device

Publications (2)

Publication Number Publication Date
JPS59178964A true JPS59178964A (en) 1984-10-11
JPH0548069B2 JPH0548069B2 (en) 1993-07-20

Family

ID=13003204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5559883A Granted JPS59178964A (en) 1983-03-29 1983-03-29 Chopper device

Country Status (1)

Country Link
JP (1) JPS59178964A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0418545A2 (en) * 1989-09-22 1991-03-27 Transtechnik Gmbh Electrical switch-off snubber circuit for a controllable semiconductor switch

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583787U (en) * 1981-06-29 1983-01-11 富士電気化学株式会社 DC-DC converter circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583787B2 (en) * 1976-07-01 1983-01-22 住友金属工業株式会社 How to change slab width during continuous casting

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583787U (en) * 1981-06-29 1983-01-11 富士電気化学株式会社 DC-DC converter circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0418545A2 (en) * 1989-09-22 1991-03-27 Transtechnik Gmbh Electrical switch-off snubber circuit for a controllable semiconductor switch

Also Published As

Publication number Publication date
JPH0548069B2 (en) 1993-07-20

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