JPS5837266U - Image quality adjustment circuit - Google Patents

Image quality adjustment circuit

Info

Publication number
JPS5837266U
JPS5837266U JP13275081U JP13275081U JPS5837266U JP S5837266 U JPS5837266 U JP S5837266U JP 13275081 U JP13275081 U JP 13275081U JP 13275081 U JP13275081 U JP 13275081U JP S5837266 U JPS5837266 U JP S5837266U
Authority
JP
Japan
Prior art keywords
delay line
image quality
quality adjustment
adjustment circuit
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13275081U
Other languages
Japanese (ja)
Inventor
敦志 松崎
磯辺 敏信
川俣 光雄
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP13275081U priority Critical patent/JPS5837266U/en
Publication of JPS5837266U publication Critical patent/JPS5837266U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の垂直アバーヂャ補正回路を示すブロック
図、第2図ないし第4図はその動作原理の説明に供する
路線図及び信号波形図、第5図は第1図の具体的構成を
示す接続図、第′6図は本考案に依る画質調整回路の一
例を示す接続図である。 1・・・映像信号源、2.3・・・1水平期間遅延回路
、4A〜4C・・・サブキャリア除去用フィルタ、5A
〜5C・・・定数回路、6・・・加算回路、7・・・出
力調整回路、8・・・加算器、15・・・遅延線、16
A〜16C・・・トランスバーサルフィルタ部、17・
・・前置増幅用トラ、ンジスタ、18A〜18C・・・
入力回路部、22・・・直流阻止用コンデンサ、65・
・・基準電圧発生回路。− 「1 2伯り 第h−図 〜−十 ψ4 朝 !Fl 1m IIFlb@ J)
Figure 1 is a block diagram showing a conventional vertical average correction circuit, Figures 2 to 4 are route diagrams and signal waveform diagrams to explain its operating principle, and Figure 5 shows the specific configuration of Figure 1. Connection diagram FIG. 6 is a connection diagram showing an example of an image quality adjustment circuit according to the present invention. 1... Video signal source, 2.3... 1 horizontal period delay circuit, 4A to 4C... Subcarrier removal filter, 5A
~5C...Constant circuit, 6...Addition circuit, 7...Output adjustment circuit, 8...Adder, 15...Delay line, 16
A~16C... Transversal filter section, 17.
・Pre-amplification tiger, resistor, 18A to 18C...
Input circuit section, 22... DC blocking capacitor, 65.
...Reference voltage generation circuit. - "1 2 H-Figure ~-10ψ4 Morning! Fl 1m IIFlb @ J)

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 映像信号を順次遅延させて複数の遅延映像信号を作り、
各遅延映像信号を前置増幅用トランジスタをそれぞれ有
する入力回路部を介してサブキャリアを除去する定数を
もつ遅延線を有する複数のトランスバーサルフィルタ部
にそれぞれ与え、この複数のフィルタ部の出力を合成す
ることによって上記映像信号に輝度の変化が生じるごと
にプロシュートもしくはオーパージ五−ト波形をもつ映
像処理信号を得るようになされた画質調整回路において
、上記入力回路部の上記前置増幅用トランジスタの出力
端と上記遅延線の入力端との間に直流阻止用コンデンサ
を介挿すると共に、上記遅延線の他端に基準電圧発生回
路の基準電圧を接続することを特徴とする画質調整回路
The video signal is sequentially delayed to create multiple delayed video signals,
Each delayed video signal is applied to a plurality of transversal filter sections each having a delay line having a constant for removing subcarriers via an input circuit section each having a preamplification transistor, and the outputs of the plurality of filter sections are synthesized. In the image quality adjustment circuit, the output of the preamplification transistor of the input circuit section is configured to obtain a video processing signal having a prosciutto or overage pentagram waveform every time a change in brightness occurs in the video signal. An image quality adjustment circuit characterized in that a DC blocking capacitor is inserted between one end of the delay line and an input end of the delay line, and a reference voltage of a reference voltage generation circuit is connected to the other end of the delay line.
JP13275081U 1981-09-07 1981-09-07 Image quality adjustment circuit Pending JPS5837266U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13275081U JPS5837266U (en) 1981-09-07 1981-09-07 Image quality adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13275081U JPS5837266U (en) 1981-09-07 1981-09-07 Image quality adjustment circuit

Publications (1)

Publication Number Publication Date
JPS5837266U true JPS5837266U (en) 1983-03-10

Family

ID=29926264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13275081U Pending JPS5837266U (en) 1981-09-07 1981-09-07 Image quality adjustment circuit

Country Status (1)

Country Link
JP (1) JPS5837266U (en)

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