JPS5836041A - Interference prevention system for time division multidirectional multiplex communication - Google Patents

Abstract

PURPOSE:To prevent interference with subordinate station data at a master station by stopping transmission from a subordinate station when a fault such as a step out, etc., occurs to a transmitted signal from the subordinate station. CONSTITUTION:Output monitoring data (clock signal) from a receiving logical operation circuit 9 is supplied to one input of a step-out detecting circuit 22, and the output frame signal of a frame signal regenerating circuit 12 is supplied to the other input. When both signals differ in generation timing, a step-out signal is generated and applied to an OR circuit 21. On the basis of the frame signal, a transmission timing signal is generated and supplied to one input of a comparing circuit 26. Further, the transmission timing signal is generated from a transmitted signal inputted to an antenna 1 and supplied to the other input of the comparing circuit 26. When both signals differ in timing, the comparing circuit 26 generates and inputs a timing difference signal to the OR circuit 21. On the basis of an output signal of the OR circuit 21, the transmission of the subordinate station is stopped.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for preventing interference when a failure occurs in a slave station in a time division multiplex time division multidirectional communication system.

Generally, a time division multiplex time division multidirectional communication system in which a number of slave stations 61 to 8n transmit data to a master station M has a one-way configuration as shown in FIG.

Figure 2(a) shows the master station M in such a communication system.
This shows the received data Ml). Each slave station S,
The data SD1 to 5Dn from ~8n constitute a frame of the received 1d data MD, and therefore, the data of the same slave station is transferred to the received data M every time the frame repeats synchronization Tf.
Hail to D.

Further, FIG. 2(C) shows the data transmission timing of the slave stations S, , S, respectively.

At this point, the master station M sends monitoring data containing a clock signal for time division control and a frame signal indicating the beginning of each frame in the received data MD to each of the slave stations B□ to 8n. On the other hand, each slave station B1 to Sn transmits its own data to the master station M at an interval of the frame repetition period MTf based on the Glock signal and frame signal from the master station M. Data 5DK-8Dn are sent out at different timings so that they can be received in the II order shown in (a).

FIG. 3 shows a conventional example of such a slave station device. The signal number ST of the master station M, which was manually operated by Kikachutan 1, is
to the frequency converter 3 via the antenna common 42;
It is mixed with the output of the receiving local oscillator 40 and changed to the same wave number.

The signal 8T, which has been converted to the same number, passes through the intermediate frequency filter 5 to become a signal with a predetermined wave number, is amplified via the intermediate frequency amplifier 6, and is demodulated by the synchronization detector 7 to generate the multiplex supervisory signal EIPK. be done.

The fertility monitoring signals S and P are -clock signal regeneration circuit 8
8 and receiver processing circuit 9.

The clock signal regeneration circuit 8 synchronously regenerates the clock signal OF from the fertility monitoring signal 81', and the clock 15 op is applied to the love logic circuit 9, the time division signal generation circuit 10, and the transmission logic circuit 11.

The reception logic circuit 49 performs the necessary processing on the fertility monitoring signal SP in synchronization with the clock signal CP, and the processing result is applied as monitoring data DP to the frame signal reproducing circuit 12 and at the reception output terminal. 13 to the next stage circuit.

The frame signal reproducing circuit 11 synchronously reproduces the frame signal FP from the monitoring data DP(3), and determines whether the frame signal?
P is a time division pulse generation circuit lO and a transmission logic circuit 11
added to.

Time-division signal generation (2) path lO generates a time-division signal TP for determining the timing of data inclusion based on the clock signal apd and frame signal yPK, and generates the time-division signal TP.
is added to the transmission gate circuit 19.

At once, transmission data TD is applied to the transmission logic circuit 11 from the transmission input terminal 14 . The transmission logic circuit 11 executes a predetermined calculation based on the transmission data TD in synchronization with the clock signal opg and the frame signal FP. is applied to a digital modulator 16VC and modulated by the output of the superstition local oscillation 17 to form a modulated transmission signal TS. The modulated transmission signal T8 is amplified at a predetermined amplification factor via an amplifier 18, and then applied to a transmission gate circuit 19.

The transmission 1 cogate circuit 19 outputs the modulated transmission signal T8 at the timing when the time division 100 TP is selected. Main station M
K is included.

By the way, the conventional slave station device VCS having the above-mentioned configuration has a frequency converter, a reception local oscillator, an intermediate frequency filter, an intermediate frequency filter, an M inverter, and a frequency converter. Superstition 1n is caused by an abnormality in the receiving thread consisting of 100 logic circuits iK, an abnormality in the timing signal generation system consisting of the clock signal regeneration circuit, frame signal regeneration circuit S and time division signal generation circuit, or an abnormality in the transmission gate circuit.
If the data of the abnormal slave station is received by the master station, the position of the abnormal slave station data in the frame structure of the received data of the master station will be shifted. However, there was a problem in that normal communication was interfered with due to data from other slave stations.

The present invention has been made in order to solve the above-mentioned problems, and provides an interference prevention method in time-division multi-power and multi-power multi-direction systems that prevents interference caused by abnormal slave station data. be.

According to the present invention, based on the transmission timing of the actual transmission signal and the frame signal obtained by detecting the out-of-synchronization of the clock signal and frame signal and re-detecting the included 1g signal, Interference at the master station is prevented by comparing the transmission timing with the formed reference transmission timing and adjusting the transmission of the transmission signal based on the out-of-synchronization detection output or the comparison output.

Hereinafter, the present invention will be described in detail based on embodiments shown in the accompanying drawings.

FIG. 4 shows an example of an interference prevention formula in time division multiplexing and time division multiplex communication according to the present invention. The output polyvoltage monitoring signal sp of the synchronous transverse transducer 7 is the out-of-synchronization detection circuit 2.
In addition, the output clock signal OP of the clock signal regeneration circuit 9 is added to the manual power of the out-of-synchronization detection circuit 20. The out-of-synchronization detector 20 is a multi-monitor Ol
The clock component in the signal SPK and the clock signal OP are compared, and if the timing of their occurrence is different, an out-of-synchronization signal S1 is formed, and the out-of-synchronization signal S1 is generated in the OR circuit 1li.
This will add to the strength of i521.

The output monitoring data DP of the reception logic circuit 8 is controlled by the out-of-synchronization detection circuit 22, and the output frame signal FP of 612 is controlled by the out-of-synchronization detection circuit 22 during the reproduction of the 7L/-muqm number. added to. The out-of-sync detector 20 detects the frame signal component of the monitoring data DB and the frame signal F.
A synchronized out-of-sync signal 82ft having a different generation timing is generated by comparing the out-of-sync signal 8.P. is attacked by the power of others in OR Circuit 21.

Further, the frame signal FP is added to the reference bond generation a23. The reference signal generator 23 generates a superstition timing reference signal HP based on the frame/outside FPK, and the reference signal HP is determined by the comparator circuit 26 alone.

First, a directional coupler 24 is disposed between the antenna 1 and the common antenna 'a24. The directional coupler 24 branches the transmission signal TS, and the branched signal 100 becomes the transmission signal T8'
The signal is added to the detector 25 as a signal. The detector 25 detects the transmission signal T' to form a transmission timing TT, and the transmission timing signal TT is added to the comparator circuit 26.

Comparison episode lol! r26 is the reference signal HP and transmission timing T
A timing abnormality signal S is completely formed in accordance with the phase shifter of both signals, and the timing abnormality signal 8□ is further added to the OR circuit 21 by other human power.

The output of the OR circuit 21 is
AND circuit 270 to which an output time division signal TP of 0 is added
This causes the AND circuit 27 to become inactive and the time division signal TP to be sent to the transmission gate circuit 19.

8. Since the other parts are the same as the apparatus shown in FIG. 1, the same parts are given the same reference numerals and the explanation will be omitted.

Therefore, when the synchronization regeneration operation of the clock signal regeneration circuit 8 becomes erroneous and the clock component of the Tasada Kikkyo No. 16 8P is out of synchronization with the clock signal CP, the out-of-synchronization detection circuit 20 detects the out-of-synchronization signal S. This causes the AND circuit 27 to become inactive, and the transmission gate circuit 19 to output the transmission signal TS.

Furthermore, when the frame signal component of the monitoring data DP and the frame signal FP become out of synchronization due to an abnormality in the synchronized reproduction operation of the frame No. 1M Niu circuit 12, the out-of-synchronization detection circuit 2
0 forms the same W'' out signal, which causes AND times w! r27 is made inactive, and the operation of outputting the transmission signal TEI by the transmission gate circuit 19 is prohibited.In this way, most of the timing signal generation system is activated by the clock signal regeneration circuit 8 or the frame signal 6 generation circuit 12. If it becomes abnormal, the output of the transmission 1 signal T8 is output, and therefore, interference to the master station M is prevented.

5 and 6 show specific examples of the reference signal generator 23 and comparison circuit 26, respectively, and FIG.
The figure shows the superstition abnormality detection operation by the comparator circuit 26.

The delay circuit 23a delays the manually input signal by a predetermined time T1 and outputs it. The 1d FF is converted into a delayed signal F P' (Fig.
available.

Nojoda multi-vibrator 23 bid%i%tF" is
When the signal is turned on, a 2 1δ signal 11P (Fig. 7 (h)) is generated with a predetermined pulse width, and the signal is converted into a reference signal HP (Fig. 7 (1)) via an inverter 23Q. The reference signal HP is applied to a comparison circuit 26.

l, delay time σIrl: is set corresponding to the time from the output of the frame signal B'P until the output of the 1H data TS sent from Nitchu-1, and the delay time σIrl:
(P pulse @T:2 is set to 16 times the data length of the transmission data TS.

The transmission 1d timing 1M+3 which is the transverse wave output of the wave combiner 25
fTT (Fig. 7 (θ) is a sword []
Timing TT when the shaping was omitted (Fig. 7(f))
), the timing 1B T T' is input to the AND circuit 26bv)-input.

- force, the reference signal UP is added to the other power of the AND circuit 26b, and when J6 is added, the AND circuit Mi26L' is created, and the base $ signal HP (<Yupeek*', 1 temple circuit 260 is told.

The beak protection circuit 26C holds the output of the AND circuit 26b for a certain period of time Ifr, and the hold output is connected to the OR circuit 21 as timing A and I'm angry at Circuit 27's legal strength.

When the C1 slave station device is normal, the time and minute of pulse 1 T corresponding to the data length of the superstition signal TE+ is synchronized with the clock signal ap (FIG. 7(a)), N and frame signal FP. The printing signal TP (Fig. 7 (C)) is Hmm 1; 49 F
It is applied to the transmission gate circuit 19 after a predetermined time T1 from P, thereby sending out the transmission signal TS. At this time, the transmitted signal TS is divided (1l), and the transmitted timing signal TT, which can be received by detecting the transmitted signal TS' (FIG. 7(d)), is processed by the AND circuit using the waveform-shaped timing signal TT'. 26+) is a low level signal when the signal 26+) is activated, the peak holding circuit 26G does not operate, and the timing abnormality 1M is not generated.

The g1 hour time is set in accordance with the reception pressure of the station data at the master station M, and is set so that the pulse width T2 and the pulse width are T2 (f2).

By the way, for example, if an abnormality occurs in the time-division signal generation circuit 10, the time-division signal TP becomes shorter than the frame signal FP by time 'r.
s'(>TI) If it is output, the operation of the transmission gate circuit 19 will be delayed by the time (T, -'i°θ. Therefore, the AND circuit 2 will be delayed by the timing signal TT'.
61) is activated, the reference signal HP is a partially high level signal, and the peak*h circuit 26 is activated, causing the timing difference layer No. 1g S.

is formed rL , which makes the AND rotation i@27 non(
12) The output operation of the transmission signal TS by the superstition gate circuit 19 is stopped.

In this way, when the output timing of the transmission signal TS becomes abnormal, the transmission of the transmission signal TS is stopped, and confusion at the master station is prevented.

As explained above, according to the present invention, when an abnormality occurs in the timing signal generation system or when the transmission timing of the superstition signal becomes abnormal, the transmission of the transmission signal is prohibited or the abnormality occurs. Interference that occurs when slave station data is superimposed with other slave station data at the master station can be prevented.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the circuit configuration of the time-division multiplex time-division multiplex communication system, and Figure 2(a) is the time-division multiplex time-division multiplex communication system shown in Figure 1. Time chart showing an example of data received by the master station, Fig. 2(b),
(C) is a time chart showing the transmission timing of slave stations in the time division multiplex JX time division multidirectional communication system shown in Figure 1, and Figure 3 is a time chart showing the transmission timing of slave stations in the time division multiplex JX time division multidirectional communication system shown in Figure 3. FIG. 4 is a block diagram illustrating a conventional example of a slave station device in a time-division multiplex system according to the present invention, and shows an example of an anti-interference slave station device in a time-division multiplex multi-channel communication system according to the present invention. ,
FIG. 5 is a block diagram showing a specific array of reference signal generators in the device shown in FIG. 4, FIG. 6 is a block diagram showing a specific example of a comparison circuit in the device shown in FIG. 4, and FIG. 12 is a time chart showing one operation of detecting the transmitter p of the transmitter 1d signal. 20, 22... Out-of-synchronization detection circuit, 23... Reference signal generator, 24... Direction f detector, 25... Detector, 26... Comparison circuit. (15) Figure 1 Figure 2 (b) - 111111 + leaf (C) Feminine bone - 111 books 20

Claims (1)

[Scope of Claims] tl) In an interference prevention method in time division multiplex time division multidirectional communication in which a number of slave stations transmit 1B data to a master station by time division based on a reference synchronization signal sent from an fi station, Out-of-synchronization detection means for detecting out-of-synchronization of the synchronized signal reproduced in synchronization at the station; and branching means for branching part of the flJ transmission signal immediately before being sent out from the air.
a detector for detecting the slave station transmission signal branched by the branching means; a reference signal generator for generating a reference signal for determining a reference transmission timing for time-division communication based on the synchronization signal; and the detector. transmission abnormality detection means for detecting a superstition abnormality in the slave station transmission signal from the phase difference between the output of the signal and the reference signal, the detection output of the desynchronization detection means or the detection output of the sender abnormality means; A method for preventing interference in time-division multiplexing and time-division multi-directional communication in which the transmission of slave station transmission signals is prohibited to prevent interference of slave station data transmitted to the master station. The t2J previous Br2 out-of-synchronization detection means detects out-of-synchronization of the m6 self-synchronization signal by comparing the synchronously reproduced synchronization signal and the reference synchronization signal component f into the received master station i signal. Interference prevention method in time-division multiplexing and time-division multi-directional communication listed in scope item (1) ae. (3) A method for preventing interference in time division multiplexing time division multi-way communication according to claim (1), wherein the branching means is a directional coupler.