JPS5834807Y2 - noise reduction circuit - Google Patents

Description

[Detailed description of the invention] The present invention relates to a noise reduction circuit that can reduce the noise generated when the power switch is turned off by gradually reducing the output voltage of the amplifier circuit using a capacitor when the power switch is turned off. The purpose is to provide a mitigation circuit.

FIG. 1 shows a circuit diagram of an example of a conventional noise reduction circuit.

In the figure, for example, a low frequency signal from a wireless microphone (not shown) is amplified by an amplifier circuit 1 which is designed to have low output impedance in relation to connection with other equipment, and is amplified by a field effect transistor (FET) 2. applied to the drain.

A resistor R0 is connected between the drain and source of this FE, T2 to completely turn it on and off, and when it is off, the output signal of the amplifier circuit 1 is attenuated by the resistor R1 and the subsequent resistor R2.

3 is a control voltage input terminal, which is connected to the FET via resistor R3.
It is connected to the gate of 2, the power switch is on,
In addition, when the wireless microphone is off (no signal), a control voltage of O volts is input to turn off FET2, and on the other hand, when the power switch is on and the wireless microphone is on, a positive DC control voltage is input. Come and FET2
Turn on.

Therefore, when the power switch is on and the wireless microphone is on, the low frequency signal amplified by the amplifier circuit 1 is outputted from the output terminal 4 via the drain and source of the FET 2, and further via the capacitor C1.

On the other hand, when the power switch is on and the wireless microphone is off, FET2 is turned off, so the noise generated at the output point A of the amplifier circuit 1 is caused by the resistance R1.
It is attenuated by R2 and is not led to the output terminal 4.

However, for example, the noise reduction circuit (squelch circuit) of the wireless microphone receiver described above, if the power switch is turned off when the wireless microphone is turned off, the noise reduction circuit (squelch circuit)
The voltage at the point and the source voltage of the FET 2 are rapidly discharged down through the low impedance of the amplifier circuit 1 seen from the point A, and approach zero potential.

At this time, when the voltage at point A becomes below a certain value, the FET
FET 2 changes from the cut-off region to the active region, so at a certain moment after the power switch is turned off until the smoothing capacitor in the power supply circuit is completely discharged and the entire circuit stops operating completely, FET 2 is in the on state. Become.

On the other hand, the signal system at the previous stage including the amplifier circuit 1 comes to a halt state with a relatively thick time constant when the power switch is turned off.

Therefore, between the time the power switch is turned off and the operation of the entire circuit completely stopped, the noise from the previous stage appears at point A, and during the time when FET 2 is in the active region, it shocks the output terminal 4. It had the disadvantage that it appeared as a sound.

The present invention eliminates the above-mentioned drawbacks, and an embodiment thereof will be described below with reference to FIG. 2.

FIG. 2 shows a circuit diagram of an embodiment of the noise reduction circuit according to the present invention.

In the figure, the same parts as in FIG. 1 are designated by the same reference numerals, and their explanations will be omitted.

In FIG. 2, the output terminal (point B) of the amplifier circuit 1 is connected to the drain of the FET 2 via a parallel circuit consisting of a signal bypass capacitor C2 and a discharge resistor R4.

Connection point between this parallel circuit and the drain of FET2 (point A)
is connected to the charging/discharging capacitor C3 via the cathode and anode of the backflow prevention diode 5.

On the other hand, the input terminal of the positive DC power supply voltage 10B is connected to one end of a resistor R7 via voltage dividing resistors R6 and R6 for setting the charge/discharge voltage, and the other end of this resistor R7 is connected to a capacitor C8 and a diode. It is connected to the connection point (point C) with the anode of No. 5.

Now, assuming that the power switch is on and the wireless microphone is off, FET2 is turned off, and on the other hand, the voltage at point C ( Since the resistors R5 and R6 are selected in advance so that the voltage across the capacitor C3 is low, the diode 5 is reverse biased and cut off.

When the power switch is turned off, A, B
The potential at the point approaches zero potential more quickly than the above-mentioned constant voltage, but after the point when the potential at point A becomes lower than the potential at point C, diode 5 becomes conductive, so that the charge in capacitor C3 decreases to zero. The discharge begins according to a discharge time constant roughly determined by each of the resistors R1 and R1.

Therefore, by selecting the above-mentioned discharge time constant so as to keep FET 2 in the OFF state until the noise from the previous stage of amplifier circuit 1 becomes sufficiently small, it is possible to significantly reduce the noise that occurs as a shock sound when the power switch is turned off. I can do it.

In addition, low frequency signals from the wireless microphone during normal operation are transmitted through the signal bypass capacitors C2 and FE.
They are led to the output terminal 4 through T2 respectively.

In the above embodiment, a case has been described in which an FET is used as an electronic switch for passing or blocking transmission of an output signal of the amplifier circuit 1, but it goes without saying that a bipolar transistor may be used instead.

As mentioned above, the noise reduction circuit according to the present invention includes a low output impedance amplifier circuit, a transistor that passes or blocks a signal supplied from the amplifier circuit via a signal bypass capacitor, and a signal bypass capacitor. a diode, one end of which is connected to the connection point between the power supply capacitor and the transistor; the charging/discharging capacitor applied to the other end of the diode when the power switch is turned on, and the signal applied to the charging/discharging capacitor supplied via the diode as the potential drops at the connection point when the power switch is turned off to discharge the charged charge of the charging/discharging capacitor. Since the bypass capacitor is connected in parallel with the discharge resistor, the noise generated when the power switch is turned off can be significantly reduced by appropriately selecting the discharge time constant of the charge/discharge capacitor. , a diode, and a capacitor need only be added to a conventional circuit, so it has the advantage of being relatively inexpensive to construct.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an example of a conventional circuit, and FIG. 2 is a circuit diagram showing an embodiment of the circuit of the present invention. DESCRIPTION OF SYMBOLS 1... Amplifier circuit, 2... Switching field effect transistor, 3... Control voltage input terminal, 4... Output terminal, 5... ... Diode for backflow prevention, C. ...Signal bypass capacitor, C8...
...Charging and discharging capacitor, R4...Discharging resistor.

Claims (1)

[Scope of utility model registration request] an amplifier circuit with low output impedance, a transistor that allows a signal supplied from the amplifier circuit via a signal bypass capacitor to pass or be blocked by an external control signal, and one end of which is connected to the connection point between the signal bypass capacitor and the transistor. A charging voltage is applied to the other end of the diode when the power switch is on, and a charging voltage that is lower than the constant potential that occurs at the output of the amplifier circuit when the power switch is on and the transistor is in a signal cutoff state. A discharging capacitor and a discharging resistor connected in parallel to the signal bypass capacitor, which discharges the charge of the charging/discharging capacitor supplied via the diode due to the potential drop at the connection point when the power switch is turned off. Accordingly, a noise reduction circuit configured to reduce noise generated when the power switch is turned off.