JPS5831637A - Multiplex processor - Google Patents

Abstract

PURPOSE:To transmit information of the same content to a plurality of processors at a time, by designating a device which designates a plurality of processors to a reception processor number and controlling the processors with this device number. CONSTITUTION:A multiplex processor MPU consists of a plurality of processors Pa-Pn, and each processor has device numbers (a)-(n) designating one of the processors and a device number (x) designating all the processors at the same time. When an arbitrary processor transmits the same data to the other processors, the processors at the transmission side provide the number (x) and the device number of itself for a transmission data and transmits the data to a common bus BUS based on the management of a bus controlling circuit BC. The other processors other than those at the transmission side receive the data and the processing device number at the transmission side via the BUS. Thus, the processing ability of the transmission side is increased and the rate of use of the common bus can be improved.

Description

[Detailed description of the invention] The present invention relates to a multiprocessing device.

Conventionally, in this type of multiprocessing device, each processing device has only a unique device number, so when one processing device sends the same information to multiple other processing devices, each processing device The disadvantage is that the same information must be sent multiple times by sequentially specifying each device number.

The present invention solves the above drawback by specifying device numbers that specify multiple processing devices at the same time, making it possible to send information with the same content from one processing device to multiple other processing devices at once. The object of the present invention is to provide a multi-processing device that can perform the following functions.

According to the present invention, the device is configured of a plurality of processing devices, and further includes: a device number specifying one of the plurality of processing devices;
A multi-processing device is obtained which is characterized in that it has a means for controlling the plurality of processing devices at the same time using a device number specifying the plurality of processing devices.

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a four-dimensional diagram showing one embodiment of the present invention. The multiprocessing unit MPU includes a plurality of processing units P, , Pb, P, .
...Pn, and each processing device has a device number a, b, e...n that designates one of the processing devices, and a device number X that simultaneously designates all the processing devices. Ori,
All the processing units P, , Pb, Pc, -Pn are connected via a common bus BU8 having a bus control circuit BC. □Transfer/send data between any two processing devices
When performing reception, the processing device on the sending side adds a device number specifying the processing device on the receiving side and its own device number to the transmitted data, and sends the data based on the management of the (Scon) o-le circuit BC. and sends it to the common bus BU8. The processing device that matches the device number on the receiving side receives the data and the processing device number on the sending side via the common bus BU8.

Next, when any one processing device sends the same data to all other processing devices, the sending processing device uses the device number X that specifies all the processing devices as the receiving processing device number and its own device number. In addition to the transmission data, it is sent to the common bus BU8 under the control of the bus control circuit Be.

All other processing devices except the sending one are on the common bus B.
Receives the data and the sending processor number via U8.

FIG. 2 shows an example of a block format sent by a processing device on the transmitting side, where R indicates a receiving device number field, S indicates a transmitting device number field, and D indicates a transmission data field. Blockl is da from processing device Pa to processing device Pc.
This is an example of a block format when transmitting ta 1.

Bloek2 connects the processing device 1Pa to all other processing devices.
This is an example of a block format when data2 is simultaneously sent to Pb, PC...Pn.

As explained above, the present invention provides a multiprocessing device that includes:
When sending the same data to all processing devices, specify all processing device number X as the receiving processing device number.

By sending the same data to all processing devices at the same time,
This has the effect of increasing the processing capacity of the sending device and improving the usage rate of the common bus.

[Brief explanation of drawings]

Figure N1 is a pull diagram showing an embodiment of the present invention. FIG. 2 shows the format of the sending block in the present invention. In the figure, MPU is a multi-processing bag dh Pa+ PbP
c,...PH is a plurality of processing devices a in the multiprocessing device
, b, c...n are each processing device number corresponding to the processing device, X is a device number that simultaneously specifies all processing devices, B
U8 is the common bus, BC is the bus control circuit that manages the common bus BU8, R is the receiving side device number field,
S is the sending device number field %D is the sending data field O

Claims (1)

[Claims] A multiprocessing device configured of a plurality of processing devices, characterized in that it has a means for controlling by a device number that specifies one of the plurality of processing devices and further a device number that simultaneously specifies the plurality of processing devices. Device.