JPS5831149B2 - Television standard format conversion method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television standard format conversion method that uses line blanking on the write side and read side of a memory to read out information on lines that are thinned out when converting the number of lines of a television signal. be.

In television standard format conversion, the number of lines (horizontal scanning lines) is 625 and the number of fields is 50 (62
5150 method) to a method with 525 lines and 60 fields (525/60 method), convert the number of lines from 6 to 5 every 6 lines. I am doing it.

That is, five lines of the 525/60 system are constructed by thinning out one line out of the six lines of the 625150 system.

However, during this time, it was converted to 5 25/6 by the bow operation.
Since lines are thinned out in the output power of the 0 method, distortion occurs in the image.

Line interpolation corrects this distortion, and visually corrects the information by adding information from the lines before and after each line at a specific ratio.

This correction also requires information about the lines to be thinned out.

FIG. 7 shows the state of line interpolation in conversion from the 625150 system to the 525/60 system.

When a white diagonal line is drawn at 45 degrees from the upper left to the lower right on the 625750 screen, the luminance signal of each scanning line is e.

Scanning line n v n+1 t like t el t e2
A single point at n+2 is shining brightly.

If this is thinned out at a rate of 1 in 6 lines to create an output image, that is, if n lines of input are read out by m lines of output, e.

As shown by the dashed line of -ell, there is a distortion from e2 to e4 (as a result of e3 being eliminated because the n+3 line was thinned out) and from e8 to elo (as a result of e9 being eliminated because the n+9 line was thinned out). compose the output image.

In order to correct this distortion and obtain an output image with diagonal lines as shown by the black circles and solid lines in FIG. Obtain a luminance signal f.

For example, f2 is obtained by weighted addition of 75% for e2 and 25% for e1'.

If the f signal thus obtained is used in place of the e signal, no distortion will occur in the output image signal.

However, the n+3 line signal e3 is thinned out as the f3 signal.
Therefore, in a conventional television standard conversion device, the input television signal is converted into a digital signal by an analog-to-digital conversion circuit 1 as shown in FIG. 1, and then converted into a digital signal as shown in FIG. Yoni e,
The information of the line (n+3°n+9) thinned out through the line interpolation circuit 2 which performs weighted addition of the e' signals to obtain the signal f is utilized.

Therefore, line interpolation is performed before lines are thinned out, and the digital signal that has undergone this line interpolation processing is written into the field memory 4, but the cycle time of the field memory is fast enough to write the digitized television signal as is. There is a function to parallelize digitized television signals, and a clock generated from the input television signal and a clock generated from the output television signal for field memory writing and reading are asynchronous to each other. Since writing and reading cannot be performed due to the lock, the data is written to the memory through a serial/parallel conversion circuit and buffer memory 3 having a buffer function for writing in phase with the output clock.

The operation of this serial/parallel converter circuit and buffer memory is explained in the ninth section.
As shown in the figure.

In Figure 9, G is the input television signal of 12MHz.
H indicates a signal sampled and digitized at 12 MHz, and H is a 12 MHz sampled television signal arranged in parallel for 12 samples to match the 500 nsec cycle time of write W and read R of the frame memory, with a cycle of 1 μsec. It's a television signal.

The reason why the cycle is set to 1 μsec here is because in order to perform real-time conversion, reading and writing to the field memory must always be performed alternately as shown in K, so the reading and writing cycles are arranged alternately. be.

K is a write/read cycle to the field memory based on the input television signal clock, and each cycle is 500 nsec.

J is a write and read cycle to the field memory based on the output television signal clock, each of which is 500 ns, but is asynchronous with K.

Since it is not possible to write to and read from the field memory using the asynchronous clocks of K and J, if you write and read using J, data 1 to 12 of H will be transferred to W2.
It will be written to the field memory in the cycle ′,
The data of H 1 to 12 must be held for a longer period of time.

A buffer is therefore required.

When writing the signal that has gone through these processes to the field memory, the input digital television signal that has undergone line interpolation while being thinned out by not writing the lines to be thinned out (n+3, n+9 in Figure 1) to the field memory. I'll write it down.

Alternatively, as shown in Figure 2, after writing one field of information to memory as is without performing line interpolation,
As shown in output lines m+3 and m+8 in the figure, m+3
On the line m+8, two types of signals, e3 to be thinned out and e4 not to be thinned out, are read out at the same time, and in line m+8, two types of signals e to be thinned out and elO not thinned out are simultaneously read out, and line interpolation is performed on the output side of the memory. Ta.

In these methods, line interpolation is performed on the write side (input side) of the memory, or compared to the sequence shown in J in FIG. 9 in which the write and read cycles are each 500 ns,
As shown in the sequence shown in Figure 3, a memory with a fast cycle time (333 ns) is used to perform one write W.
It is necessary to read out the memory twice (R1, R2) for each time, and simultaneously read the information on the lines to be thinned out and the lines not to be thinned out.

In Figures 1 and 2, 1 is an analog-to-digital conversion circuit, 2 is a line interpolation circuit, 3 is a serial-to-parallel conversion circuit and a buffer memory, 4 is a memory with a capacity of 1 field, and 5 is a parallel-to-serial conversion circuit. , 6 is a field interpolation circuit, and 7 is a digital-to-analog conversion circuit.

On the other hand, when converting from the 525/60 system to the 625150 system, 5 lines are converted to 6 lines, so as shown in Figure 8, the output m+3 line uses the same input n+2 line signal e2 as the m+2 line. Because the number of read lines is converted by duplicating one line every five lines from the memory as shown in FIG. Line interpolation is performed by this.

The drawbacks of the conventional technology explained above are (525/60)
When converting from the method to the (625150) method and vice versa, the device that performs line interpolation is divided into the input side and output side of the memory, so when converting in both directions with one device, the conversion mode This results in the complexity of having to switch the position of the line interpolation, and that a fast memory must be used to perform the line interpolation on the output side, regardless of the conversion mode.

SUMMARY OF THE INVENTION Therefore, the present invention aims to improve the above-mentioned drawbacks of the prior art, and its purpose is to perform bidirectional format conversion by performing line interpolation on the output side of the memory, and to utilize a low-speed memory. The purpose is to provide a conversion method.

The present invention is characterized in that a television signal of one standard format is digitized and stored in a memory, and the contents of the memory are read out according to another standard format to convert the standard format. The information for line interpolation that is required due to the conversion of the number of lines,
The purpose of the present invention is to read out the memory using a line blanking period and perform signal manipulation for line interpolation on the output side of the memory.

Figure 4 shows an example of the input/output line phase relationship between the input line I written to the memory and the output line ■ which has an independent phase relationship with the input line. The part containing information is shown by b, and the line blanking is shown by ab.

In (2), the output side line length C, the portion of the line that includes image information is shown as d, and the line blanking is shown as c-d.

Information on lines to be thinned out using the line blanking periods a to c and d (used for line interpolation)
(signals of n+3 and n+9 in FIG. 7) are read out.

In this case, all of the input television signals are written into the field memory without being thinned out.

Figure 5 is a diagram showing the sequence of the write W cycle and the read R cycle to the memory.As shown in the input/output phase relationship shown in Figure 4, writing and reading are performed at the same time, so the writing and reading sequences are always alternated. must be carried out.

However, since there is no image information between a and b shown in Fig. 4, writing is not performed, so in the sequence a of Fig. 5,
- Read the write W cycle of the section corresponding to b
It can be used for cycles.

Furthermore, in the section c-d, there is no need to read out the information used for this line, so it can still be used to read out another line.

Next, an explanation will be given using numerical values of one example.

If the video signal is sampled at 12 MHz and the memory cycle time is 500 ns, then 6251
The number of samples for one line in the 50 method is the line frequency f'
H(f'H= 15.625K)lz) is f'HX2
88=4.52MHz According to the MHz relationship, there are 768 (15,625KH2) samples.

This white section (Fig. 4b) is 54 μs and 648 samples, so the line blanking interval is 10 μs and 1
This is for 20 samples.

For example, the time corresponding to 12 samples of image information is 12MH
The sampling time for z is 1 μs, and the cycle of write W or read R in FIG. Compatible with memory cycle time (500ns).

Therefore, if the memory is addressed in units of 12 samples, each writing and reading of one line image requires 54 addresses (54×12=648 samples), and the remaining 10 addresses can be used for the line blanking period.

On the other hand, if one line of the 525/60 system is sampled at 12MHz, the line frequency fH will be fHX286=4.
Due to the 5 MHz relationship, the number of samples is just over 762 samples (63.5 addresses).

The white area is 54 μS, which is the same as in the 625150 system, and therefore corresponds to 54 addresses.

The remaining 9.5 (63, 5-54) addresses are line blanking.

It is clear from the above explanation that there is line blanking for 10 addresses on the write side of the 625150 method, but since addresses in the memory cannot be accessed asynchronously on the write side and read side, the frequency of the output side is used as the reference. If the method is to read and write data to the memory, it is necessary to use a buffer memory on the input side to adjust the write time, and therefore two addresses cannot be used.

Furthermore, due to the difference in input and output line lengths, there is a phase relationship in which one address cannot be used, resulting in a total of three addresses that cannot be used.

The remaining seven addresses can be used for reading.

On the other hand, 0.5 addresses in the line blanking on the read side can be assigned to read, so 1 on the read side
There are a total of 17 read addresses due to input/output line blanking that can be used during the line.

On the other hand, as mentioned above, the length of one line of the image is 54 addresses, so if 4 lines of line blanking are used on the output side, 54 addresses of one line can be read out sufficiently (17X4-68>54 ).

The unit of line conversion is to convert 6 lines into 5 lines, so if there are 5 lines on the readout side, it is possible to read out and store one line of separate information, and as mentioned above, 4 lines Since one line can be read out by line blanking, it is fully possible to read out information for line interpolation by line blanking.

FIG. 6 shows a block diagram of a system conversion device according to the present invention.

After decomposing the television signal into a luminance signal and a color difference signal, the analog-to-digital converter 1 performs sampling and quantization, and the serial-parallel converter circuit 3 converts the input information (12MH
z sampling) is parallelized every 12 samples as shown in H in Figure 9, and the buffer memory is configured so that writing is compensated for even in the asynchronous phase relationship of input and output as shown in J in Figure 9. After temporarily storing and adjusting the timing of writing and reading memory, the field memory 4
Write 12 samples to A or 4B as a unit.

The writing is in section b in Figure 4 for one line,
Regarding field memories, each input field is written alternately to field memories A and H, but when reading data, data is written to A and B so that field interpolation processing is performed in which the information of two fields is weighted and added in order to correct the movement. The contents of the field memory are simultaneously read out and supplied to the parallel-to-serial conversion circuit 5.

The functions up to this point are exactly the same as in Fig. 2.

In Figure 2, the line to be thinned out, for example e in Figure 7.
The signal at 9 is the signal at elO, and the output m +
8, but in FIG. 6, e, which are written before line m+4 in FIG.
The signal is divided into the line blanking section of lines m+4 to m+7 (section c-d in FIG. 4) and the input line blanking section a - b in FIG. 4 corresponding to this output line section e.
The signal No. 9 is read out piecemeal and stored in the line memory 8 through the parallel-to-serial conversion circuit 5 (this circuit has the inverse function of No. 3) shown in FIG.

At the time of line m+8 in FIG. 7, all the signals of e9 are stored in the line memory 8, so that the signal of e9 can be used at the time of line m+8.

The information on the lines to be thinned out is also used to perform line interpolation 2 and then field interpolation 6 according to the method shown in FIG.

As is clear from the above explanation, by using input/output line blanking to read the information on the line to be thinned out, it is possible to read the information on the line to be thinned out without using memory with a fast cycle time. Therefore, line interpolation can be performed on the output side of the memory regardless of the direction of conversion, and the configuration of the entire television standard format conversion system can be simplified.

[Brief explanation of drawings]

Figure 1 is a block diagram of a system conversion device that performs conventional line interpolation on the input side of memory, Figure 2 is a block diagram of a system conversion device that performs conventional line interpolation on the output side of memory, and Figure 3 is a block diagram of a system conversion device that performs conventional line interpolation on the output side of memory. FIG. 2 is a sea fence diagram of the memory in the device shown in FIG. FIG. 5 is a sea fence diagram showing writing and reading of a memory according to the present invention, FIG. 6 is a block diagram of one embodiment of a system conversion device according to the present invention, and FIGS. FIG. 1; Analog-to-digital conversion circuit; 2; Line interpolation circuit; 3: Serial-to-parallel conversion circuit and buffer memory; 4; Field memory; 5; Parallel-to-serial conversion circuit; 6; Field interpolation circuit; 1; Digital to analog conversion circuit; 8: Line memory, N: Input. M: Output, l: Input side line, ■; Output side line, a;
Input side line length, b; Image information part of input side line, a-
b: Input side line blanking, C: Output side line length,
d: Image information part of output side line, d-c: Output side line blanking, W: Write cycle, R2R1, R2
; readout cycle, luminance signal of eO"""'ell' input, e et al~e'll: luminance signal delayed by one line length from eO~eit, f1~f,; luminance signal obtained by line interpolation processing , G: Input digital television signal with 12 MHz samples, H: Signal with 12 samples of G signal paralleled, Field memory writing and reading based on K, G, H signals (input television signal clock as reference) cycle, field memory write and read cycles relative to the output television signal clock.

Claims (1)

[Claims] 1. In a method in which a television signal of one standard format is digitized and stored field by field in a memory, and the contents of the memory are read out according to another standard format to convert the standard format, as the number of horizontal scanning lines is converted. A television standard characterized in that information for necessary line interpolation is read from the memory using a line blanking period, and signal manipulation for line interpolation is performed on the output side of the memory. Method conversion method 1