JPS583078A - Pattern information extracting system - Google Patents

Abstract

PURPOSE:To extract block patterns from a drawing where characters and patterns are mixed, by extracting only block parts and wiring parts of hand-written linear patterns on a basis of data at each grating point. CONSTITUTION:A block pattern recognizing circuit 36 recognizes pattern candidates extracted by a block pattern candidata extracting circuit 35 and holds them in a block pattern description table 37. A vector converting circuit 38 extracts cross points, inflection points and terminal points and gets information of linkage between these points and block patterns and converts them as vector information. Vector information of wiring patterns transmitted from the vector converting circuit 38 are held in a wiring pattern description table 39.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a graphic information extraction method, and uses an input video of a drawing in which line figures drawn on a grid axis and character groups are mixed in 1% to extract 4'lK of line figure information. The block pattern and the wiring pattern are separated and extracted.

For example, as shown in Figure 1, when inputting only the line figures from a drawing containing a mixture of line figures and characters drawn by hand on a sheet of paper with grid lines of dop-p-out curves 2-, to a data processing device such as a computer. It is necessary for the operator to input the linear part while extracting it using a digitizer or the like. e, O case.

The operator must indicate the end and end of each line and input the information that it is a straight line. Therefore, there is no problem with simple circuit diagrams, but with very complex circuit diagrams such as IC circuits, inputting data becomes very complicated and requires considerable patience on the part of the operator. Moreover, it takes a long time to enter data.

Operator input Kl! I-sho may also exist.

And when each symbol is poisoned with a letter.

This character must be entered separately from the keyboard, or by entering the text from a card.

Therefore, block pattern symbols and connection information between each symbol can be automatically extracted from handwritten drawings containing a mixture of two characters and figures, and automatically input into the data processing device! There was a need for something that would allow for the creation of clean drawings based on this extracted data, if necessary.

Therefore, the present invention reads such handwritten drawings containing a mixture of characters and figures using an optical input device, such as when creating a facsimile, and then extracts the necessary block butter/information and wiring for the block pattern from the read data. The purpose of this invention is to provide a graphical information extraction method that can separate and extract pattern information. For this purpose, in the graphic information extraction method of the present invention, m
an image input means, and a good image data 7 inputted from the image input means;
lattice point label code generating means for generating a lattice point label code indicating the possibility of existence of Km image data near the lattice point; label code holding means for holding the lattice point label code; , a verification means for verifying the positional deviation between the information of the grid point 2 bell code and the image data from the grid axis, a positional deviation information holding means for holding the nine positional deviation information obtained from the verification means, and a positional deviation information holding means for holding the nine positional deviation information obtained from the verification means, A shape change means for determining local shape changes and identifying the possibility of character strokes, a shape change label holding means for holding shape change label information output from the shape facilitation means, and the grid point label code and position. An intensive lattice point label determining means for determining an intensive lattice point label code aggregated by shift information and shape change label information, and a character flag indicating the possibility of character string μm in this intensive lattice point label code. A single character-figure mixed drawing is provided by providing a character flag diffusion means for diffusing, a character flag erasing means for erasing characters in a portion not surrounded by lines, and a block pattern extraction means for extracting a block pattern. The feature is that a block pattern is extracted from.

First, before describing the present invention in detail, the outline of the present invention will be explained first.
The explanation will be given based on the figures.

In the present invention, the lattice axes are plotted as shown in FIG. A line figure with hand-drawn characters on so-called graph paper is read by an optical reading device such as a 7A line, and the input image information obtained as a result is held as grid point data. For example, if there is a sound line V in Figure 3 around the grid point in Figure 2 of the shrine building, as will be described later, the range where the arrow shown in Figure 2 exists with the grid point G as the center is The presence or absence of the II image, and if so, the certainty that it is line information. 1.Which direction (up, down, left, right) of this grid point G does the figure data exist? Then, the existence of this image. The deviation, etc. to the position where the grid point G is located is stored as information on that grid point G. Then, based on the data of each of these lattice points, extract only the square part and the wiring part of the handwritten line figure as, for example, a vector,
This information has been modified so that it can be automatically input into the data processing device of the calculation converter. However, characters are written inside the plug.

It is assumed that the wiring pattern does not protrude from the corner of the block pattern.

Next, one embodiment of the present invention will be described based on FIG. 4 to FIG. 66.

4 to 6 are explanatory diagrams of a method for extracting initial lattice point labels; -do LBL. Figures 7 to 9 are explanatory diagrams of initial grid point label codes LBI corresponding to various image data, and Figures 1011 and 11 are the first verification method for verifying the state in which image data is separated by a certain distance from the grid points. FIG. 12 is an explanatory diagram illustrating the first verification corresponding to the social type image data of FIGS. 12 to 15. Figures 16 to 19 show the so-called normalized state in which the toning data is placed on the lattice axis based on the first verification result, and Figures 20 to 2s show the state in which the image data is so-called normalized. An explanatory diagram of the verification method and its second verification results corresponding to various Ii image data, and FIGS. 24 to 27 are explanatory diagrams of the state normalized again based on the second verification result and its label code. FIG. 28 is an explanatory diagram of the fifth verification mask used in the fifth verification method, and FIG. 29 is an explanation of the third verification label code obtained using the fifth verification mask, 1145
0 to 33 show the third verification method for various shapes and the third verification label codes obtained as a result.

Figure 34 shows grid point labels;
The figure is an explanatory diagram of lattice point 2 pel codes for various figures.

FIGS. 59 to 54 show nine figures restored based on the modified state of the lattice point label code and the extent of the modification.

Fig. 55 is another handwritten drawing, Fig. 56 is the input IIIgIA information input from Fig. 55, and Fig. 57 is an output diagram of the grid point label hood in the handwritten drawing of Fig. 55 with the modification corresponding to Fig. 54. , FIG. 58 is an explanatory diagram of the diffusion state of the ambiguous flag in FIG. 57, and FIG. 59 is an extraction diagram of block pattern candidates.

60 to 62 are diagrams explaining the recognition state of the pull pattern, Figure 63 is a diagram explaining the lattice point label hood in the state of Figure 62, Figure 64 is a diagram explaining the description state of the pull pattern, and Figure 65 FIG. 66 is a block pattern and wiring pattern output diagram, and is a configuration diagram of an embodiment of the present invention.

Hereinafter, the present invention will be described as extraction of initial lattice point label code (LBL), @1 verification processing, extraction of first verification label code (LBl), second verification processing, and second verification label code (LB2).
extraction, third verification process, and third verification label j-do (L
B. ) extraction, grid point label code (LABEL) determination, global integration processing, broken line approximation processing, ambiguous flag diffusion processing, block pattern candidate extraction processing, block pattern recognition processing, block pattern description The process will be explained according to the procedure.

+11 Extraction of initial lattice point label code (LBL) The initial lattice point label code roughly grasps the graphic structure in the vicinity of the lattice point, and its extraction method will be explained below.

First, the image data obtained by reading the handwritten drawing is
As shown in the figure, it is divided by the lattice axes x1 to xs and the lattice axis right to Y.
, with windows W, -x and Wl-! having a size of n×1 bits corresponding to the lattice @nK. It then scans in the X and Y directions. When even 1 bit of Kll image data (black dot) in the window exists, this is set as the black dot detection output of each window as "1" and is stored in the holding units Rs-x and R1-! hold each. As a result 9, for example, the fourth
The image data shown in the figure is divided into windows 11 Wt −x, Wl−
When scanning with V, the holding parts R1-4sR1-YK are in the state shown by the diagonal lines, respectively, and the window parts Wl-x, W
Output "1" as black point information from l-Y.

This is the value that is maintained as the projection result on each grid axis.

Next, as shown in FIG. 5(a), regions R. and R1 are defined for the holding parts R1-XK, and "
1'' (indicating black point information) is calculated, and if it is above a certain threshold, information rR-IJ that indicates that there is a possibility that a line segment exists in the right direction to the grid point is determined, and if it is below the threshold If so, information "R-0" indicating that there is no possibility is determined.

In the same way, define the area L, and calculate the sum of ``1'' in each area, and if this is greater than the threshold, determine ``L-1J'', which indicates that there is a possibility that a line segment exists in the left direction. However, if it is below the threshold value, "L-OJ" is determined.Of course, as shown in FIG. @
t' Ul inside and.

Depending on whether the sum of "1" in DI is above or below the threshold, upward direction information rU = 1 or OJ and downward direction information "
Determine D-1 or OJ. The initial lattice point label codes (LBL) D, L, U, and R are obtained in the following manner:
For example, for the image data in Figure 4, Figure 6 (a) K
As shown in FIG.
An initial grid point 2 bell code for grid point GM K is determined.

In this way, for the image data as shown in FIG. 7(a), the top, bottom, and left sides are displayed as shown in FIG. 7(b).

Figure 7 (
The initial lattice point 2-bell code (LBL) shown in (c) is obtained for the image data shown in FIG. 8 (a).

Figure 8 (B) K shows that there is a possibility that line segments exist in the left, right, and upward directions, as shown in Figure 8 (C) [LBL=
011 j J is obtained, and "LBL-0111J" is similarly obtained for the image data shown in FIG. 9 (a) IC.

(2) First verification process The first verification process is based on the above-mentioned initial lattice point label; This is to verify whether or not it is possible.

First, as shown in FIG.
e Wh.

- W1 are provided. The first of these is
R■1. When L-1, IXn bit first verification window W
Use vo, and when R-0, L-1, 1 x (!!-+
1) Using the first verification window Wma1 of the bit, R-1,L
-00! UIX (-7+1) bit first verification window 1l
Use Wvz゛. When set and U-1°D-1, n
X1 bit first verification window II Wm.

When U-o and D-1, use the first verification window Wll of (i+1)×1 bits, and when U-1 and D-〇, use the first verification window Wll of (A+1)XI bits. Use Mado Iku WMs. Then, as shown in FIG. Detects the position where the #11 verification window part of is completely filled with "1" which is black point information.The slide width of this slide operation is the rapid onset of the grid distance in both the vertical and horizontal directions, that is, the 11th wJ (I, I). within the range of n.

This slide operation allows you to determine whether there is a line segment in the vicinity of the grid point in the direction corresponding to the initial grid point 2 bell chord, and if so, how far that line segment deviates from the grid axis (d=). can be detected. Then, these deviation information is extracted as first verification deviation information 1@8X1, 8Y1. Here, as follows (8) N, sy
Display l.

SX1: Left-right deviation - Right direction; -Left direction 8Y1
: Vertical deviation Lower direction -- Upper direction However, if the black dots completely fill the window within the sliding width of n bits, Kti, 8X1.
Define r999J as 8Y1.

If no line segment in the horizontal or vertical direction is detected using the initial grid A5 Bellcoat' L B L k, the 8X1. 8Y1J and then set a value of 1000J. Figures 12 to 15 show the results of verifying deviations by performing the Book 1 verification process on various figures.

In FIG. 12, No. 10 □ corresponds to LBL-1010.

When the 01 verification window WIO is moved 4 bits to the right from the lattice axis d, the first verification window W can be placed at a black point, resulting in 8X1-4. However, since there is no need to perform a sliding operation in the vertical direction compared to LBL-1010, 8Y1-1000 is used to indicate this.

Also, in the fllk1s diagram, it is LBL-1111,
At this time, it is not necessary to shift the first verification windows WIIo and Wvo by using the grid axes of the first verification windows WIIo and Wvo.
Since vO will be filled with black dots, 8X1-0, 8Y1
-0. In FIG. 14, there is a failure in LBL-0111, and at this time, the first verification window W11. When shifted one bit to the left, the first verification window Wllll U
This becomes all black points, and when the first verification window WvO is shifted downward by 3 bits, it can be made into all black points, so it becomes 8X1--1.5Y1-5.

However, in the figure of Figure 15, J, BL-011
When the IEL first verification window W11 is shifted one bit to the left in 1, the first verification window W11 can be made entirely of black dots; Even if you shift by the width n shown in Figure 11 (a) using and +[
).

13+ Extraction of 1st detection IEF pel code (LBl) 1st detection key deviation information obtained in (2) above 8X1゜8Y1
After moving the rectangular area that captures the graphical structure near the lattice points based on and normalizing the line segments so that they are located on the lattice axes, we move the rectangular area that captures the geometric structure near the lattice points and normalize the line segments so that they are located on the lattice axes. O) initial grid point label code (L
The lattice point label code is obtained using the same method as the method used to extract the BL), and this is used as the first verification 2Bell code (Lllll
l).

In this case, normalization processing in the X direction is performed as follows.

In the case of 5X1-1000.8X1-999, 5x1-0, the rectangular area is not moved. When SX1>0, the rectangular area is moved to the right by 18X11.

When 8X1<00, move the rectangular area to the left by +8X11.

Similarly, normalization processing in the Y direction is performed as follows.

In the case of 8Y1-1000.8Y1-999, 8Y1-00, the rectangular area is not moved, and when 8Y1>O, the rectangular area is moved downward by lsY[l.

When 8Y1<0, the rectangular area is moved upward by K18Y11.

For example, in the case of image data as shown in FIG. 16 (a) K, the rectangular area is shifted to the right (relatively, the image data is shifted to the left K) by 4 bits because it is 5X1-4. 8Y1-1000, so the rectangular area does not move in the vertical direction. As a result, a figure as shown in FIG. 16(b)K is obtained, and this is converted into the window W1, W, -! as shown in FIG. to scan the holding parts R to x and R, -Y
The IC can obtain black point information as shown in the shaded area in FIG. 16(b). Based on this, the same process as explained in FIG. 5 is performed to obtain the first verification label code LB1 (LB
1 DURL) can be obtained, thus, Figure 16 (
In the shape of (b), the first verification label code LB1-ICNO
get.

In the case of the image data shown in FIG. 17(a),
81-0, 8Y1-0, no movement is performed in the horizontal, vertical, and vertical directions, and as a result, the first verification label code LB1-11
11, which is the same as the initial grid point label code.

In the case of the ms data shown in FIG. 18(a).

For 8X1--1, 8Y1-5! The i-type area is shifted 1 bit to the left and 5 bits downward (relatively, the image data is shifted 1 bit to the right and 3 bits upward) and the above processing is performed.

As a result, the initial grid point 2 pel code LBI is identical to
Obtain the first verification 2 pel code LB1-0111.

Furthermore, in the case of the image data shown in FIG. 19(a),
For 8X1--1,5YI-999, move the rectangular area by 1 bit to the left to create the first verification label code LB.
Get 1 key 0111.

(4) Second verification process The second verification geography is based on the first verification second pel code LB1, and determines whether there is actually a line segment in the vicinity of the grid point in the direction corresponding to the first verification bell code LBI. This is a process for detecting whether or not the second verification label code LB2 is detected, and in response to the first verification label code LBIK, the second verification window portions BWy6 to BWvm #BW are detected as shown in FIG.
mo ~BWII! established.

Verification is performed using the same method as the first verification process described above. As shown in FIG. 3, the size of each of these second verification windows is determined as follows, where WD is the width between the lattice axes on both sides of the lattice point G.

The manner in which these second verification windows are used is determined as follows. That is, in the case of R-1 and L-1, the second verification window section BWv of the IXWD bit is used.

When WD Rmo and Lml, the second verification window B w of IX (-H-?1) bits is used, and when R-1 and L-0, the second verification window section B w of IX ("11") bits is used. 2 Verification window BW Ma,
use. And when U, l, D-1, WDX1
Second verification window BW of bits. When using U-0, DD section BWH1, and U-1, D-0, (T±1
)×1 bit second verification window BW0 is used.

Then, each of these second verification windows is slid up and down (or left and right) K with the horizontal grid axis (or vertical grid axis) as the starting point. 1" is detected. What is the slide width for this slide operation?

Both the top, bottom, right and left are within the range of n in FIGS. 11(a) and 11(b), as in the case of the first verification window. And this result was obtained. The deviation information is determined as second verification deviation information 8X2°8Y2 in the same manner as 8X1 and 8Y1 described above.

For example, for the figure in Figure 20, LBL-IC11
When using the second verification window BWl according to 0 and sliding it one bit to the right from the lattice axis, this second verification window BWIo can be filled with black points, so
It becomes 2-1. However, there is no need to perform a sliding operation in the vertical direction compared to the LBl-1010.

To illustrate this, we will use 5Y2-1000.

Further, in FIG. 21, the second verification window B WI! is detected by LBl-1111. Use ・and BWma・. At this time, the second verification window Bwv is filled with black dots on the grid axis, so there is no need to shift it (SX2-0, but the second verification window Bwv,
is shifted downward by 1 bit and becomes all black dots at 9, resulting in 8Y2-1.

And in Fig. 22, ti, 22nd by LBl-0111.
Verification windows B WN and BW M are all black dots when placed on the lattice axis, so 8X2 = 0.5
y2=6.

However, in Fig. 23, the second verification part BW and BW are used in Ll-0111.
Even if these second verification windows Bw and BW are shifted within the width n shown in FIGS.
There are 2 stripes, 999.

(5) Extracting the second verification label code (LB2) Based on the second verification deviation information 8 After normalizing the part so that it is more accurately located on the grid axis, the initial grid point label code LBL and the first verification label;-do LB1 are extracted again in the same manner as above.

A second verification label code LB2 is obtained.

That is, in Figure 24 (a), 5X2-1.8Y2-1
000, so based on this, the rectangular area is shifted one bit to the right. In this case, the rectangular area does not move in the vertical direction because the pin 8Y2 is 1000. As a result, the second
A figure as shown in Figure 4 (B) is obtained, and based on this, the second verification label code LB2-1010 is obtained in the same manner as when the above-mentioned initial lattice point label code LBL and first verification label code LB1 were extracted. I can do it.

Also, in the shape of Figure 25 (a), Mori 8X2-0.8Y2-1
and shifts the rectangular area downward by 1 bit.

As a result, a figure as shown in FIG. 25(b) is obtained, and the second verification 2 bell code LB2-1111 can be determined based on this figure.

And in the figure of Figure 26 (a), 8X2-0,8Y2=
0, and the second verification label code LB2-0111 can be obtained as shown in FIG. 26(b).

Furthermore, in the figure of Figure 27 (a), 8X2-999°8
Y2-999, and the second verification label code LB2-0111 can be obtained as shown in FIG. 27 (b).

(6) Happy 3rd verification process and 5th verification label code L
Extraction of B3 LBL determined by the above (11 to (5)), 8X1.
5Y1sLBI, 8X2, 8Y2. LB2 etc. express the following matters.

(a) Whether there is mKts near the lattice point.

(b) If a line segment exists near a grid point, which of the four directions (horizontal, vertical) does the line segment belong to?

When there is a K1 segment near the H lattice point, how far does the S segment deviate from the lattice axis?

This fifth verification process is provided to capture even more detailed local shape changes in addition to these graphic representations, and uses the third verification window 8W shown in Figure 28 to detect the vicinity of the grid points. It expresses the possibility of whether the line segment existing in is a line segment of a line figure or a part of the stroke of a character.

This third verification process is performed in 13) and (5) above.
This is executed on the figure that has been normalized by the processing in the process.

In this case, within the rectangular area on each side of the third verification window SW, four areas "at U*r IQ+ DI" shown in FIGS. Area Rs
~ Perform the following processing on D3.

■As shown in Figure 29 (a), each area R@e U@v
Ill5Ds is subdivided into IXfl bits or nX
It is regarded as a set of areas of 1 pits F. In this case, the area R
.

is divided into subdivision regions R11s ”81 + RIs,
The area U is divided into subdivisions UH+Ull U, and the area U is divided into subdivisions 1°L−L, ,
The area is the subdivision area, □, DI! , I) is divided into u.

■Conspicuous black spots in each subdivision area! The number of black dots (the number of line segments) L8KG, the number of black dots where the number of black dots (corresponding to line width) is less than the threshold Ltm (the number of black dots that can be considered as line width) ARI. Count. Note that the threshold value LtN here is a threshold value of the line width determined based on the resolution of the writing instrument, the input device, and the like.

■For each subdivision area, based on the number of black dots and line segments L8KG, the number of black dots whose length is less than the threshold LtN, and the number AR4O, the ambiguity flag FA is set.
and the following 2-bit information indicating the connected arm CAM is generated.

L8BG 1. AR Musume 1 → FA-0, CAM 1
L8EG■0 → PA-0, CAM-0 Other →FA-1, CAM-1■ Area R@
For each region of r UI + Ll e Ds, take the logical sum of the information obtained in the above ① and add this to the four regions R
, , U□L□D, each is 2 bits of information.

■2 obtained from the four areas R, , U□L□D,
Based on a total of 8 bits of information, the 29th
A third verification 2-bell code LB3 shown in Figure (b) K is generated. Here, the last 4 bits D, L, U, in FIG. 29(b),
When R is "1", K indicates whether or not the vehicle is running for KM in that direction.

Also, regarding F island to F, when FII is "1", the line segment running to the right is ambiguous, that is, is it a part of the line segment and contains noise?

It means that it is part of a character. Eight is “1”
'' and the tortoise, the line segment force I running upward is ambiguous, and the above explanation of Fm indicates that such a thing exists in the upward direction.
For K, the line segment running to the left is ambiguous, and for FD "1" and 1&, the line segment running downward is ambiguous, as explained above for device 1. This means that there are % of these.

When h is "1", it indicates that either F or h is "1".

Therefore, by using the third verification window section 8W for the figure in FIG.
3, you will get LBIS-000001010. In this case, there is no ambiguity in the figure of FIG. 30, which shows that line segments run up and down.

The third verification of the figure in Figure 31 is 2 bells L.
If you create B5, you will get LBIS-000001111. In this case, there is no ambiguity, and the line segments run vertically and horizontally.

5th verification label code LB for the figure in Figure 52
If you create S, you will get LB5-000000111, but
This shows that there is no ambiguity and that S runs upward and to the left and right.

However, if the third verification label code LB5 is created for the figure in Figure 3s, LB3-100111111 is obtained. This indicates that among the line segments that exist above, below, and to the left and right of the fifth verification window 8WK, ambiguity exists in the upward and rightward directions.

(7) Determination of lattice point label code (LABEL) According to the matters explained in +11 to (6)t above.

Initial grid point 2 pel code LBL: 1st verification deviation information 8
X1, 8Yj, first verification label code LB1: second verification deviation information 8X2.8Y2. Second verification label code LB2
and the sixth expedition label code LB3 can be extracted. Then, these extracted information are summarized to create the final grid point label code LA shown in Figure 34, 16 bits)
BEL is determined as follows.

■When the initial lattice point label code LBL is all 0, the lattice point label code (LABIIL) sets all 16 bits to 0, but when LBL is not all 0,
If verification label code LB3 is all 0, LAB
In EL, only the ready flag of the first section 0 is set to "1", and the remaining 15 bits are set to "0". So-called hexadecimal display L
It becomes ABEL-8000.

1. If neither the first verification deviation information 8X1, 8Y1 nor the second verification deviation information SX2, 8Y2 is 999, 8X and 8Y are determined by the following equations.

8X -8XI +8X2 8Y-8YI +8Y2 &ffL8X1-100X18X2-10000 time 5
X-O, and when 8Y1-1000 or 8Y2-1000, syrin is 0.

■First, clear LABEL, LBL, LB, etc.

LB2 Oh! and the lower 4 bits of LB5.

LABF! The lower bits of L, ie, sections 12 to 1sK* in FIG. 34, are defined.

On the other hand, a deviation threshold ATI is set and the ninth-order processing is performed. This threshold A? lI is set to 1, for example 7, which is the maximum moving distance of the window.

(In the case of A118Xl>Ate■.

In bit 7 of LABIifL shown in FIG. 34, set the deviation flag to "1"@And when 8X>0, the deviation is to the right.

Set the bit in section 6 of LABEL to "1".

When SX<O, it is shifted to the left, so LAB IL
Let the bit of section 4 be "1".

It also occurs when the rectangular area is moved too much. In order to prevent harmful effects, please keep in mind! Threshold 0, which is slightly smaller than the wealth! Set up the controller and perform the primary processing.

18Xl) In the case of Ote irises.

If 8X〉0.

If the bit of LBIf)H is "1", it indicates that the right side of the lattice axis has been shifted too much, and the initial state is trusted and LABEL division 15 t-rI
Let it be J.

If SX<O.

If the L bit of LBL is "1", LAB
Set the bit in section 13 of EL to "1".

(b) In the case of 8 Y l) At rin.

Similarly to (a) above, the deviation flag, which is the 70-bit classification of LABEL, is set to "1".

And when sy>o, it shifts downward.

The bit in section 3 of LABEL is set to "1", and when 8Y<O, since there is an upward shift, the section 50 bit is set to "1".

Also, if = l5YI>Ot wing If sy>o.

If the U bit of LBL is "1", the bit of section 14 of LABEL is set to "1".

If sy<o.

If the D bit of LBL is "1", the bit of section 12 of LABEL is set to "1".

■Then, perform processing in the ambiguous direction.

(b) The pick F of category 15 of LABEL is “1” and L
If the bit to B3 is “1”, the LABEL division 1
1 and each bit of section 0 is set to "1".

(If bit 14 of alLABBL is “1” and
If the bit to B5 is “1”, the LABEL division 1
0 and each bit of section 0 is set to "1".

(c) LABI! The 130 bits of the L division are "1" and LB 3 (DFL (D k'tsu) KarIJ & RaT
d, LABEL (set each bit of D section? and section 0 to "1".

) If bit 12 of LABBL is “1” and LB
If bit 3 of FD is “1”, LABEL division 8
and each bit of section 0 is set to "1".

(2) If the first verification deviation information 8X1, 8Y1 and the second verification deviation information 8X2, 8Y2 are both 999, the first-order processing is performed.

■ Clear LABEL L, LBL, LB1. The lower 4 bits of LB2 and LB5 are logically ANDed, and the lower 4 bits of LABEL, that is, sections 12 to 15, are set to the logical product.

(2) Set the bit in section 0 of LABBL to "1" to indicate that the line segment is ambiguous and may be a character.

■, 1st verification deviation information 8X1 and 2nd verification deviation information 8X2
Both are 999, but I'm happy 1 verification deviation information 8Y1
In the case of -1000, the same process as in (2) above is performed.

■, the first verification deviation information 8X1 is 1000, and the first verification deviation information 8Y1 and the second verification deviation information SY2
When is 999, the same process as in (2) above is performed.

■, the first verification deviation information 8X1 is 999, and the first verification deviation information 8Y1 and the second verification deviation information 8X2, 8Y
This indicates that both of 2 have been verified.

If it is less than 999.

8X, 8X2 8Y-8Y1+8Y2 As such, perform the steps ① to ② in the box above.

1. The first verification deviation information 8X1, 8Y1 and the second verification deviation information 8X2, 8Y2 satisfy 8X1<999t'8Y1-
999 and 8X2 (99? And if 8Y2<999.

8X■8X1 +8X2 Y-8Y2 As a result, the processes ① to ② of ① above are performed.

(2) In cases other than 1 to (2) above, the following processing is performed.

8)N999→SX1 car 0 8X2〉999　→5x2-.

8Y1 〉999 → 8Y1-0 8Y2〉999 → 8Y2-O 8X■SX1+5X2 8Y-8Y1 18Y2 and LABEI, set category 0 to "1" and perform the above-mentioned steps 1 to 2.

The expression of the lattice point label code LABEL generated by the above processes 1 to 2 can be summarized as follows.

(Whether or not there is a line segment near the al lattice point. This is LA
It can be summarized by the four-way code of sections 12 to 15 of BFtL.

If a line segment exists near the Tbl lattice point, it is important to know which of the four directions (left, right, up and down) the line segment is in, or whether it is a part of the heddled line figure or a character. This represents the possibility that the division is 0 and 1 in LABBL.
It can be determined by the 8th to 11th bits, that is, the ambiguous flag and the ambiguous direction.

(If there is a KIII segment near the cl lattice point, in what direction is the line segment shifted from the lattice axis? This can be determined by the segment S~70 bit of LABEL indicating the directional shift flag.

Then, LABIiiiL is determined by K as described above.

Figures 55 to 38 are shown below.

FIG. 35(a) In the case of the figure shown in K, its LBL.

LBl ~LB, , 8X1, 8Y1, 8X2. B10 is a notice indicating (a) to (c)K, based on these.

LABgL as shown in ) is obtained.

Similarly, for the figure in Fig. 56 (a), the LABIL shown in Fig. 66) is obtained, and 4
This is also the same.

In this way, according to the present invention, input image information can be compressed into a grid point label code, which is represented by =-code information on the grid points, by means of a graphical representation of the vicinity of the grid points.

(8) Global integration processing Next, the lattice point 2 pel code created as described above is viewed globally and ambiguity is corrected.

The lattice point label code of only the Im figure part is obtained while correcting the deviation.

FIG. 1 is a handwritten drawing used in the simulation, and FIG. 59 shows the result of reading this with an optical device, performing the various processes described above, and extracting lattice point label codes. This FIG. S9 shows the lattice point label code for the partial region X at the lower left of FIG. These lattice point label codes are all code information, but in order to make it easier to summarize, the code information is restored to a figure and is made into nine pieces.

In FIG. 59, the ○ mark indicates that the ambiguous 7 lag (bit of section 0 of LABEL) is "1", and the thick line indicates that the deviation flag (bit of section 7 of LABEL) is "1".
It shows what is.

(2) Pair Processing-1 This lattice point label is scanned with a 2×2e window to detect those with tzu category 0 or ambiguity flag "1", that is, those indicated by the O mark in FIG. s9. Then, detect the lower 4 bits.

The two pel codes of the adjacent grid points and the paired arms as shown in FIG. 40 are left, and the unpaired arms in the four directions are removed. In this way, by processing this pair, the fourth
The lattice points are corrected to the state shown in FIG.

■Character Removal-1 Next, the lattice point 2 pel code corrected by the above pair of processing-1 is subjected to the following processing using a 3 x 3 window as shown in Figure 42 (a) K. . First, in this s×5 window, grid point GiK ambiguous bladder “1” (that is, segment 0
0 bit is rlJ) Also, a lattice point 2 pel code of the 7'y group "1" (that is, the bit of section 7 is "1") is placed. As shown in FIG.
Scan the grid point label codes of these windows with the windows of
This 2x2 one-do removes that arm for anything within this 2x2 window, and drops the fraction 12-150 bits into rOJ. However, at this time, the ambiguity flag or deviation flag is not dropped. Then in the second step 1
A similar process is performed on the x3 and 3x1 windows to remove gaps within the windows. Then, in the third step, similar processing is performed using a 3×1 window.

For example, in the case of a figure with arms as shown in FIG.
G, , G, , G, in FIG. 42(a), the false arm will be removed. In this way, only one-line segment figures that have a very high possibility of going outside the 5×3 window are left, and the arm portions of the lattice point label code that have a high possibility of being one-character figures are removed. In this way.

The lattice point 2 pel of the figure in FIG. 41 is corrected to the lattice point label code in the state shown in FIG.

■ Misalignment correction-1 The grid point label code modified by ■ above.

Next, processing as shown in FIG. 44 (a) or (b) K is performed. In other words, the lattice point tube of shift bladder “1”; −
For K (thick line in figure #E44), check the lattice point label codes in that direction, and find that all the lattice point label codes in that direction are the deviation flag "0" and the ambiguous 7 tag "0".
If so, the shift direction flag is dropped, and if the shift direction bit in t is "0", the shift 7 lag is dropped to "0". For example, in the case of FIG. 44 (a), the deviation direction flag is dropped to "0", and in the case of (b), it is not dropped and is kept at "1". As a result of such processing, a lattice point label code in the state shown in FIG. 45 is obtained.

(2) Ambiguity correction-1 The following processing is performed on the lattice point label code corrected in (1) above to perform ambiguity correction.

In other words, for a lattice point label code (Lo) K with an ambiguity flag of "1", at least 2 bits of the 4-way code of its lower 4 bits are "1" (the label has arms in at least two directions). , all of the lattice point label codes (L+) corresponding to one force and its direction are ambiguous.
0'' and the deviation 7 blowfish is ``0'', the ambiguity flag of the lattice point 2 pel code (Lo) is dropped by ``0''K.

Also, if the grid point 2 pel code (Lo) has straight arms (two arms in opposite directions), only the grid point label code (L+) corresponding to that direction has an ambiguity flag of "0" and a shift flag. If is "0", the ambiguity flag of the lattice point Laperude (LO) is set as rOJKII. As a result of such processing, a grid point label code in the state shown in FIG. 46 is obtained.

■ Misalignment correction - 2 Next, the lattice point labels that have been corrected in the above (■); Capturing pairs of codes. If the misalignment direction of the pair is in the horizontal direction, check the lattice point labels in the vertical direction.

Also, if the direction of deviation of the pair is in the vertical direction, the grid point label code in the horizontal direction is checked, and the grid point label code with certainty (that is, ambiguous 77g "0") is checked.

Correct the lattice and Q2 pel code towards the deviation flag "0").

In other words, the fact that one line actually forms two grid points Kt due to the deviation K is corrected.

As a result of such processing, a lattice point 2 bell code as shown in FIG. 48 is obtained.

■ Ambiguity correction - 2 Next, for the grid point label code corrected according to the above To make a lattice point 2 pel code (ambiguous 751g "1" or deviation 72g "1") into a reliable lattice point 2 pel code. That is, the ambiguity flag and deviation flag of such a grid point label code are respectively cleared. As a result of such processing, a 2-pel code with lattice points as shown in FIG. 49 is obtained.

■Removal of ambiguous arms For the grid point 2 pel code modified by ■ above,
The arm in the direction where the ambiguous direction bit is "1" of the grid point label code whose ambiguity flag is "1" is removed. As a result, a lattice point 2 bell code as shown in FIG. 50 is obtained.

(2) Pair processing-2 The same processing as the pair processing-1 described in (2) above is performed on the lattice point label code modified from K above, and one unpaired arm is removed. As a result, a grid point label code in the state shown in FIG. 51 is obtained.

■Character Removal-2 The characters explained in ■ above for the round grid point label code corrected according to ■ above 1! The same process as in -1 is performed to remove the arms of grid points 2 and 2, which have a high possibility of being a character figure. With this process.

Two lattice points in the state shown in FIG. 52 are obtained.

[Phase] Character removal *-5 Next, 5X the grid point label code corrected by the above ■
5, and if there is no arm in the direction that exits from this window, the arm of each lattice point 2 pel code is removed. Instead of a 5 x 5 11g section, you can use a 4 x 4 or larger one. In this way, the lattice point labels in the state shown in Fig. 5s are obtained.

0 ambiguity correction - 5 The grid point label code modified from OK above.

When the ambiguity flag is ``1'' and at least ``1'' exists in the bits of the four-way code (lower 4 bits), the ambiguity flag is set to ``0''. In this way, the lattice point labels in the state shown in FIG. 54 are obtained.

(9) Diffusion processing of ambiguous flags Obtained and modified based on the processing of (1) to (8) above. The grid point 2 bell chord shown in FIG.
Perform figure extraction processing.

FIG. 54(A) In the lattice point table in the state shown in K, one section 1 to 11 is cleared except for the leading ambiguity flag and the lower 4 bits of sections 12 to 15. That is, as shown in FIG. 54(b)K, only sections 0 and 2 sections 12 to 15 of the lattice point label code are left and the others are deleted. Then, set the ambiguity flag "1" to this section 0 and set it to section 12.
˜15 to grid points having a direction code in which at least one is “1”. This state is shown in FIGS. 57 and 58.

ζ In Figure 57, the handwritten drawing shown in Figure 1155 was read with an optical reader, and the resulting input double image information shown in Figure #1156 was processed as in (1) to (8) above. This shows the state in which the resulting lattice point label code is graphically output (restored), and the O symbol indicates the lattice point where the ambiguity flag "1" exists. Then, the ambiguity flag "1" indicated by the 'O' mark is diffused to grid points having a direction code, that is, grid points where a block pattern or a wide wiring pattern exists.

[Step 1] Horizontal scanning (a) In FIG. 57, horizontal scanning is performed, for example from left to right, to detect the ambiguous lattice point label code of 75 groups "1". And the lattice point in the direction to the right; −
If the ambiguous 72 code is not "1" and does not have a direction code, i.e. at least 1 in categories 12-15.
If it is not "1", rlJK the ambiguous 72 g of the grid point 2 bell code in the direction of this right neighbor. Next, the right neighbor of the grid point label code whose vague flag is set to "1" in this way Find the grid point label code of and perform the same process. In this way, horizontal scanning is performed from left to right while performing similar processing up to the right end in FIG.

(b) Next, horizontally scan each lattice point label code that has been processed in (a) above from right to left, and flag the ambiguity flag.
1” is detected. Then check the grid point label code to the left of it.

If there is no direction code, set the ambiguity flag to "1"
Make it. Next, the lattice point label ;- code on the left side of the lattice point label code whose ambiguous hook has been newly set to "1" is checked, and the same processing is performed. In this way, horizontal scanning is performed from right to left while performing similar processing up to the left end in FIG.

[Step 2] Vertical scanning (a) After performing the horizontal scan in step 1 above.

This is first scanned vertically from bottom to top, and the ambiguity flag is
1” is detected. Then, check the grid point label code above it, and if the ambiguity flag is not "1" and there is no direction code, set the ambiguity flag to "1".0 Next, the grid point label above it; - Check the code and perform the same process. In this way, the same processing is performed from the bottom end to the top end in FIG. 57, and vertical scanning is performed from bottom to top.

(b) Next, each grid point 2 where the vertical scanning of (a) above was performed
Vertically scan the Pell code from top to bottom and check the ambiguity flag "
1" lattice point 2 pel code is detected. Then, the grid point label code below it is checked, and if it does not have a direction code and its ambiguity flag is not "1", the ambiguity flag is set to "1".

Next, the two pel codes of the lattice points below it are examined and the same processing is performed. In this way, the same processing is performed from the upper end to the lower end in FIG. 57, and vertical scanning is performed from top to bottom.

[Step 5] Judgment After the above stellar ti, the above steps 1 and 2 are performed again, and the steps 1 and 2 are repeated until there is no change in the number of lattice point label codes with the ambiguity flag "1". Repeat. In this way, a grid point label code as shown in FIG. 58 is obtained.

a. Extraction processing of block pattern candidates Only the rectangular areas buried in the lattice point label codes with ambiguity flag "1" are extracted as block pattern candidates.

[Step 1] Ambiguity flag rOJ processing for boundary grid points In Figure 58, check the grid point label code of the boundary grid point (the outermost grid point in Figure 58), and check if the ambiguity flag is "1". If there is, set it to "0".

[Step 2] Horizontal scanning (a) After the processing in step 1 above, the leftmost grid A9
Check the ambiguity flag of the pel code and detect the lattice point label code with the ambiguity flag "0".

Then, check the grid point 2 pels to the right of it, and if it does not have a direction code, set its ambiguity flag to "0". Next, the lattice point 2 pel code on the right side of the lattice point label code whose matching flag has become "0" K is checked, and the same process is performed. In this way, horizontal scanning is performed from left to right while performing similar processing up to the right end in FIG.

(b) Next, check the ambiguity flag of the rightmost lattice point label code for each lattice point label code that has been processed in (a) above, and detect the lattice point label code with the ambiguity flag "0". . Then, check the lattice point label code in the direction adjacent to the left, and if there is no direction code, set the ambiguous hook to "0".

Next, the lattice point label code on the left side of the lattice point label code whose ambiguity flag has become "0" K is checked, and if it does not have a direction code, its ambiguity flag is set to "0". In this way, the lattice point label code to the left of the lattice point 2 pel code whose ambiguity flag has been newly set to "0" is checked, and the same processing is performed. In this way, horizontal scanning is performed from right to left while performing similar processing up to the left end in FIG.

[Step 5] Vertical scanning (a) After performing the horizontal scanning in step 2 above, the ambiguity flag of the lattice point label code at the lower end of the control is checked, and the lattice point label code of the ambiguity flag rOJ is detected. Then check the grid point label code above it,
If there is no direction code, set the ambiguity flag to "0"
Press. Next, do K like this and set the ambiguity flag to "0"
Check the grid point label code above the nine grid points (Pelcor).

Perform the same process. In this way, vertical scanning is performed from bottom to top while performing similar processing up to the top end of the 58th diagram.

(b) Next, each grid point 2 where the vertical scanning of (a) above was performed
Next, the ambiguity flag of the lattice point label code at the upper end of the bell code is checked, and the lattice point label code with the ambiguity flag "0" is detected. Then check the lattice point label code below it, and if it does not have a direction code, set its ambiguity flag to "0". 0 Next, the lattice point 2 bell whose ambiguity flag became "0" in this way; - Check the grid point label code below the code and perform the same process. In this way, vertical scanning is performed from top to bottom while performing similar processing from the top end to the bottom end in FIG.

[Step 4] Judgment After the vertical scanning in Step 5 above, the processing in Steps 2 and 3 above is performed again, and the ambiguous 72 group is "0".
These steps 2 and 3 are repeated until there is no change in the number of lattice point 2 bell chords. In this manner, the grid point label code shown in FIG. 59 is obtained.

aυ Plex pattern i1#lIA Process This block pattern recognition process separates and extracts block pattern candidates one by one.For this purpose, there are wiring patterns at the four corners of the block pattern. Taking advantage of the curator's condition of being shy, I can recognize this block no (tar/).

[Step 1) Extraction of one block pattern candidate (a) The grid point label code in Fig. 59 is sequentially scanned horizontally from the upper left corner, for example, to obtain a grid point label with an ambiguity flag of "1" and an end flag of "0". Detect code. This end flag means that it has been extracted once as a block pattern candidate.

For example, section 1 of the grid point label code shown in FIG. 63 is used. In this case, first the plect pattern WAC)
Because the ambiguity flag "1" corresponding to the upper part grid point 2 bell code of IE is detected first.

An identification bladder "1" is set for this block pattern candidate to distinguish it from other block pattern candidates. This identification flag is.

For example, use section 2 of the grid point label code shown in FIG. 63 and set it to "1". Then there is the end flag "
1”.

(b) Identification 7 lag “1” given in (a) above
above (9) Ambiguous bladder diffusion processing term K1M! In the same manner as described above, horizontal and vertical scanning is performed in the range up to the grid point label code having the direction code, and the Orimae flag is set to "1". In this way, first, all the grid point label hoods in the block pattern W are marked with the identification flag "1".
” will be added, and a set of lattice point labels with this identification 72 tag “1” will be extracted as an internal region of one block pattern candidate.

[Step 2] Block pattern iIllm (a)
The collection area of the lattice point labels with the identification 7 lag "1" extracted as described above is taken as a rectangle, and the minimum lattice point address I and the maximum lattice point address J are extracted. That is,
When the collection area of the lattice point labels of the identification flag "1" is indicated by the circle mark K shown in FIG.

j-0 becomes the maximum grid point address. In addition, if this collection area is non-rectangular as shown by the circle in FIG. 60(b), I-1 becomes the minimum grid point address, and
is the maximum grid point address.

(b) Next, it is checked whether the ambiguity flag of the lattice point label code in the rectangular area formed by the minimum lattice point address l and the maximum lattice point address j is "1".

■The fuzzy bladder of all grid point label codes is “1”.
'', as shown in ■-1 No. 60 @ (a) K, all the ambiguity flags of the lattice point label codes in the rectangular area formed by the minimum lattice point address i-0 and the maximum lattice point address j-0 are `` 1'', the grid point label codes at the four corners of the block pattern candidate are checked based on this rectangular area. At this time, Figures 61 (a) and (b).

As shown in ()→, the lattice A'y of the corner to be checked first (the corner for the minimum lattice point address in these examples)
If the pel code indicates a key shape and the lattice point label code at the other three corners is a key shape or a key shape and a T-shape, it is considered a block pattern, and the lattice points of the lattice points on the four sides of the rectangle forming the block pattern are Label code: If a block flag "1" is set to indicate a turn, the block number will be assigned to "4".For example, this block flag will use the area of section 11 as shown in Figure 63. However, the block number can use the area of divisions 3 to 10.

■-2 Also, in ■-1 above, the corner where the grid point label code of the four corners of the block butter/candidate is carefully checked (in these examples, the corner corresponding to the minimum grid point address)
If the lattice point 2 pel code of 2 indicates a T-shape, and the lattice point label codes of the other 5 corners are key-shaped or T-shape, check the ambiguity flags of the lattice points indicated by O marks in the dotted line diagram.

If both are "1", it is block pattern and III weaving.

In the same manner as in (1) above, the block flag "1" is set and block numbering is performed.

In this way, in FIG.
, NI, N, A, etc., block flags and block numbers are sequentially assigned.

■ Part of the grid point label code in the rectangular area KI) If there is a bad flag that is not “1” Figure 60 (b)
As shown in K, an ambiguity flag r1. When there is a part that is not J, (a part without a 0 mark in the figure), the collection area of the lattice point label code of this identification flag "1" is dangerously rectangular and will not be recognized as a block pattern.

The ambiguity flag and identification flag within this rectangular area are then "OJ K" as in step 10 above.

Extraction processing for the next block pattern candidate will be performed.

[Step 5] Writing the print pattern Step 2 above
■-1. (2) The pull number, minimum grid point address, and maximum grid point address of the block pattern/II identified as in -2.

It is held as a table as shown in FIG. 64(b).

Then, repeat the steps 1 to 30 described above until there are no more block pattern candidates.
More block pattern li! ! The fabric and its description are finished. Among the recognition results of the nine block patterns obtained by this process, the grid points of the block flag 1 are shown as thick lines in FIG.

(11 Wiring pattern extraction processing) This wiring pattern extraction processing is an I & Maro process that displays the wiring pattern as a vector to show how the block patterns recognized in the above 1e are connected.

For this purpose, grid points with block flag "1" are detected by scanning. For example, the lattice point of block 7 "1" of block pattern WA in FIG. Capture the wiring pattern. Add this to block 75 of each block pattern.
By sequentially tracing the grid points of 1 in the direction indicated by the direction code, it is possible to detect intersections, inflection points, and endpoints.

In this way, the wiring pattern can be expressed as a vector.

Next, the configuration of an embodiment for performing the above processing will be explained in the sixth section.
The explanation will be based on Figures 6 (a) and (b) K. 66(b) and the chain m part in FIG. 66(a) K, the output of the fifth ambiguity correction circuit 32 is at the grid point 2
The code is transmitted to the peni code table 55.

In the figure, it is an image input device made by one company, and it is shown in Figure 1 or 5.
It reads the handwritten drawing shown in FIG. 5, converts it into image data, and outputs it. For example, it is similar to a facsimile. Reference numeral 2 denotes an image command, which is transmitted from the image input device 1 and holds large image data. S is a verification circuit that performs the first to fifth verification processes described above. 4 is a reference point detection circuit, and j11
As shown as a + mark in the figure or FIG. 55.

The input addresses of the nine reference points previously entered on the input data sheet are detected to calculate, for example, the rotational deviation that occurs in the step of inputting one image, and based on this, the positional deviation of the base data to be read from the image display is calculated. This is the ninth correction, and it is 1
For example, patent application W354-974, which the applicant has previously filed
No. 13 has the following structure. The S-Hiro grid point table is a table that holds the addresses of the grid points of the input image data, and the reference point detection a is approximately 4.
An address whose distortion has been corrected based on the corrected output from is held.

6 is a lattice conversion circuit (horizontal ν), which converts the initial lattice point label code I, BL or second verification label code LB2.
In order to extract the data, read out the vicinity of the lattice points of the Kll image data in the affected area of 2x2, which is the size of the lattice axis.

For example, as shown in FIG. 4, the affected area Wl-1 of <mX1 bits is scanned, and the horizontal projected image is held in the holding unit set -xK. 7 company lattice point label code generation circuit (horizontal), as shown in Figure 5 (A).

Holding part R1-! This is a turtle that performs processing to determine the probability that the hot spot exists in the right direction t or left direction based on the sunspot information held in %.

In the 8-acid lattice conversion circuit (vertical), in order to extract the initial lattice point Lape: I-de LBL ~ second verification label; A 2X20 window can also be read at, for example, a <ylXn bit window W1-! as shown in FIG. The vertically projected image is held in the holding portion R1,1. 9 company lattice point label: -D Sumui circuit (vertical), as shown in IIs diagram (b), based on the black point information held by holding part R1-YK, one minute is upward t or downward It calculates the possibilities that exist in , and performs rounding.

Reference numeral 10 denotes an address control section which performs necessary controls such as generation of an address for extracting necessary image data from one image menu 2. Reference numeral 11 denotes a control unit which reads data from one handwritten drawing, performs various processes as described above, holds it as vector information, and performs various controls until outputting a figure based on this as necessary. be.

Reference numeral 12 denotes a verification window setting circuit, which sets various windows necessary for performing the first to third verification processes.

1!5FiLBL table, which holds the initial lattice point label code LBL obtained based on the extraction of the above-mentioned initial lattice point label code LBL. 14 is the LB1 table, in which the first verification lapel gord L
First verification label code L obtained based on extraction of B1
This is a table that holds B1. 15 is the LB2 table.

This table holds the second verification label code LB2 obtained based on the extraction of the second verification label code LB2.

16 is an 8X1/8Y1 table, which contains first verification deviation information SX1 and 8Y obtained as a result of the above first verification process.
This is a table that holds t. 17 companies SX2/8Y2
A second table obtained as a result of the second verification process described above.
This is a table that holds verification deviation information 8X2 and 8Y2.

Reference numeral 18 denotes an address conversion circuit which converts the first verification deviation information SX1 and 8Y1 or the above 8Y1 transmitted from the upper y8X1-8Y1 table 16 to perform normalization processing.
The second verification deviation information 8X2 and 8Y2 transmitted from the X2/8Y2 table 17 is converted into an address shifted by the number of bits required to normalize the lattice point address transmitted from the transposed lattice point table 5. This is the 4th output.

Reference numeral 19 is an LBH generation circuit that performs the processing described in (6)K above to generate the fifth verification 2 pel code LB3, and 20 is an LB3B3 table that
Third verification code LB obtained by the generation circuit 19
This is a table that holds 5.

21 is a grid point label code determination circuit;

The process described in (7) above is performed to obtain the lattice point 2-pel code LABRL. Reference numeral 22 denotes a LABEL table, which holds the lattice point 2 label code LABBL obtained by the lattice point label code determination circuit 21.

Reference numeral 25 denotes a pair processing circuit which performs the pair processing-1 and the pair processing-2 in (8)K above. 24 is a first character removal circuit.

The process described in (8) above (■Character Removal-1) is performed. 25 is a first deviation correction circuit.

This process performs the correction of deviation -1 in the above 181K. 26 is the first ambiguity correction circuit, which performs the process of ■ ambiguity correction -1 in upper E (81K).
8) Correction of deviation in K - 2 geography is performed. 28 is the 26th ambiguity correction round, and the above (8)
This is to perform the processing of (2) ambiguity correction in K. Reference numeral 29 denotes an ambiguous arm removal circuit, which performs the process of (1) removing the ambiguous arm in (8) above. 50 is a second character removal circuit which performs the character removal-20 process in (8) above. Sl is a fifth character removal circuit that performs the process of removing the [stock] character-3 in (8) above. Reference numeral 52 denotes a third ambiguity correction circuit, which performs the process of (8)K (1) ambiguity correction-3.

53 is a grid point 2 bell code table.

1 in the state shown in Figure 54 (a) or Figure 57
This is a memory that holds a 6-bit grid point 2 pel code. 54 is an ambiguous flag diffusion circuit, which is
), steps 1 to 5 are executed. 55 is a block pattern candidate extraction circuit, which performs steps 1 to 4 in a@ above.
This process performs the following processing. 56 is a block pattern recognition WA step.

It performs the processing of steps 1 to 3 in the above alK. 57 is a break pattern description table, which is a memory in which the processing result of step 5 in (II)K above is held. Reference numeral 58 is a vector conversion circuit which extracts intersection points, inflection points, and end points according to 4 in the extraction of the wiring pattern in alK, and then extracts these intersection points,
It captures the contact information of inflection points, end points, and block pattern connections, and converts them as vector information. 5
Reference numeral 9 denotes a wiring pattern description table, which is a memory that holds vector information of the wiring pattern transmitted from the vector conversion circuit 38.

The operation of the proverb 66 diagram will be explained below.

(A1 The handwritten drawing shown in FIG. 1 is read by the image input device 1 and the image data is stored in the image memory 2. The input state of the reference point is determined from the image data held in the image memory 2. The address of each grid point detected by the circuit 4 and corrected based on the input distortion is held in the grid point table 5.

(B) Next, the control unit 11 reads out one image 2 in a 2×2 window with the size between the lattice axes based on the address obtained from the lattice point table 5, and transfers it to the lattice conversion circuit (
(horizontal) 6 and lattice conversion circuit (vertical) IIK, and the window portion Wl-1tW1-! as shown in FIG. The resulting holding portion R1-! *The data of R14 is explained in Fig. 5 (a) and (b) K in (1) above using the grid point label code generation circuit (horizontal) 7 and the grid point label code generation circuit - (vertical) 9. The initial lattice point label code LBL is extracted by performing the following processing. Then, this initial grid point label code LBL 1kLBL table 13 is entered.

fcl Then, in accordance with this initial lattice point 2 pel code LBL, the verification window setting circuit 12 sets the first verification window portions Wvo~w, , W, . . . ~W as shown in FIG.
Set the one to be used among (2), perform the first verification process on the abstract verification circuit 3, and convert the first verification deviation information 8X1°8Y1 obtained as a result to 8X1・8Y1.
Fill in table 16.

(D) First verification deviation information 8 obtained by performing K in this way
Based on X1, 8Y1, the address conversion circuit 18 shifts the lattice point address of the lattice point table 5, normalizes it as described in (3) above, and then returns it to the lattice conversion circuit (horizontal). 6 and a lattice conversion circuit (vertical) 8;
Lattice point label code generation circuit (horizontal) 7 and lattice point label code generation circuit (vertical)? The first verification label code LB1 is determined by the following and is entered in the LB1 table 14. Based on this first verification label code LBIK4, the verification window setting circuit 12 sets the second verification window portions BWy@ to BWvs, BW as shown in FIG.
ms to B Win to be used is set, and the verification circuit 3 then performs the second verification process. Then, the second verification deviation information 8X2, 8Y2 obtained as a result is stored in the 8X2.8Y2 table 16KF! Enter.

iml Second verification deviation information 8 obtained in this way
The address conversion circuit 18 shifts the grid point address obtained from the grid point table 5 using X2, 8Y2 and normalizes it as described in (5) above.
The second verification 2 pel code LB2 is obtained in the same manner as LB2. Fill in table 15. (Fl Next, as shown in FIG.
is set in the verification window setting circuit 12, and the above (6)K
The processing is performed in the verification circuit 5 as described. Then, the data obtained as a result is sent to the LB3 generation circuit 19, and the processing described in (6)K above is performed.
Since the third verification label code LBiS is obtained, it is entered in the LBi5 table 20.

(Gl And the third verification label code LB! transmitted from the LB5 table 20, the initial grid point label code LBL written in the LBL table 1!1, the first verification label code LB1.LB written in the LB1 table 14
2 Second verification 2 Bell code LB entered in table 15
2, 8X1, 8Y1 table 17 filled in the happy 1 verification deviation information 8X1, 8Y1, 8X2φ8Y2 table 17
The lattice point label code determination circuit 21 performs the processing described in (7)K above based on the second verification deviation information 8 221'C
Filled out.

This LA] 3BL The grid point tube code LABBLK entered in the 3BL table 22 is
Each of the processes in (2) corresponds to the corresponding ma circuit 2s, one character removal circuit 24. Iris 1 deviation correction circuit 25. First ambiguity correction circuit 26. Second deviation correction circuit 27° Second ambiguity correction circuit 28. Ambiguous arm removal circuit 29. Second character removal circuit 3
o, 5th character removal @S1. Fifth ambiguity correction circuit 32
etc. Thus, the fifth ambiguity correction circuit 3
From 2.

A lattice point label code as shown in FIG. 54(a) or FIG. 57 is obtained and held in the lattice point 2 bell code table 153 in FIG. 66(b).

(Il Lattice point label code table s s K11
For example, the ambiguous flag diffusion circuit s4 performs the ambiguous flag diffusion II& of the above (9) on the lattice point label code in the state shown in FIG. This is 5th from K
The lattice point labels shown in FIG. 8 are obtained.

(Jl) Then, the block pattern candidate extraction circuit 55 extracts the block pattern candidates of Qll from the grid point label code in the state shown in FIG. 58. From this, the lattice point label code in the state shown in FIG. You will get the point label code.

(K) The block pattern recognition circuit 36 calculates the block pattern of al above for the lattice point 2 bell code obtained by K in this manner and shown in FIG. 59.

Perform recognition processing. As a result, the block pattern indicated by the thick line in FIG. 65 is obtained, and from this the number of the plex pattern, its minimum lattice point address E and maximum lattice point address J are output, and the plex pattern description tape ks7 is output. These data are held in the state shown in FIG. 864 (b) K. This bold line block pattern is then written into the grid point 2 bell code table 35.

(The IJ t vector conversion circuit 58 is held in the lattice point label code table 55. The nine-pocket pattern indicated by the thick line in FIG. 65 is sequentially scanned to extract the wiring pattern of Do the following.

Then, by capturing the nine intersection points, cross points, end points, etc. obtained from this, the wiring pattern is drawn into II lines, and this is expressed as a vector. The wiring pattern expressed as a vector using K in this way is held in the wiring pattern description table 59fC. Then, in the block pattern description f-pull S7 and the wiring pattern description table 39, the serving plan entered in the handwritten Kugata drawing as shown in FIG. 55 is retained as clean graphic information (vector information) as shown in FIG. I can do it.

As explained above, according to the second invention, handwritten input image information containing a mixture of characters, figures, etc. is compressed as grid point label codes on grid points, and based on this information, graphic parts and wiring parts are correctly extracted as vector information. However, since these can be printed as figures as necessary, circuit design using a computer can be carried out extremely efficiently.

[Brief explanation of the drawing]

FIG. 1 is a handwritten input diagram, and FIGS. 4 to 6 illustrate a method for extracting the initial grid point 2-pel code LBL. 7 to 9 are explanatory diagrams of the initial lattice point 2 pel code LBL corresponding to each image data;
Figure 1 is an explanatory diagram of the first verification method, Figures 12 to 15 are explanations of the first verification corresponding to various image data, 1E16
Figures 19 to 19 are normalization state diagrams based on the first verification,
Figures 20 to 25 are explanatory diagrams of the second verification results;
Figures 4 to 27 are explanatory diagrams of the nine states and their label codes normalized according to the results of the second tomb verification, Figure 28 is an explanatory diagram of the third verification mask, and Figure 29 is an explanation of the fifth verification label code. The sO diagram or the 5s diagram is the third diagram for various figures.
Verification method and fifth verification label code. Figure 34 is the grid point label code, Figure 35 to jll
E311wJ is an explanatory diagram of lattice point label codes for various figures, Figures 39 to 54 are figures restored based on the correction state of the grid point label code LAB]ilL and the consistency of the correction, and Figure 55 is an illustration of other handwritten figures. Drawing, 5th
6 is the input image information input from FIG. 55, FIG. 57 is a restored diagram of the lattice point label code in the handwritten drawing of FIG. 55 after modification corresponding to FIG. 54, and FIG.
Explanatory diagram of the diffusion state of the ambiguous flag in Fig. 7, No. 59
The figure is an extraction diagram of block pattern candidates, Figures 60 to 62 are illustrations of mm-shaped vagina of block patterns, Figure 6s is an illustration of lattice point label codes in the state of Figure 62,
Fig. 64 Explanation diagram of the description state of the screen opening pattern, Fig. 65
The figure shows the block pattern and wiring pattern.
FIG. 6 is a configuration diagram of an embodiment of the present invention. In the figure, 1 is an image input device, 2 is an image memory, S is a verification circuit, 4 is a reference point detection circuit, 5 is a grid point table, 6 is a grid conversion circuit (horizontal), and 7 is a grid point 2 Pelco code generation circuit (horizontal), 8 is a lattice conversion circuit (!i[), ? are lattice point labels; -de production circuit (vertical), 1o is the address control section, and 11 is the control section. 12-state verification window setting circuit, 1s is LBL table, 14tiLBt table, 15 is LB2 table, 1
6 Hiro 8X1/8Y1 table, 17 8X2/SY2 table, 18 address conversion circuit. 19 is LBi5 generation circuit e 20 tf LB S f
-Pull. 21 company lattice point tuber code determination circuit, 22 is LABII
L? - F#, 25 liNmNMmm, 24
till 1 * character removal circuit, 25 is tuna 1 deviation correction circuit, 26 is 111 deviation correction circuit, 27 is Hirou 2 deviation correction @ road, 28 is second ambiguous correction circuit, 29 is ambiguous arm removal circuit, sO is the second character removal circuit, sl is the third character removal circuit, 32 is the Hiro third ambiguity correction circuit, 5s is the grid point label code table, 34 is the ambiguity 7 lag diffusion circuit, 35 is the block pattern candidate extraction circuit, 56 is the block 3 shows a pattern recognition circuit, 37B a block pattern description table, 38 a bar conversion circuit, and 39 a wiring pattern description table. Patent Applicant Fujitsu Ltd. Representative Patent Attorney Yamatani Takashi Eisai +41!1 Sai I51!1 Sai IGIII t17 Figure R1-X 101113 Gate ni 1-x Sai1'lln °°°°°°B%o Vol.
・Skill ZS Mouth Skill z[l (A) Su27 Figure (B) -・1-Written 31 j≧L f30 Figure LBs-oooo01o+. 131 Countries L83-00000101 Procedural Amendment (Method) December 1, 1980 2, Name of invention Graphical information extraction method 3, Relationship with the person making the amendment Case Patent applicant address Nakahara-ku, Yozaki City, Kanagawa Prefecture 1015 Kamiodanaka Name (522) Fujitsu Ltd. Representative Takuma Yamamoto 4, Agent 5 Date of amendment order November 58, 1981 Sent date
Contents of the November 24, 1981 amendment 1: "Figure 1 is a handwritten input diagram" on page 67, line 16 of the specification was changed to "Figure 1 is a handwritten input diagram, and Figure 2 is a grid point processing area. The explanatory diagram, FIG. 3, is an example of a local rectangular area centered on a lattice point and a figure in that area.''that's all

Claims (1)

[Claims] (1) A w-image input means, an image data holding means for holding the image data input from the scissor-image input means, and a lattice point for generating a lattice point label code indicating the possibility of existence of KiI image data near the lattice point. A label code generating means, a label code holding means for holding the grid point label code, a verification means for verifying the positional deviation between the information of the grid point label code and the image data from the grid axis, and and a positional deviation information holding means for holding positional deviation information. a shape change means for determining a local shape change of image data and identifying the possibility of a character stroke; a shape change label holding means for holding round shape change>bell information outputted from the shape change means; An aggregated lattice point label determining means for determining an aggregated lattice point label code aggregated by code 2 positional deviation information and shape change label information. A character flag diffusion means for diffusing character 72g indicating the possibility of a character stroke in this intensive lattice point label code, and a character 7g erasing means for erasing character flags in a portion not surrounded by a line. A graphic information extraction method characterized in that a block pattern is extracted from a single character/graphic mixed drawing by comprising a block pattern extracting means for extracting a block pattern.