JPS5830356U - radio receiver - Google Patents

radio receiver

Info

Publication number
JPS5830356U
JPS5830356U JP12424181U JP12424181U JPS5830356U JP S5830356 U JPS5830356 U JP S5830356U JP 12424181 U JP12424181 U JP 12424181U JP 12424181 U JP12424181 U JP 12424181U JP S5830356 U JPS5830356 U JP S5830356U
Authority
JP
Japan
Prior art keywords
voltage
oscillator
frequency amplifier
amplitude value
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12424181U
Other languages
Japanese (ja)
Inventor
哲 西尾
誠一郎 平田
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP12424181U priority Critical patent/JPS5830356U/en
Publication of JPS5830356U publication Critical patent/JPS5830356U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のラジオ受信機のブロック構成図、第2図
は本考案の一実施例を示すブロック構成図、第3図は本
考案の一実施例によるラジオ受信機の電圧合成器と高周
波増幅器の同調部及びそのその周辺回路を示す回路図、
第4図は本考案の一実施例によるラジオ受信機の同調補
正動作を示す波形図である。 40・・・位相同期ループ、29′・・・電圧合成器、
30・・・発振器、swl・・・スイッチ、21・・・
検波回路、42・・・マイクロコンピュータ(制御回路
)。 なお図中同一符号は同−又は相当部分を示す。
Fig. 1 is a block diagram of a conventional radio receiver, Fig. 2 is a block diagram of an embodiment of the present invention, and Fig. 3 is a voltage synthesizer and high frequency diagram of a radio receiver according to an embodiment of the present invention. A circuit diagram showing the tuning section of the amplifier and its peripheral circuits,
FIG. 4 is a waveform diagram showing a tuning correction operation of a radio receiver according to an embodiment of the present invention. 40... Phase locked loop, 29'... Voltage synthesizer,
30...Oscillator, swl...Switch, 21...
Detection circuit, 42... microcomputer (control circuit). Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 高周波増幅器の同調回路と局部発振器の発振回路とに可
変容量ダイオードを使用した位相同期ループ周波炊数シ
ンセサイザ一方式ラジオ受信機において、上記局部発振
器を構成する電圧制御発振回路を含みその局部発振出力
を混合器を加える位相同期ループと、上記電圧制御発振
回路への印加電圧と後述する制御回路からの補正電圧と
を合成し上記高周波増幅器の可変容量ダイオードに合成
−電圧を与える電圧合成器と、上記位相同相同期ループ
がロックした後に受信周波数と同一周波数め信号を発生
する発振器と、この発振器の出力をアンテナからの受信
信号と切替えて上記高周波増幅□  器に入力するスイ
ッチと、上記発振器の出力がキ記高周波増幅器、混合器
、中間周波増幅器および中間周波数を中心とする帯域フ
ィルタを通った信号の振幅値を検出する検波回路と、こ
の検波回路の出力振幅値と上記電圧合成器に加える補正
電圧を変化させたときの振幅値とを比較するとともにそ
の比較結果に応じて上記電圧合成器に加えるべき補正電
圧を変化させ最大振幅値が得られたとき上記補正電圧を
固定保持する制御回路とを備えたことを特徴とするラジ
オ受信機。
A phase-locked loop frequency synthesizer one-type radio receiver that uses variable capacitance diodes in the high frequency amplifier's tuning circuit and the local oscillator's oscillation circuit includes a voltage controlled oscillation circuit that constitutes the local oscillator, and its local oscillation output. a phase-locked loop that adds a mixer; a voltage synthesizer that combines the voltage applied to the voltage controlled oscillation circuit with a correction voltage from a control circuit (described later) and provides a combined voltage to the variable capacitance diode of the high frequency amplifier; an oscillator that generates a signal with the same frequency as the received frequency after the phase-in-phase locked loop is locked; a switch that switches the output of this oscillator to the received signal from the antenna and inputs it to the high frequency amplifier; and the output of the oscillator. A high frequency amplifier, a mixer, an intermediate frequency amplifier, a detection circuit that detects the amplitude value of a signal that has passed through a bandpass filter centered on the intermediate frequency, and a correction applied to the output amplitude value of this detection circuit and the voltage synthesizer above. a control circuit that compares the amplitude value when the voltage is changed, changes the correction voltage to be applied to the voltage synthesizer according to the comparison result, and holds the correction voltage fixed when the maximum amplitude value is obtained; A radio receiver characterized by comprising:
JP12424181U 1981-08-21 1981-08-21 radio receiver Pending JPS5830356U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12424181U JPS5830356U (en) 1981-08-21 1981-08-21 radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12424181U JPS5830356U (en) 1981-08-21 1981-08-21 radio receiver

Publications (1)

Publication Number Publication Date
JPS5830356U true JPS5830356U (en) 1983-02-28

Family

ID=29918119

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12424181U Pending JPS5830356U (en) 1981-08-21 1981-08-21 radio receiver

Country Status (1)

Country Link
JP (1) JPS5830356U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62204609A (en) * 1986-03-05 1987-09-09 Matsushita Electric Ind Co Ltd Preset tuner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62204609A (en) * 1986-03-05 1987-09-09 Matsushita Electric Ind Co Ltd Preset tuner

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