JPS5826860B2 - phase tracking device - Google Patents

phase tracking device

Info

Publication number
JPS5826860B2
JPS5826860B2 JP52145824A JP14582477A JPS5826860B2 JP S5826860 B2 JPS5826860 B2 JP S5826860B2 JP 52145824 A JP52145824 A JP 52145824A JP 14582477 A JP14582477 A JP 14582477A JP S5826860 B2 JPS5826860 B2 JP S5826860B2
Authority
JP
Japan
Prior art keywords
phase
tracking
signal
phase tracking
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52145824A
Other languages
Japanese (ja)
Other versions
JPS5478697A (en
Inventor
瞬二 高橋
三郎 片岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP52145824A priority Critical patent/JPS5826860B2/en
Publication of JPS5478697A publication Critical patent/JPS5478697A/en
Publication of JPS5826860B2 publication Critical patent/JPS5826860B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明はオメガ受信機等において、雑音の重畳した入力
信号中の信号成分の位相を追尾する位相追尾装置に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase tracking device for tracking the phase of a signal component in an input signal on which noise is superimposed, in an omega receiver or the like.

従来この種の装置はその入力端子からの信号にパルス性
の雑音が重畳した場合、信号の一時的な位相変動として
観測され、装置内部の位相追尾信号の位相がこれに応答
して不必要な変動を起こすという欠点があった。
Conventionally, in this type of device, when pulse noise is superimposed on the signal from the input terminal, it is observed as a temporary phase fluctuation of the signal, and the phase of the phase tracking signal inside the device responds to this, resulting in unnecessary noise. It had the disadvantage of causing fluctuations.

本発明はこの欠点を除去するために、位相追尾信号に対
する入力信号の位相の変動を検出し、時的な位相変動が
生じた場合に位相追尾系の動作を一時的に停止させるこ
とによって、パルス性雑音重畳の影響による位相追尾信
号の不必要な変動を取り除くことを可能としたもので、
以下図面により詳細に説明する。
In order to eliminate this drawback, the present invention detects fluctuations in the phase of the input signal with respect to the phase tracking signal, and temporarily stops the operation of the phase tracking system when a temporal phase fluctuation occurs, thereby detecting the pulse This makes it possible to remove unnecessary fluctuations in the phase tracking signal due to the influence of superimposed noise.
This will be explained in detail below with reference to the drawings.

第1図は本発明の実施例を示すブロック図で、1は位相
追尾回路、2は誤差検出回路、3は信号入力端子、4は
位相追尾制御回路、5は信号追尾識別回路である。
FIG. 1 is a block diagram showing an embodiment of the present invention, in which 1 is a phase tracking circuit, 2 is an error detection circuit, 3 is a signal input terminal, 4 is a phase tracking control circuit, and 5 is a signal tracking identification circuit.

次にその動作を第2図の各部波形図により説明する。Next, the operation will be explained with reference to the waveform diagram of each part in FIG.

位相追尾回路1はいわゆるフェイズ・ロック・ループ(
PLL)であり、その出力信号である位相追尾信号は入
力信号の立ち上がり、すなわち0位相の点θS(θs1
.θs2・・・・・・)を検出し、この点にθR(θR
1,θR2・・・・・・)の位相追尾動作を行うことに
よって入力信号と同じ位相で発振する信号を作り出すも
のである。
The phase tracking circuit 1 is a so-called phase-locked loop (
PLL), and its output signal, the phase tracking signal, is at the rising edge of the input signal, that is, at the 0 phase point θS (θs1
.. θs2...) is detected, and θR (θR
1, θR2...) to produce a signal that oscillates in the same phase as the input signal.

このような位相追尾回路の場合入力信号との立ち下がり
側が位相追尾動作に用いられないことを利用し、以下に
示すような動作を行わせる。
In the case of such a phase tracking circuit, the following operation is performed by utilizing the fact that the falling side of the input signal is not used for phase tracking operation.

まず誤差検出回路2は位相追尾回路1によって位相追尾
された位相追尾信号の立ち下がり(π位相の点)から信
号入力端子3より入力される入力信号の立ち下がり(π
位相の点)との時間差を検出する一種のタイマー回路で
ある。
First, the error detection circuit 2 starts from the falling edge (π phase point) of the phase tracking signal phase-tracked by the phase tracking circuit 1 to the falling edge (π phase point) of the input signal input from the signal input terminal 3.
This is a type of timer circuit that detects the time difference between the phase point and the phase point.

なお、この時間差とは両信号の位相差と等価である。Note that this time difference is equivalent to the phase difference between both signals.

ここでパルス性雑音等の原因により入力信号の位相が一
時的に変動し、その時間差の値がある一定値Jtを越え
ると誤差検出回路2はその時点で直ちにパルスを発生し
出力する。
If the phase of the input signal changes temporarily due to pulse noise or the like, and the time difference exceeds a certain value Jt, the error detection circuit 2 immediately generates and outputs a pulse at that point.

その様子を第2図に示す。The situation is shown in Figure 2.

第2図Aは入力信号波形Bを位相追尾した結果の出力波
形で位相追尾回路1の出力に相当する。
FIG. 2A shows an output waveform as a result of phase tracking the input signal waveform B, and corresponds to the output of the phase tracking circuit 1.

第2図中θR2→θR2ではJtを越えないので誤差検
出回路出力波形Cにはパルスが現われないがθR2’→
θ82’ではAtを越えているのでパルスが発生したこ
とを示している。
In Figure 2, θR2→θR2 does not exceed Jt, so no pulse appears in the error detection circuit output waveform C, but θR2'→
At θ82', it exceeds At, indicating that a pulse has occurred.

誤差検出回路2は、第2図位相追尾信号AのθR2゜θ
R2・・・・・・すなわち立下り点より士△tの点にお
いて入力信号Bを観測し、−Atの点において入力信号
が論理“0″であったとき、また+△tの点において論
理“1″であったときに、たとえば誤差検出回路2に含
まれる単安定マルチ バイブレータ等のパルス発生器に
トリガを与えることにより誤差検出回路出力Cを作り出
すことができる。
The error detection circuit 2 detects θR2°θ of the phase tracking signal A in FIG.
R2...In other words, when the input signal B is observed at a point △t from the falling point, and the input signal is logic "0" at the point -At, and when the input signal is logic "0" at the point +△t, When the signal is "1", the error detection circuit output C can be generated by applying a trigger to a pulse generator such as a monostable multivibrator included in the error detection circuit 2, for example.

一方、位相追尾回路1では信号波形の立上りと位相追尾
出力波形の立上りとを比較するため、位相追尾出力波形
の立上り点の前後一定時間だけ時間窓を設け、この区間
で追尾動作を行なっている。
On the other hand, in the phase tracking circuit 1, in order to compare the rising edge of the signal waveform and the rising edge of the phase tracking output waveform, a time window is provided for a certain period of time before and after the rising point of the phase tracking output waveform, and the tracking operation is performed in this section. .

この時間窓のパルスは、通常のディジタルトラッキング
フィルタの立上り点検出に用いられるパルスと同様の
波形であり、このパルスで入力信号を観測し、論理“0
”辺部分が多いかまたは論理“1゛の部分が多いかによ
って、位相追尾信号の位相を進めたり遅らせたりする。
The pulse of this time window has the same waveform as the pulse used to detect the rising point of a normal digital tracking filter, and the input signal is observed with this pulse and the logic “0” is detected.
The phase of the phase tracking signal is advanced or delayed depending on whether there are many "side parts" or "logical 1" parts.

第2図Eはこの時間窓のパルス波形であり、もし、この
パルスが除去されると位相追尾は除去された区間だけ休
みとなる。
FIG. 2E shows the pulse waveform of this time window, and if this pulse is removed, phase tracking will be stopped for the removed period.

さて、誤差検出回路2の出力パルスはフリップフロップ
回路で構成される位相追尾制御回路4に導かれてこれを
セット状態とする。
Now, the output pulse of the error detection circuit 2 is guided to the phase tracking control circuit 4 composed of a flip-flop circuit to set it in a set state.

位相追尾回路1は、位相追尾制御回路4がセット状態の
ときは、前記時間窓のパルス(第2図E)を除去し位相
追尾停止状態となる。
When the phase tracking control circuit 4 is in the set state, the phase tracking circuit 1 removes the pulse of the time window (E in FIG. 2) and enters the phase tracking stopped state.

位相追尾制御回路4の状態は位相追尾信号の立ち上がり
側で行われる位相追尾動作が終了する時のタイミング、
すなわち時間窓パルスの立下がりのタイミングによって
常にリセットするように接続することによって、位相追
尾信号の立ち下がり側で発生した誤差検出回路出力によ
り位相追尾制御回路4が一度セットされると次の位相追
尾信号の立ち上がり側で行われる位相追尾動作を一周期
だけ停止する。
The state of the phase tracking control circuit 4 is determined by the timing when the phase tracking operation, which is performed on the rising side of the phase tracking signal, ends;
In other words, by connecting so that it is always reset according to the falling timing of the time window pulse, once the phase tracking control circuit 4 is set by the error detection circuit output generated on the falling side of the phase tracking signal, the next phase tracking is started. The phase tracking operation performed on the rising side of the signal is stopped for one cycle.

このようにして毎周期パルス性の雑音の有無を検出し、
それを検出する毎に一時的に次の位相追尾動作を停止さ
せることをくり返す。
In this way, the presence or absence of pulsed noise is detected every period,
Each time it is detected, the next phase tracking operation is temporarily stopped and repeated.

一方、信号追尾識別回路5では、位相追尾回路1が十分
に長い区間において、ある一定の誤差範囲で信号を追尾
しているかどうかを監視する。
On the other hand, the signal tracking identification circuit 5 monitors whether the phase tracking circuit 1 is tracking the signal within a certain error range over a sufficiently long period.

その結果位相追尾が確認されない場合だけ出力をONに
して位相追尾制御回路4を強制リセットし、初期位相追
尾が妨げられないように配慮されている。
As a result, only when phase tracking is not confirmed, the output is turned ON to forcibly reset the phase tracking control circuit 4, so that initial phase tracking is not disturbed.

上述の機能を実現させる回路として、たとえば電源投入
の時限スイッチによって、電源ON時から位相追尾の初
期状態から脱するまでに要する時間を十分遅延させて位
相追尾制御回路4を強制リセットする。
As a circuit for realizing the above-mentioned function, for example, a power-on time switch is used to forcibly reset the phase tracking control circuit 4 by sufficiently delaying the time required from when the power is turned on to exiting the initial state of phase tracking.

さらに動作中なんらかの原因で追尾が外れた場合も初期
追尾状態と同様の状態となるまで、前記時限スイッチに
入力信号のS/N比測定回路を付加して低下時にも位相
追尾制御回路4を強制リセットできるようにする。
Furthermore, even if tracking is lost for some reason during operation, an input signal S/N ratio measuring circuit is added to the time switch to force the phase tracking control circuit 4 even when the signal drops until the tracking state returns to the same as the initial tracking state. Make it possible to reset.

その他追尾誤差を測定し某一定値致達時に位相追尾制御
回路4を強制リセットするという方法をとることもでき
る。
Another method may be to measure the tracking error and forcibly reset the phase tracking control circuit 4 when a certain value is reached.

このように、信号の初期追尾過程では追尾動作が妨げら
れないよう動作し、その後パルス性雑音が加わると、そ
の区間だけ追尾動作が一時的に停止する。
In this way, during the initial tracking process of the signal, the tracking operation is operated so as not to be disturbed, and then when pulse noise is added, the tracking operation is temporarily stopped for that period.

上記の動作により、入力信号の位相が一時的に急激に変
動しても、装置内部の位相追尾信号がこれに応答し、そ
の回復に時間を要するという悪影響を低減することがで
きる。
With the above operation, even if the phase of the input signal suddenly fluctuates temporarily, the phase tracking signal inside the device responds to this, and the adverse effect of requiring time for recovery can be reduced.

以上説明したように、オメガ受信機等の位相追尾動作を
行う装置において、入力側のパルス性雑音の影響を除去
できるので、安定に位相追尾が行えるという利点がある
As explained above, in a device that performs a phase tracking operation such as an omega receiver, the influence of pulse noise on the input side can be removed, so there is an advantage that phase tracking can be performed stably.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明装置の一実施例を示すブロック図、第2
図は各部波形の説明図である。 1・・・・・・位相追尾回路、2・・・・・・誤差検出
回路、3・・・・・・信号入力端子、4・・・・・・位
相追尾制御回路、5・・・・・・信号追尾識別回路。
FIG. 1 is a block diagram showing one embodiment of the device of the present invention, and FIG.
The figure is an explanatory diagram of waveforms of each part. DESCRIPTION OF SYMBOLS 1... Phase tracking circuit, 2... Error detection circuit, 3... Signal input terminal, 4... Phase tracking control circuit, 5... ...Signal tracking identification circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 人力信号のある位相点θSと位相追尾信号のある位
相点θRとの位相差θS−θRを検出して位相追尾信号
の位相を制御する位相追尾回路と、入力信号のある位相
点θ′Sと前記位相追尾信号のある位相θ′Rとの位相
差Iθ′S−θ/R1を検出し、これがある一定の位相
差以上になった時にパルスを発生する誤差検出回路と、
前記位相追尾回路が初期位相追尾状態にあるか否かを検
出する信号追尾識別回路と、該信号追尾識別回路の出力
が初期の位相追尾状態を示していない時のみ誤差検出回
路からのパルスを受信して次回の位相追尾区間の動作を
停止させる位相追尾制御回路とを備え、入力信号の一時
的な位相変動を入力信号のある位相点θ′siと位相追
尾信号のある位相点θ’Riで検出し、次の位相追尾信
号のある位相点θRi+1での位相追尾動作を一時的に
停止させることを特徴とする位相追尾装置。
1. A phase tracking circuit that controls the phase of the phase tracking signal by detecting the phase difference θS - θR between the phase point θS where the human input signal is located and the phase point θR where the phase tracking signal is located, and the phase point θ'S where the input signal is located. and an error detection circuit that detects a phase difference Iθ'S-θ/R1 between the phase tracking signal and a certain phase θ'R, and generates a pulse when the phase difference exceeds a certain phase difference;
a signal tracking identification circuit for detecting whether the phase tracking circuit is in an initial phase tracking state; and a signal tracking identification circuit that receives a pulse from an error detection circuit only when the output of the signal tracking identification circuit does not indicate the initial phase tracking state. and a phase tracking control circuit that stops the operation of the next phase tracking section, and controls the temporary phase fluctuation of the input signal at the phase point θ'si of the input signal and the phase point θ'Ri of the phase tracking signal. A phase tracking device that detects and temporarily stops a phase tracking operation at a phase point θRi+1 where a next phase tracking signal is present.
JP52145824A 1977-12-05 1977-12-05 phase tracking device Expired JPS5826860B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52145824A JPS5826860B2 (en) 1977-12-05 1977-12-05 phase tracking device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52145824A JPS5826860B2 (en) 1977-12-05 1977-12-05 phase tracking device

Publications (2)

Publication Number Publication Date
JPS5478697A JPS5478697A (en) 1979-06-22
JPS5826860B2 true JPS5826860B2 (en) 1983-06-06

Family

ID=15393965

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52145824A Expired JPS5826860B2 (en) 1977-12-05 1977-12-05 phase tracking device

Country Status (1)

Country Link
JP (1) JPS5826860B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60237928A (en) * 1984-05-11 1985-11-26 山口 恵三 Net wind-up apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60237928A (en) * 1984-05-11 1985-11-26 山口 恵三 Net wind-up apparatus

Also Published As

Publication number Publication date
JPS5478697A (en) 1979-06-22

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