JPS5823772B2 - phase comparison circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a trapezoidal wave generation circuit that converts a rectangular wave input into a trapezoidal wave having linear slopes at rising and falling edges.

Conventionally, in rotary phase control devices such as VTRs, a modified trapezoidal wave having a slope only in the falling portion is used as the reference phase comparison wave. Under the condition that the rising part of the modified trapezoidal wave is the sampled part, the output of the phase comparator circuit changes rapidly, and therefore the braking control current fluctuates widely. It is unavoidable to apply sudden force to the hyphen belt that connects the belt, causing sudden tension and relaxation of the belt.

As a result, a phenomenon in which the belt "swings" occurs, causing the belt to become uncoupled, shortening the life of the belt itself, and prolonging the stabilization time of the servo system.

Also, using an asymmetrical or steeply rising trapezoidal wave,
Since it can only be used in a circuit format in which control errors always occur only in a proportional relationship, it has the disadvantage of lacking in versatility even when integrated, for example.

In view of this, the present invention proposes a novel trapezoidal wave generation circuit configured to convert a rectangular wave input into a trapezoidal wave having a slope with good linearity at its rise and fall.

The details will be explained below with reference to FIG. 1, which shows an example of the circuit of the present invention, and FIG. 2, which shows an IC version of the same circuit as a general-purpose servo circuit.

The trapezoidal wave generating circuit of the present invention includes a first transistor 1 connected to emitter ground, a base directly connected to the collector,
A second transistor 2 basically connected as an emitter follower, a first capacitor 3 connected between the pace collector of the first transistor 1, a second capacitor 4 connected between the collector of the first transistor and ground, and A third transistor having a relatively large capacitance (such as a chemical-container) connected between the connection point between the collector load resistor 5 and the reverse current blocking diode 6 of the first transistor and the emitter of the second transistor 2.
It consists of a capacitor 7.

In such a circuit configuration, assuming that the base input of the first transistor 1 is zero, the first transistor 1 to which the base bias current is supplied via the resistor 8 is on, and therefore the second transistor 2 is off. becomes.

Therefore, the voltage between the terminals of the first and second capacitors 3 and 4 is approximately zero, and the third capacitor 7 remains charged to approximately the power supply voltage cc.

Next, when a negative pulse input (for example, a servo system reference signal) is applied to the base of the first transistor 1, the first transistor immediately turns off, and the second transistor 1 immediately turns off.
The capacitor 4 begins to be charged and at the same time the second transistor 2 is supplied with base current.

As the second transistor 2 becomes conductive, the emitter potential also rises, but the third capacitor 7 is already connected to the power supply voltage ■cc.
Since they are charged nearby, the charging current of the second capacitor 4 and the base current of the second transistor 2 will vary linearly.

Therefore, the potential at the e side of the third capacitor 7, that is, the connection point 0 between the load resistor 5 and the diode 6 increases to a maximum of 2VOO, and the emitter potential of the second transistor 2 increases linearly. The second transistor is clipped near VCC.

2 is completely conductive.

In such a state, the first and third capacitors 37 are VC
c is charged nearby.

Furthermore, when the base input of the first transistor 1 becomes zero, the first capacitor 3 starts to be charged through the resistor 8, but the collector voltage of the first transistor 1, which is turned on at the same time, becomes linear due to the influence of this. and is taken out from the emitter of the second transistor as an emitter follower output.

FIG. 2 shows the trapezoidal wave generating circuit (within the dotted line frame) 10 as described above.
The sampling transistor 11 for phase comparison, the FET 12 for sampling and holding, and the transistor 13 for buffer amplifier are integrated into an IC for use in a general-purpose servo circuit (however, the third capacitor 7 is externally connected).

) By doing so, the phase comparison mode of the servo system can be selected in two ways between the reference signal S and the comparison signal O, as shown in FIG.

Since the present invention has the above-described configuration, it can be used in a reference comparison wave generation circuit in a servo circuit system to improve the various drawbacks of the conventional example mentioned above, and when integrated into an IC or a standard circuit, it can be used as a servo circuit. This has effects such as increased versatility.

[Brief explanation of the drawing]

The drawings all relate to the trapezoidal wave generating circuit of the present invention; FIG. 1 shows an example of an actual rotating circuit, FIG. 2 shows an example of a servo circuit converted into an IC,
FIG. 3 is a waveform diagram for explaining the operation. Explanation of main figure numbers, 1...first transistor, 2...
Second transistor, 3... First capacitor, 4...
Second capacitor, 7...Third capacitor, 6...Diode.

Claims (1)

[Claims] 1 The base is DC-connected to the first external input terminal and is DC-connected to the power supply via a resistor, and the collector of the first transistor operates in emitter-grounded mode and the base of the second transistor operates in emitter-follower mode. a first capacitor between the base and collector of the first transistor; a second capacitor between the collector and ground; and a diode connected in a forward direction to the collector load resistance of the first transistor and the power supply. A third capacitor with a large capacitance is connected between the connection point of and the emitter of the second transistor, and the rising and falling portions of the rectangular wave input from the emitter of the second transistor to the four bases of the first transistor are connected. The emitter of the second transistor of the trapezoidal wave generation circuit configured to extract the converted trapezoidal wave having a corresponding relatively gentle slope with good linearity is connected to the base of the third transistor directly connected to the emitter. A second external input terminal for inputting a comparison pulse is connected to the base of the third transistor, and the collector output of the third transistor is directly connected to the gate of the FET, and its source or A phase comparator circuit in which the drain output is directly connected to the base of a fourth transistor connected as an emitter follower, the emitter of the fourth transistor is directly connected to an external output terminal, and components other than the third capacitor are integrated into the same IC chip.