JPS5821721A - Display device for flash photographing - Google Patents

Abstract

PURPOSE:To previously find out the number of times of available flashing when continuous flashing is carried out only by the energy accumulated in a main capcitor in respect to a series controlling type automatically dimmed speed light. CONSTITUTION:A detecting circuit 5 detects the number of times of available flashing from the changing voltage of a main capacitor CM and outputs number of pulses corresponding to said number of times to a terminal (a). An output from the terminal (a) is transmitted to OR gates G6, G7 through an AND gate G4. A shift register SR reads inputs applied to a terminal D successively and counts up the number of outputted pulses of the terminal (a). Since the counted value corresponds to the number of times of available flashing, light emitting diodes D1-Dn are turned on in accordance with the number of times and the number of emitted diodes indicates the number of times of available flashing.

Description

[Detailed description of the invention] The present invention relates to a display device for flash photography.

When using a series-controlled automatic optical speedlight, the speedlight can emit light in a short time when the amount of light emitted is relatively small.

It is possible to emit continuous flash light at several frames per second, and it is possible to shoot several frames with only the energy stored in the main capacitor. By the way, this kind of conventional! ! The i11 had a drawback in that it was not possible to know how many frames could be photographed before photographing. Furthermore, even if the amount of light emitted each time is changed in advance, there is a drawback that it is not possible to know how many times the light can be emitted.

SUMMARY OF THE INVENTION An object of the present invention is to solve these drawbacks and provide a display device f for flash photography that can notify the photographer in advance of the number of flashes that can be emitted when continuous flash light emission is to be performed.

/′ / ,,,,,,,,,′ The present invention will be explained below based on examples.

Figure wL1 is a block diagram showing an embodiment of the present invention. When the power switch 81 is on, the DC/DC converter 1
boosts the voltage of power supply E and connects it to high-voltage power supply lines V, -GN
Supply between D. Also, the voltage of the low voltage power supply E is the power supply V,, -
GNDI! Li'c is supplied. The main capacitor C stores the output voltage of the DC/DC converter 1 as flash detection energy.

An on/off signal of the synchro contact 8x internally connected to the camera 2 is applied to the input terminal gK of the control circuit 3. The on/off signal of the MDX style switch S is sent to the input terminal h of the switching circuit 30.
K is applied. The switch S1 is turned on at 11 when the motor drive device is attached to the camera and continuous shooting is performed.For example, the switch S1 is switched on on an operating member (not shown) disposed on the speedlight side, or on the camera body or the motor drive device. It is turned on by an operating member (not shown) that is turned on.

In the latter case, the switch S wealth itself is the camera body or °
is provided in the motor drive device.

Electrically speedlight side and II! Continue. Control circuit 3
Output Kameko・,dl in synchronization with synchro contact sxO ON
Generate a C trigger pulse-1°l-2. Further, when the switch Ss is on, the control circuit 3 generates the 10th control pulse i-3 after a certain period of time TI after the synchro contact Sx is turned on. This fixed time is variable depending on the frame speed of the motor drive device. Historically, the control circuit 3 generates a photometric pulse -1g -4 at the terminal fK for four fixed time rl corresponding to the maximum light emission time of the speedlight in synchronization with the turning on of the synchro contact 8x.

The resistor R1, the capacitor C1, the transformer L, and the first thyristor TI constitute a trigger circuit for the flash discharge tube FT. I
The L2 thyristor Tl opens and closes the main discharge loop between the tube FT and the main capacitor CM. Commutation capacitor cl
is normally photovolted with the polarity shown through resistor R15RI. The third thyristor 1 opens and closes a commutation loop for connecting the commutation capacitor C3 to the second thyristor T's K in a reverse bias state. The photodiode DP and the capacitor Cs constitute a light amount integrating circuit. The transistor Trl is turned on while the 11-element pulse -1g-4 is applied from the control circuit 3, thereby enabling the capacitor cm to photoelectrically conduct. The comparator CP outputs a second control pulse si when the reference voltage determined by the condition of the resistor Rs and the Zener diode D and the charging voltage of the capacitor Cs reach a predetermined relationship.
g -5 is generated. Third thyristor T.

is turned on when the eleventh or second control pulse is applied via the OR gate Gt, thereby closing the commutation loop.

The detection circuit 5 detects the possible number of times of audible light emission from the photoelectric voltage of the main capacitor CM, and generates a number of pulses t corresponding to the number of times.
Output to one terminal a.

Resistor R- and capacitor C4 form a circuit for Jit?
An output is generated at the continuation point P1. The display selection switch 8= is connected in parallel with the capacitor C4, and is turned off in the possible flash emission count display mode and turned on prior to flash photography. The latch circuit consisting of NAND gates Gl and G Hatake turns on synchro contact 8x.

The off signal and the output signal of the connection point PI are input.

The classification circuit consisting of resistor R1 and capacitor Cs%C is N
The Q output of AND gate G and the Q output of NAND gate G are input, and an output signal is generated at connection point P.

AND gate G4 connects the output of terminal a of the detection circuit 50 and NAN
The Q output of the D gate Gs is input. AND gate G- is the output of terminal f of control circuit 3 (slg-4) and NA
The Q output of ND gate G- is input. The Q output of the NAND gate Gs is applied to the terminal of the side output circuit 5, and when the Q output is @H'', the self-detection circuit 'MISO terminal aPI
1-Prevent C output from occurring. The output of the connection point PI is applied to the set terminal R of the left register SR via the OR gate GI. When the switch S4 is on, the shift register 8R is reset to the output of the connection point P, and when the switch 84 is off, the shift register SR is reset.

Nl) Output of gate G4 and AND gate G.

The output of the OR gate G@ whose input is the output of the gate G@ is applied to the clock input terminal of the shift register 8)t. AND
The output of the O'R gate G$, which receives the output of the gate G4 and the neutral input of the comparator CP, is applied to the data input terminal of the shift register 8R. The shift register 8R outputs all @Lm to the output terminals Qs to Qn in accordance with the count of 1. Each of the 0 light emitting diodes DI to Dn lights up when the corresponding output terminal is 1L1. The relay circuit 4 connects the outputs of the output terminals Q1 to Q of the shift register 8R to light emitting diodes D/1 to D' on the camera body side. to communicate.

Light emitting diode DI and D'1eDl and D'$,...D
a and D'n are 0 light emitting diodes D1 to D that light up at the same #
! 1: D' and ~D1' may be placed on the speedlight side and/or camera side as necessary.

Next, take a look at the action.

(1) Operation when using the motor drive device;
In ↓UnaSea ν, where flash photography is performed continuously using a motor drive device, it is thought that the condition for co-photography is constant. lE, the subject distance and aperture value are kept constant, the amount of light emitted by the speedlight (that is, the light emission time) is limited by a predetermined limit, and the correspondence relationship between the arm speed of the motor drive device and the light emission time is adjusted. If you do this, several consecutive flash shots will be used as off rudder. In other words, arm speed represents the number of shots per unit time), so if you make sure that the light emitting lamp finishes emitting the required value GNL for each shot, continuous flash photography may limit the number of subjects. becomes possible. Specifically, turning on the switch S port, KL means synchro contact 8x turns on, and then tmlolt.
The time T1 until the lJm pulse -1g-3 is generated is made to correspond to the arm speed.

Now, when you turn on the power switch s1, D C/D
C:l:/L starts in Beta1 and main controller 2za0. It is assumed that switch s4 is turned on at this time. At the same time, when the sl'l power is turned on, the connection point P1 outputs @L" (at this time, the switch Sm is off)
, the Q output of NAND gate Gl becomes "H", and NA
ND gate Gl (D・NE output becomes @L#. Therefore, the connection point P becomes f!-114@H' and resets the contents of the shift register 8R. On the other hand, the detection circuit 5 outputs the NAND gate am Since the Q output of is 1L1, a number of @Hm level pulses corresponding to the number of flashes that can be emitted are generated at terminal a from the photoelectric direct voltage of the main capacitor cM.NA
ND Gate G. Since the QtB force of is @H'', the pulse output from terminal a is transmitted to the OR gates G and G via the ND gate Cia'.
Suppose that the input to the terminal is successively read when the terminal CK is 1. Then, the human input terminal CK%D of the shift register 8R has an OR gate G l
Since the pulses from terminal a are simultaneously applied via sGs, the shift register 8 blades serve as a gate for counting the number of output pulses from terminal a. Therefore, the count value corresponds to the number of times the flash can be emitted. When the number of flashes that can be emitted is 1, K sets the terminal Q1 to @L', and when the number of flashes possible is 2, K sets the terminal Q
t+Qm to @L'...When it is once, terminal Q *
-Q B Make it 4 Bi L'. Accordingly, the light emitting diodes D1 to D are also turned on, and the number of turned on original diodes indicates the number of times a that can be flashed. This number of times is also displayed in the camera body 2@, for example, in the viewfinder via the relay circuit 4t.

Here, we will explain how to calculate the number of times a flash can be emitted. The photoelectric pressure of the main capacitor CM is emitted in the state of 111J - V., @1st party 9 he is vl, second emission - yt. Later, it will be vIs... After the nth U emission, it will be vn, and ff
Assuming that the energy required for the predetermined light emission amount GNL distributed by 1 l is α, the following relationship holds true. That is.

The energy required for the first flash is the energy required for the second flash.The energy required for the second flash is expressed as (however, CM is the main capacitor) Main capacitor C
The terminal voltage of M can be expressed as.

From this, the possible number of flash emissions N can be calculated as follows. The NgM pulse obtained from this calculation result is output from terminal a.

After confirming the number of possible flashes from the number of light-emitting diodes D1 to D*m Di' to D,' lit, the photographer operates the camera release (the fact that these light-emitting diodes are lit means that the main capacitor is (This also means that the voltage has been photovolted to the voltage that allows light emission.) Then, the Nishinkuro contact 8X turns on, so the NAND gate G outputs @H" to the Q output, and NAND '!-
) G dew 1! Q ai force @L”, t out 7J-.

Therefore, an m-1Hm pulse is generated at the connection point PIK to reset the contents of the shift register SR. Also, AND
The gate G4 is closed, and the detection circuit 5 is prevented from generating a pulse output to the terminal a. Reverse KAND gate G Hatake's gate is opened.

Now, when synchro contact 8x turns on at #I time t1, 1
IIJ-Circuit 3 has trigger pulse 1st -1 on terminal C% d
, 51g-2. In response to this, the first thyristor T, .

At the same time, the control circuit 3 is connected to the terminal! A photometric pulse 1g-4 is generated to turn off the transistor Trl. Therefore, the capacitor CS is photoelectrically charged by the photocurrent of the photodiode DP corresponding to the reflected light from the photographic object. capacitor ci
When the photoelectric voltage reaches a predetermined relationship with the base i11 pressure at time t3, the comparator CP is inverted and the second control pulse sig
-5 is generated. The third thyristor T, to which the second control pulse is applied via the OR gate 01, is turned on and closes the commutation loop. A second thyristor T was created for this!
is turned off, so the emission of light from the discharge tube FT is stopped.

If the time interval between times tl and t3 is shorter than the predetermined time period, the above-mentioned operation 15 is performed.

However, if this time interval is longer than the predetermined time Ti, then the time 1. when the predetermined time τ1 arrives. Then, the first control pulse (S-3) is applied from the terminal of the control circuit 3 to the thyristor T through the OR gate GK, and the flash light emission stops.

In this way, since the flash light emission is automatically generated within a certain time Ti by using the second control pulse, it is possible to make the frame speed of the motor drive device the same as the flash light emission. In addition, in order to ensure proper exit through continuous flash emission, it is preferable that the aperture p value and object distance of K be selected in advance in accordance with the predetermined firing frequency GNL.

Although the flash light emission is controlled in step 15 above, the dimming display is performed as follows. TolJ1141 circuit °3G
Since the output of terminal f is 1L# for a certain period of time τl, O
During this time, the R gate G outputs "H". lE is
The shift register SR reads the second control pulse (s+1g-5) inputted to the input terminal DK for each flash emission.

That is, when the second control pulse is generated during the first flash of g4, the "?il" output of the shift register becomes "L" and the light emitting diodes DI and D1' light up.
When the 111 control pulse of 2 occurs, the shift register Q
s s Q*Small output ″L# Detection diode IJ
, DB'SDI%Dl' lights up. On the other hand, the third
If the second control pulse is not generated and the flash detection is stopped by the Kit's control pulse, the shift register's Qs small output @H'% Qs - Qs small output @L# will be generated, so the detection diode D, , D,': DhDs' will be lit. In this way, the number of one light emitting diode lit corresponds to the number of successes, and the lighting and extinguishing of the detection diodes in the arrangement direction of the detection diodes are continuous flashes. # It is necessary to display the number of frames in which the light adjustment failed even if the original was successful.

Now, when this flash photography is completed and the switch S3 is turned on, the Q output of the NAND gate G3 becomes @H", and the NA
The Q output of the ND gate G becomes @L'. Shift register 8R for 114t A P s m-1H”
It is triggered by a pulse, and the flash described in Le 1 is activated.
The display mode is for the number of J functions. Note that if the switch 84 is turned off, the above display operation will not be performed.The constant time T1 and the maximum light emission time TI are the same), and τ-(τ-) is calculated from the time when the synchro contact Sx is turned on. After lapse of time, the transistor Tr1 is turned on to discharge the photoelectric charge of the capacitor C and prepare for the next flash photography.

(2) Operation when the motor drive electric generator is not used; at this time, the switch 8s is turned off and the first control pulse i-3 is not generated, so the second control pulse
The dimming operation is performed only by 1-5. Switch 8. When it is off, the display of the possible number of flashes can be erased by applying "H" to RK of the left register and register 8R.

Next, in the @R output circuit 5 diagram, MU-A is an operational amplifier (hereinafter referred to as OP7).
, CPI ~CP, is a comparator. 2D
1, ZD. is a Zener diode @ DI-1
, DI-1, D. -1 is a diode. Tr@-
Tr4 is a transistor srl~fil and rs
-*- rs is a resistor, especially rl is a thermistor, and C1-1 to C1-n are capacitors.

10, I, is a constant electric light which generates *m proportional to absolute temperature. Ita is a constant voltage tIt source. Note that the symbols of the resistors and constant current sources represent their values.

Now, resistance rl and rlf)M connection point P. The voltage...
Let the Zener voltage of the Zener diode ZDI be @1,
Also OP7 album A. The emitter voltage of the transistor Tr, which is connected to the output terminal Km, is 8, and the collector current is I.
o and Tr! If the hIM of is large enough! . Worked as an 11th grader in middle school. Therefore, the output voltage vx of the OP amplifier A4 is determined by the reverse saturation current in summer, the electric charge is the electron charge, T is the glycoside temperature, and K is the Boltzmann constant. Next, the output voltage V of the OP amplifier AI is determined.

Current IJ) flowing through diode D3-1, t! OF Ampum Hatake's non-inverting input particles are grounded. Therefore, .

Since the OP7 amplifier AS performs differential amplification, r@=rl・
If the resistance value is set so that = r = r1, the output voltage of the OP amplifier As becomes V. %1V, xV x-V
, can be expressed as . Here, the threshold, the base voltage of the zero-order transistor Try, which is expressed by equation (3), is calculated from the output voltage vs of the 0-order transistor Try.
Since it is obtained by subtracting the forward direction 'voltage of s, select a resistance value for L5 so that v=v−v Ml gl Riko＼ and r＠ = r4 = r＠ = R. It becomes 1R.

By rearranging equation (5), we get a constant current! Since ・ is a current proportional to the supply temperature TK, T rv Is = LmQ ''-(6) (however, Q
can be expressed as a constant of proportionality). Therefore, RI R1 p (11).

Comparing equations (1) and (8), one voltage across the resistor rim connected to the collector of the number term Tr = V ll = r
1m @Ic is proportional to the possible number of flashes N. That is, the voltage at the connection point P4 decreases as N increases. On the other hand, the non-inverting inputs (resistance rl
-1 to R-11 and Sada flow! Since the reference voltage determined by Q is the highest for comparator CP1 and the following is lower, the voltage at connection point P4 is the voltage at main capacitor CM.
When the photovoltage decreases as the photovoltaic voltage increases, the output of the comparator CP& first inverts from @L" to "H#. Thereafter, the comparators CP1, CPI, . . . are inverted. Capacitor C
A counter circuit consisting of 1-1 to CB-n and a resistor rll generates a counter pulse every time the comparators CP-CPm are inverted. A waveform shaping circuit A shapes this acid pulse and applies it to terminal a.

On the other hand, when the Q output of the SugaN and AND gate G becomes 1 and becomes @H#, the transistor Tr4 is turned on and the voltage at the connection point pl is lowered to the ground potential. Therefore, the voltage 6e at the II connection point P4 rises to the potential of the power supply line V, and the outputs of the comparators CP to CPvh do not invert from @L'' to 1H#.

Further, the thermistor r1 is arranged near the flash discharge tube FT and changes its resistance value according to the ambient temperature of the flash discharge tube FT. In other words, when the temperature of the discharge tube FT rises, the voltage at which the flash can be emitted tends to decrease (for example, the discharge energy at the time of flash light emission increases), and the resistance value of thermistor r1 decreases as the temperature rises. is lowered and the voltage at the connection point P$ is increased. From equation (7), voltage...
If increases, the current! Since the odor also increases, the number of pulses generated in the fireworks increases as a result.

FIG. 3 is a circuit diagram showing another embodiment of the *D circuit. Components having the same functions as those in FIG. 2 are given the same reference numerals. In this embodiment, when the output of the comparators CPS to CPn is inverted from 'L# to 1H', 1 light emitting diode D, -1 to DB
-n, the corresponding light emitting diode lights up to indicate the number of times a flash can be emitted.

Figure #44 is an example of an implementation circuit of the control circuit 3.

In the figure, the synchro contact Sx is turned on and the terminal g is
When it becomes “L”, AN, D gate aSS, inverter 01
The first one-shot multivibrator consisting of a 1% capacitor C1@% and a resistor Rms is activated, and the inverter 0
The output of 11 becomes 1L' for one foot time τ. This output is transmitted to the terminal CK% via the inverter G1m and to the terminal dK via the inverter Gll. This inverter G
The time τ1 during which ll is 1L" is a light minute time for jml, M2 thyristor "l, and TI to turn on.

The second multi-vibrator consisting of NAND gate G14, inverter G, 11, capacitor Cl5m and resistor R11 is activated when the output of inverter Get becomes ``L#'', and the output of inverter GIG is activated for a certain period of time. 1L#.If the resistance Rml is made variable according to the arm speed, τ1 changes.The third one-shot multivibrator consisting of an inverter, a G--, a capacitor Cl1, and a resistor Ram is such that the output of the inverter G■ changes over time. 4 for τ!
When the signal changes from @L'' to 1H after m, the operation starts and outputs ``H#'' for a certain period of time τ.

The switch sl is turned on and the inverter G is connected to the terminal f! When the output is @H”, synchro contact gX is connected to the umbrella.
When turned on, @L1 is output for -7H time τ10 via AND gate Gll and OR gate Gl.

Similarly, AND gate G, @t! After the output of the inverter aSS becomes '@H', 1H is outputted to all terminals for a certain period of time τ3. That is, when the switch SS is on (during continuous flash photography), the first control skewer force I-3 and the side light pulse 1
g-4 is the same time @L''.

When the ``vcK switch 8m is turned off, the NAND gate Cat becomes ``H'' only when the synchro contact H'x is turned on.
Output #. NAND gate Gll, inverter G
II, the fourth one-shot multivibrator consisting of a capacitor Cl1m and a resistor Ras starts operating, and the inverter Gll outputs @L for a certain period of time τ4.
At this time, the output of the AND gate G, is 1L'', so the terminal f becomes @L'' for a certain period of time T4. This time τ4 is the time required for the speedlight to be activated at its maximum.

FIG. 5 is a block diagram showing another embodiment of the MD tuning switch. The switch SS on the camera body side, which is connected to the switch Sm and the Muku U, is used to operate the motor drive device MD to the camera and turn on the power. If no operation is performed, the terminal cannot be set to "Ll".In this way, it is easily set to 15, which prevents continuous flashing and photography.

According to the present invention, the number of possible flashes can be displayed on the speedlight side and /X can be displayed on the camera side.The number of times one flash can be fired can also be displayed on the camera side. Since it means that the battery has been charged, the number of possible flashes display also serves as a charging completion display.

[Brief explanation of the drawing]

Figure s1 is a block diagram showing a 1' embodiment of the present invention. Figure 2 is a circuit diagram showing an example of a specific configuration of the detection circuit 5 in Figure 1 and Figure 6. FIG. 13 is a circuit diagram showing another example of the detection circuit. Figure 4 is a diagram showing another U) example of the same MD device.V7
'1 net tl, F residence Sashikari Shichibetsu 4ν, Uchigi r1m 2m'
circle. [Explanation of symbols of main parts] CM Main capacitor 5 Control circuit 5 Detection circuit G, OR gate T
, 5th Thyristor 8R Shift Register Applicant: Nippon Kogaku Kogyo Co., Ltd. 2-i? Yuki Yasui - Written amendment to the proceedings September 11, 1980 Haruki Shimada, Commissioner of the Japan Patent Office / ], Indication of the case 1981 Patent Application No. 120078 2 Name of the invention Flash photography display device incident Related Patent applicant: 3-2-6 Marunouchi, Chiyoda-ku, Kyoto Name: (411) Nippon Kogaku Kogyo Co., Ltd.
, 4. Agent 5, Subject of amendment "Detailed description of the invention" in the specification
Contents of amendment in column 6 As shown in the attached sheet (1) Insert "to terminal e" before "occurrence" on page 4, line 8 of the specification. (2) Insert "during continuous light emission" before "most" in line 11 of the same page. (3) In the 6th line of page 5, ``on'' is corrected to ``jfu''. (4) "G2" in the third line of page 10 of the same page is corrected to "G6". (5) Correct "G3" in the fourth line of the same page to "G7". (6) Correct "τ1" in line 13 of page 14 of the same article to "τ2". (7) Delete "circuit" on page 16 of the same page, line 16. (8) Correct "Thermistor" in the third line of page 17 of the same page to "Posistor". (9) Correct "grain" in line 8 of page 18 of the specification to "edge." (7) Insert "A first-order equation holds. That is," after "put" on page 19, line 19 of the same document. (11) Same as above, page 21 Fang Let the left side rIJ of the equation (8) be ``■o
Corrected to 3. Correct "Thermistor" in the second line of page 23 of F121 to "Posistor". f131 "Thermistor" in the 8th line of the same page as above is corrected to "Posistor". (141 Insert "(" between "if it rises" and "for example" in the 5th line of the same page.) (151 In the 7th line of the same page, ``decline'' is corrected to ``rise. (16) Correct "decrease" in line 9 of the same page to "rise". (17) Correct "rise" (in two places) in line 1G of page 72s of the specification to "decrease". 0a Correct "increase" in line 11 of the same page to "decrease". (19) Correct "increase" in line 12 of the same page to "decrease". Correct "another embodiment" in the 13th line to "modified example". (21) Insert "when not emitting continuous light" before "speedlight" in the 4th line of page 26 of the same page.

Claims (1)

[Claims] From the energy stored in the main capacitor of the speedlight and the predetermined amount of division of this energy,
A display device for flash photography, characterized in that the speedlight calculates the number of times the speedlight can emit light with an amount of light emitted according to the divided amount, and displays the number of times the speedlight can emit light.