JPS61132937A - Flashing device - Google Patents

Abstract

PURPOSE:To hold down the lead current of a main capacitor to a small value and to reduce the consumption of a power supply battery and to emit a sufficient flash light by reducing the regulator level of a control circuit, which controls a charging current, when an image pickup device is not in the photographing state but raising this regulator level when the image pickup device is in the photographing state. CONSTITUTION:If a switch SW1 in the image pickup device side is turned off, an oscillating circuit 2-2 starts the operation when a switch S1 in the flash device side is closed, and a boosted current is rectified by a rectifier 2-4, and a main capacitor 2-5 is charged. In this case, the voltage of the main capacitor 2-5 is controlled by a control means and is varied between a lower voltage V1 and a voltage V2. If the image pickup device is set to the photographing state to turn on the switch SW1, the voltage of the main capacitor 2-5 is controlled to vary between a higher voltage V3 and the voltage V2. Thus, the leak current is held down to a small value because the voltage of the main capacitor is low in numerous cases.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a flash device, and more particularly to a control circuit for a charging circuit for a main capacitor of a flash device.

[Prior art]

In the control circuit for the charging circuit of the main capacitor of a conventional flash device, the charging circuit operates after the power switch is turned on, and the voltage of the main capacitor reaches 7. The charging circuit was configured to stop operating when a predetermined level indicative of s/charge was reached.

If the charging circuit stops operating, the voltage of the main capacitor decreases (due to the leakage current of the main capacitor), and when it reaches the full charge level, the charging circuit stops operating. The operation shown in Figure a is repeated.

However, as the voltage of the main capacitor increases, the leakage current of the main capacitor also increases, so if the above operation is repeated when the voltage of the main capacitor is close to a fully charged level as shown in Figure 1, the leakage current will always increase. This has the disadvantage that the energy of the power supply battery is wasted.

In addition, when the regulator level is high, the time the charging circuit operates (shown as ON on the time axis in Figure 1) and the time the charging circuit does not operate (shown as OFF on the time axis in Figure 1) are short and cause stains. There was a drawback that the battery rest time, that is, the time during which the charging circuit did not operate, was short, so that the deterioration of the power source battery (internal resistance α of the power source battery increased) was noticeable. As the power supply battery gradually wears out, as shown in Figure 1, the time during which the charging circuit operates (time in Figure 1, shown as ON on the axis) gradually decreases (the longer the time, the rest time of the power supply battery). In the past, the proportion of energy used was small, and this had the effect of shortening the lifespan of the power supply battery.

Therefore, by lowering the regulator level to near the minimum voltage at which the flash device can emit light, the voltage of the main capacitor of the flash device will spend less time reaching nearly the fully charged level than when the regulator level is high. The above-mentioned drawbacks can be prevented, but if the voltage of the main capacitor is at the maximum voltage (full charge level) and if it is at the minimum voltage (regulator level), the guide number of the strobe when firing a flash will be affected. If the voltage of the main capacitor is at a charging voltage level close to the minimum voltage, depending on the distance or reflectance of the copy object, the flash light from the flash device may not reach the target sufficiently, resulting in improperly exposed photographs. The drawback was that it could be photographed.

In addition, the main capacitor of the flash device built into the camera is charged to -H full charge level (f) before the start of shooting operation, and the charging circuit operation is stopped. A technique for restarting the strobe is also disclosed in % 17945/1983. However, in this technique, the operation of the charging circuit is stopped until the strobe device is popped up after the main capacitor is fully charged. Therefore, as time passes (as time passes, the voltage of the main capacitor continues to decrease).

Therefore, if the time taken is long, it will take a long time for the voltage to reach the main capacitor to be able to emit light again even if you pop up the strobe device or turn on the power switch again in mid-range cameras. There is a drawback that even if there is a photo opportunity, it may not be possible to emit a flash.

[Summary of the invention]

The present invention aims to eliminate the above-mentioned conventional drawbacks,
Based on this objective, the present invention lowers the regulator level of the main capacitor of the flash device to a relatively low level when a signal for starting the flash photography operation of the camera cannot be obtained, The present invention is characterized in that the regulator level is changed to a higher level when a signal is obtained.

[Metal practice]

FIG. 2 is a block diagram of a first practical example of the present invention. 2
-1 is a battery that is a power source, S is a switch connected to the battery and controls the power supply to the load, 2-2 is an oscillation circuit that boosts the battery voltage, and 2-3 is a switch that controls the operation of the oscillation circuit 2-2. A controlling regulator controls the operation or non-operation of the oscillation circuit 2-2 according to the output of a comparator 2-15, which will be described later. 2-
4 is a rectifier that rectifies the boosted voltage; 2-5 is a main capacitor that charges the voltage generated by the oscillation circuit 2-2 and discharges when the light emitting section 2-9 emits light; 2-6 is the main capacitor 2 2-8 receives a terminal-sized signal, and the trigger part 2-8 receives the signal from the photometer 21, which controls the imaging device to take pictures and the flash device to emit light. , 2-11 is a photometry unit that has a light receiving element that receives reflected light from the subject for photometric light emission, and outputs a signal when the subject is properly exposed; 2-12 is a reference voltage source 2 to 15; , switching unit 2-14, comparator 2-15,
The power supply voltage for the pilot lamp control unit 2-16 etc. is set to the battery 2.
-1 is the control unit power supply generated from the voltage 2-1, and 2-13 is the reference voltage source mentioned above. A constant voltage v1 corresponding to the voltage output from the voltage divider 2-6 is output to the pilot lamp control section, and a reference voltage that changes according to the signal from the switching section 2-14 is output to the comparator 2-15.

2-14 changes the reference voltage generated in the reference voltage section 2-13 to the full charge level v3 regulator level v, as shown in the figure Wc4, every time the signal from the comparator 2-15 is output.
, v, VC.

Also, the switching section 2-14 is a terminal! The regulator level vt*vlt is selected in accordance with the signal of BWl, which is a power switch of the example image pickup device, inputted from 9W1.

2-15 is the reference voltage of the reference voltage section 2-13 and the voltage divider 2-
A comparator 2-16 which compares the voltages of 6 and outputs a signal when they are equal or higher than the same value, 2-16 includes a pilot lamp and compares the reference voltage v1 of the reference voltage section 2-13 with the voltage of the voltage divider, The configurations of voltage divider 214 and comparator 2-15 will be explained using FIG. 3.

In FIG. 3, RG is a reference voltage generating circuit which outputs the voltage (corresponding voltage v,') output from the voltage divider 2-6 when the voltage of the main capacitor reaches V shown in FIG.

The voltage output from the reference voltage generation circuit RG is a resistance horse, R,...
! The pressure is divided by , . Resistance R,,R,,R.

The resistance value is the voltage at the connection point between resistor R1 and resistor R1.
The voltage V7 shown in the figure is divided by the voltage divider 2-6 to the voltage y, /, and the voltage at the connection point to the resistor is the voltage EE vt shown in FIG. 4 by the voltage divider 2-6. The divided voltage is set to be the voltage m,′. 8W1 to 8W1 to AV5 are analog switches. OPl is an operational amplifier which is a buffer.

The reference voltage section 2-13 is configured above. op2 is an operational amplifier corresponding to comparator 2-15 in FIG.

D is a waveform shaping circuit that outputs a pulse every time the output of the operational amplifier op2 is inverted, and the output of the operational amplifier op2 is differentiated by a differentiating circuit, and is converted into a positive pulse by an absolute value circuit. D-PF is D type 7 lip 70 lip, ANDl
, AND2 is an AND gate, and [7 is an inverter.

FIG. 4 is a diagram showing the relationship between the charging voltage of the main capacitor of the first embodiment of the present invention on the vertical axis and the time after turning on the power switch of the flash device on the horizontal axis. It is shown on the same scale as the diagram showing the relationship between the charging voltage of the conventional flash device and the time after turning on the power switch shown in Figure fJc1.

Next, the first 5iE! of the present invention configured as above! The operation of the embodiment will be explained. First, a case will be described in which the imaging device is not in a state where it performs image enhancement and the switch SW1 on the imaging device side is off.

When the switch S on the flash device side is closed, the oscillation circuit 2-2 starts operating, the boosted current is rectified by the rectifier 2-4, and the main capacitor 2-5 is charged. The charging voltage of the main capacitor 2-5 is divided by the voltage divider 2-6,
Input in Comparison 1B2-15. Also shown in Figure 3,
Since the D-FF is set when the power is turned on, its output q is at a high level, so the analog switch ASW1 is turned on and the voltage vI is output from the reference voltage source via the operational amplifier OP1, which is a buffer. Comparator 2-
The operational amplifier QP2 corresponding to 15 has a voltage V, and a voltage divider 2
The voltage of the main capacitor 2-5 divided by -6 is compared.

Therefore, when charging is performed and the voltage of the main capacitor 2-5 reaches vs K, the output of the operational amplifier OP2 corresponding to the comparator 2-15 K is inverted from low level to high level, and the pulse shaped by the waveform shaping circuit DK is D-FF
Input L to the clock terminal of the D-plo output QB is inverted from high level to low level, and the analog switch 8
W1 is turned off.

In this state, the switch SW1 of the imaging device is not turned on, so the output of AND2 is at H level and the cyan analog switch AEiW5 is turned on, so the output of the operational amplifier OP1 becomes y, /.

Also, since the output q of the D-FF is at a low level, the girator 2-3 stops the operation of the oscillation circuit 2-2.

Since the operation of the oscillation circuit 2-2 is stopped, the voltage of the main capacitor 2-5 gradually decreases due to leakage current. When the voltage of the main capacitor 2-5 reaches V, the output of the operational amplifier OP2 becomes high. The output q of D-FX!I is inverted from low level to high level, and the analog switch A8W1 is turned on from OFF because the pulse that has been inverted from low level to low level and shaped by the waveform shaping circuit is input to D-FF. Changes from on to off, operational amplifier op
The output of 1 is V. At the same time, a high level signal is output to the regulator 2-3, and the oscillation circuit 2-2 starts operating again.

The main capacitor 2-5 is charged by the operation of the oscillation circuit 2-2, and when the voltage of the main capacitor 2-5 reaches V, the output of the operational amplifier OP2 is inverted and the same operation as described above is repeated.

As mentioned above, since the switch sv1 of the imaging device is not turned on, the regulator level of the photometer is low, and as shown in the left half of FIG. 4, the voltage of the main capacitor 2-5 is V,
Therefore, the voltage of the main capacitor is often lower than when the voltage of the conventional main capacitor shown in Fig. 1 was constantly changing between V and V. Therefore, the leakage current of the main capacitor is also small), as shown in Figure 4. Since the time yy is also longer than the OFF time shown in FIG. 1, the rest time of the power battery becomes longer.

Next, a case where the switch EiW1 on the imaging device side is turned on will be described. When the output q of the D-FF is at a high level during the above operation, that is, the oscillation circuit 2-2
When the switch sw1 of the imaging GL device is turned on as shown in FIG. 4 during the period in which the oscillator circuit 2-2 is operating, the output of the operational amplifier OP1 is 73/, regardless of the state of the switch 8W1. The operation continues and the voltage across the main capacitor 2-5 continues to rise.

When the voltage of the main capacitor 2-5 reaches V, VC, the output of the operational amplifier OP2 is inverted from low level to high level, and the output Q of D-FF is inverted from high level to low level by the pulse output by the waveform circuit. , the operation of the oscillation circuit 2-2 is stopped by the regulator 2-3.

Here, since the switch W1 of the imaging device is on, the output of the AND gate AND2 is not at a high level, the analog switch A8W2 is on, and the output of the operational amplifier OP1 becomes y, /.

Therefore, when the output q of the D-FF is at a low level and the switch 8W1 of the imaging device is off, the operational amplifier OP
1's output was v,', whereas the switch day W1
When is on, the output of operational amplifier OP1 becomes y,/.

That is, as shown in the right half of FIG. 4, the regulator level that controls the operation of the oscillation circuit 2-2 changes from vl to V, and the operation of the oscillation circuit 2-2 is controlled in the same manner as described above.

Therefore, when the imaging device is in a state to perform a photographing operation and the switch W1 is turned on, the voltage of the main capacitors 2 and -5 will always change between v3 and V, and the imaging device will not be able to take a photograph. Even if the synchronizer section 2-8, trigger section 2-7, and light emitting section 2-9 emit light at the same time, the amount of light emitted can always be kept almost constant.

FIG. 5 shows the second example of the present invention! ! A circuit diagram of an example is shown. Fifth
Shown in the diagram! ! In this embodiment, a neon tube is provided in place of the pilot rung control section shown in FIG. 2 to indicate the completion of charging.

In Fig. 5, 1 is a power battery, 1' is a power switch,
2 is a PNP transistor for oscillation, 3 is a capacitor, 4 is a resistor, and 5 is a step-up transformer. 2 to 5 above constitute a known booster circuit A.

A diode 7 for rectifying the AC output of the 6-digit booster circuit A is a main capacitor, which is equivalent to the main capacitor shown as 2-5 in the embodiment of FIG. Connected in parallel to this are a series circuit of a resistor 8.9, a series circuit of a resistor 10, a neon lamp 11 for indicating completion of charging, a series circuit of a resistor 12, a synchro switch 15, and a flash discharge tube 16. Here, resistors 8 and 9 connect a voltage divider circuit B that divides the charging voltage of the main capacitor 7, a resistor 10, and a neon lamp 1.
1 constitutes a charging completion display circuit C. B is a capacitor,
14 is a trigger coil, and 12 to 15 form a known trigger circuit.

17 has an emitter connected to the emitter of transistor 2, a collector connected to the base of transistor 2, and a base connected to resistor 1.
This is a transistor connected to the output of an operational amplifier 19 via a transistor 8. 20 is a reference voltage generation circuit which generates the reference voltage Vre.
Outputs f. 21.22 is a voltage dividing resistor that divides the reference voltage Vref, 23 is a resistor connected to the output of the operational amplifier 19 and the non-inverting input terminal, 24, 25.26 is a resistor, a diode, and a power switch of the camera, respectively, when the power switch is turned off. The resistor 2 is a switch that turns on when , and turns off when it is on.
4, the diode 25 and the switch 26 are connected in series,
The series circuit is connected in parallel with resistor 2-3. Further, the switch 26 is controlled according to a signal input from the terminal sw1.

Next, the operation of this embodiment configured as above will be explained. When the power switch 1' is turned on, the reference voltage generating circuit 20 outputs a reference voltage E Tree. In this state, no charge is stored in the main capacitor 7, so the voltage at the connection point of the resistor 8.9 is low. Therefore, since the output of the operational amplifier 19 is at a high level, the transistor 17 is turned off and the booster circuit starts oscillating boosting operation.

The output of the booster circuit is rectified by diode 6, and main capacitor 7 is charged. The voltage of main capacitor 7 is
When the lowest voltage that can emit light (8:vIK) is reached, the neon lamp 11 lights up. In this state] 11, when a release operation is performed in the imaging device, the synchro switch 15 is turned on in synchronization with the release operation, the trigger circuit is operated, and the flash discharge tube 16 emits light.

After the voltage of the main Yabashita 7 reaches vI, the booster circuit A
Further charging is performed.

Here, the relationship between the voltage of main capacitor 7 and the operation of booster circuit A will be explained. In the following description, the charging voltage of the main capacitor 7 is assumed to be vMc, and the voltage divided by the voltage dividing circuit B is assumed to be KVMO (K<1). Also, the high level output of the comparator 19 is VHo - the level output is VL
shall be.

Also, to make the explanation easier to understand, V'a = vBatt (vBatt: power supply t
a 1 O voltage )vL=.

Approximate it as

First, a case where the power switch of the imaging device is off will be described. When the power switch of the imaging device is off, the switch 26 is turned on in conjunction. When the external pressure circuit A operates as described above and the voltage of the main capacitor 7 reaches V and continues to be charged, the output of the comparator 19 is at a high level and the transistor 17 is turned off. ing.

In this case, the voltage V at the non-inverting input terminal of the comparator 19
If the resistance values of the resistors 21 to 24 are R11 to R14, + is expressed because the resistor 24 is cut off by the diode 25, and V+ expressed by the same magnitude is the voltage V shown in FIG. 4 above. A resistance value of ~Rtm is selected for the resistor so as to correspond to the divided voltage KVMOK corresponding to .

The charging voltage varies by V and K due to charging of the main capacitor.
The output of the default comparator 19 is inverted from high level to low level. Therefore, the transistor is turned on and the voltage between the emitter and collector of the transistor becomes approximately Ov, and the base and emitter of the transistor 2 are short-circuited, so the transistor is turned off and the operation of the booster circuit stops.

When the operation of the booster circuit stops, the voltage of the main capacitor 7 gradually decreases due to the leakage current of the main capacitor 7 and the current flowing to the neon lamp 11.

Also, at this time; since the output of the comparator 19 is inverted to low level, the diode 25 is conductive, and the resistor 24
is inserted in parallel with the resistor 23, the voltage V+ at the non-inverting input terminal of the comparator 19 becomes vBatt in the diagram.
This is achieved by setting the term 0 to 0 and inserting the resistor 24 in parallel with the resistor 23. Therefore, if the resistance value R1+ of the resistor 24 is set so that this value corresponds to the voltage V, shown in FIG. The signal is inverted to a high level, and the transistor 7 is turned off. Therefore, the booster circuit starts operating again, and the main capacitor 7 is charged.

Also, since the output of the comparator 19 is inverted from low level to high level, the voltage V+ at the non-inverting input terminal of the comparator 19 becomes the value shown in equation (3), so until the voltage of the main capacitor 7 reaches the value indicated by V, K. Comparator 19
The output remains at a high level, the booster circuit continues to operate, and charging progresses. When the voltage of the main capacitor 7 decreases to the value shown by vl in FIG. 4, the output of the comparator 19 is inverted from high level to low level, and the same operation as described above is performed.

Next, a case where the power switch of the imaging device is on will be described. When the power switch of the imaging device is on, the switch is turned off in conjunction, so the resistance 240 term in equation (4) is set to zero. Therefore, this value is the electric current EE v shown in FIG.
If the voltage of the main capacitor 7 is set to correspond to tK, the output of the comparator 19 will be inverted from low level to high level as the voltage of the main capacitor 7 decreases at v and o. Therefore, the voltage of the main capacitor 7 goes back and forth between voltage zero and V, as shown on the right side of FIG.

According to this example, the example @1 has 3 analog switches.
11i is provided to generate voltages a: v, ', v of the reference voltage generation circuit RG.
, ', v,' are switched, and by applying positive feedback to the operational amplifier 19, a comparator with hysteresis characteristics can be obtained, so the configuration can be simplified.

In the embodiments described above, the regulator level was changed in response to turning on the switch 8W1 of the imaging device, but if the flash device of the present invention is incorporated into the imaging device, the signal is changed in conjunction with the pop-up of the flash unit. A child actor may be provided to generate the signal, and the regulator level may be changed in accordance with the signal of the means.

Further, the control means for controlling the voltage of the main capacitor of the flash device of the present invention to be between a first level and a level of $2 which is higher than the first level is a hero example of @j. In the example, it corresponds to the operational amplifier 0F2D-FF and the reference power supply unit 2-13, and in the second embodiment, it corresponds to the transistor 17, the operational amplifier 19, and the resistors 21 to 23.

Additionally, in the first and second embodiments, the means for generating a signal that is in the first state and fk when the imaging device is in the imaging state, and in the second state when it is not in the imaging state. means corresponding to the terminal 8'W1 and responsive to the signal of the detection means being in the second state to lower the second level compared to when the signal is in the first state; In the first embodiment, Antogame N1)1. Equivalent to AND2 inverter MV, the second! ! In the example, switch 26
corresponds to

〔Effect of the invention〕

As explained above, according to the present invention, the regulator level of the control circuit that controls the charging circuit of the main capacitor of the flash device is set low when the imaging device is not in the shooting state, and is set high when the imaging device is in the shooting state. Therefore, by increasing the period during which the voltage of the main capacitor is relatively low, the voltage of the main capacitor is increased.
The leakage current of the capacitor can be suppressed to a small level, and the consumption of the power supply battery can be reduced.Furthermore, even when the imaging device is not in the shooting state, the voltage of the main capacitor is always above the specified level, so the shooting device can switch to the shooting state. However, since the main capacitor voltage can be charged to full charge level in a short period of time, flash photography can be performed immediately.

4 Quick Explanation of Drawings Figure 1 is a diagram showing the voltage of the main capacitor of a conventional flash device, Figure 2 is a block diagram of the first embodiment of the present invention, and Figure 5 is shown in Figure 2. Reference power supply 2-15, switching section 2-
14. A circuit diagram of the comparator 2-15. FIG. 4 is a diagram showing the voltage of the main capacitor shown in FIG. 2. FIG. 5 is a circuit diagram of a second embodiment of the present invention.

2-3...Regulator 2-13...Reference voltage source 2-14...Switching section 2-15... Comparator

Claims (1)

[Scope of Claims] A flash device used with an imaging device that stores flash energy in a main capacitor by a charging circuit, wherein the voltage of the main capacitor of the flash device is at a first level and a second level higher than the first level. a control means for controlling the voltage so that the voltage is between , and generating a signal that is in a first state when the imaging device is in a shooting-ready state and in a second state when it is not in a shooting-ready state; and means for reducing the second level in response to the signal of the detection means being in the second state compared to when the signal is in the first state. Flash device.