JPS5821380A - Manufacture of semiconductor pressure transducer - Google Patents

Manufacture of semiconductor pressure transducer

Info

Publication number
JPS5821380A
JPS5821380A JP11772081A JP11772081A JPS5821380A JP S5821380 A JPS5821380 A JP S5821380A JP 11772081 A JP11772081 A JP 11772081A JP 11772081 A JP11772081 A JP 11772081A JP S5821380 A JPS5821380 A JP S5821380A
Authority
JP
Japan
Prior art keywords
base
semiconductor wafer
sections
fixed
sensitive element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11772081A
Other languages
Japanese (ja)
Inventor
Minoru Takahashi
実 高橋
Hitoshi Minorikawa
御法川 斉
Noriyoshi Arakawa
荒川 紀義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11772081A priority Critical patent/JPS5821380A/en
Publication of JPS5821380A publication Critical patent/JPS5821380A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/84Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of applied mechanical force, e.g. of pressure

Abstract

PURPOSE:To fix a semiconductor substrate or a base board excellently while preventing the generation of stress concentration in the fixing surfaces of the substrate or the base board by previously forming a groove to either one of the fixing surfaces along a dicing line. CONSTITUTION:Through-holes 5A are formed at the centers of sections isolated through the post-process of the base board body 5 and the grooves 5B along the dicing lines. A pressure sensitive element 6 is shaped integrally to the semiconductor substrate, and has diaphragm sections 6A and supporting sections 6B in a surface opposed to the base 5, and the sections 6A are arranged while being opposed to each through-hole 5A. Gage resistors 12 and electrodes 13 are formed to the surfaces of the diaphragms 6A. The pressure sensitive element 6 to which the dicing base 5 is fixed along the lines D is acquired. According to this constitution, even when the substrate is slightly warped or the supporting sections 5B are displaced from predetermined positions and fixed and concentrated stress is generated when the semiconductor substrate is fastened, the stress can be absorbed by the sections not fixed of the grooves 5A, and the characteristics of the pressure sensitive element 6 are not affected adversely.

Description

【発明の詳細な説明】 本発明は半導体圧力変換器の製造方法に関する。[Detailed description of the invention] The present invention relates to a method of manufacturing a semiconductor pressure transducer.

たとえば自動車等に用いられる圧力変換器は、第1図に
示すように構成されている。同図において、外囲器1が
あり、この外囲器1はケース部、IAと蓋IBとからな
っている。前記ケース部1人には外気と通ずる通気孔2
が設けられ、この通気孔2上のケース部IA内はケーシ
ング3が固定配置されている。前記ケーシング3は前記
通気孔2と同軸に外気導入孔4が設けられ、この外気導
入孔4上のケーシング3内にはたとえばガラスからなる
ベース5が固定配置されている。このベース5は、前記
外気導入孔4と同軸に貫通孔5人が形成され、この貫通
孔5Aを股がってペース5上には感圧素子6が固定配置
されている。
For example, a pressure transducer used in an automobile or the like is constructed as shown in FIG. In the figure, there is an envelope 1, which consists of a case portion IA and a lid IB. One person in the case part has two ventilation holes that communicate with the outside air.
is provided, and a casing 3 is fixedly disposed inside the case portion IA above the ventilation hole 2. The casing 3 is provided with an outside air introduction hole 4 coaxially with the ventilation hole 2, and a base 5 made of glass, for example, is fixedly arranged inside the casing 3 above the outside air introduction hole 4. This base 5 has five through holes formed coaxially with the outside air introduction hole 4, and a pressure sensing element 6 is fixedly arranged on the pace 5 across the through holes 5A.

感圧素子6は半導体基板面にたとえば拡散によりゲージ
抵抗が形成されたものからなり、前記ベース5の貫通孔
5Aと対向する部分は薄く形成されてダイヤスラムの機
能を有している。感圧素子6における外部端子はワイヤ
7を介してケーシング3に固定されたり−ド8に接続さ
れ、また前記リード8はケース部IA内に固定配置され
た増幅回路9を介してケース部IAに取付けられた外部
端子10によって電気的に引き出されている。
The pressure sensitive element 6 is made of a gauge resistor formed on the surface of a semiconductor substrate by, for example, diffusion, and the portion of the base 5 facing the through hole 5A is formed thin and has a diamond slam function. The external terminal of the pressure sensitive element 6 is fixed to the casing 3 via a wire 7 or connected to a lead 8, and the lead 8 is connected to the case IA via an amplifier circuit 9 fixedly disposed within the case IA. It is electrically drawn out by an attached external terminal 10.

なおケース部IA内には、前記増幅回路9等を被ってシ
リコンゲル11が注入されて耐湿性を向上させている。
Note that silicon gel 11 is injected into the case portion IA to cover the amplifier circuit 9 and the like to improve moisture resistance.

ところで、このような圧力変換器において、ベースとこ
れに固着される感圧素子6とは一体造して形成するのが
一般的であり、従来、ダイシングする前の比較的大きな
面積を有するベース板体と半導体ウェーハとを固着した
後に、半導体ウェーハ面の各感圧素子6をベース5ごと
ダイシングしていた。しかしながら、従来のこのような
方法において、前記感圧素子6は、半導体基板の裏面中
央にたとえばエツチング等により凹陥部を形成して〜ダ
イヤフラム部とそれ以外の比較的面積の大きな支持部が
形成された構成とし、かつベース5は貫通孔5Aのみが
形成された平板材としたものであることから、ベース5
と半導体ウェーハとの固着においては各感圧素子6の支
持部全域になされるようになる。
By the way, in such a pressure transducer, the base and the pressure sensitive element 6 fixed to the base are generally formed integrally, and conventionally, a base plate having a relatively large area before dicing is used. After fixing the body and the semiconductor wafer, each pressure sensitive element 6 on the surface of the semiconductor wafer was diced together with the base 5. However, in such a conventional method, the pressure-sensitive element 6 is formed by forming a concave part by etching or the like in the center of the back surface of the semiconductor substrate, and then forming a diaphragm part and a supporting part having a relatively large area other than that part. Since the base 5 is a flat plate material in which only the through hole 5A is formed, the base 5
When fixing the pressure-sensitive elements 6 to the semiconductor wafer, the entire support portion of each pressure-sensitive element 6 is fixed.

したがって、ベース5に対する半導体ウェーハの固着の
際に、前記半導体ウェーハに若干の反9等が生じた場合
、感圧素子6の支持部がペニス5上の所定個所からずれ
て固着されたりし、Cの結果、応力集中が発生し固着が
充析になされないとともに応力歪みがダイヤフラム部に
至り特性上悪影響を及ぼすという欠点がめった。
Therefore, when the semiconductor wafer is fixed to the base 5, if the semiconductor wafer is slightly bent, the support part of the pressure sensitive element 6 may be deviated from a predetermined position on the penis 5 and may be fixed. As a result, stress concentration occurs and fixation is not achieved through filling, and stress strain reaches the diaphragm portion, which has an adverse effect on the characteristics.

本発明の目的は、ベースに対する感圧素子の固着を良好
にし、かつその固着面において応力の集中発生を防止す
るようにした半導体圧力変換器の製造方法を提供するこ
とにおる。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor pressure transducer that improves the adhesion of a pressure-sensitive element to a base and prevents the concentration of stress on the adhesion surface.

このような目的を達成するために、本発明は、裏面中央
部に凹陥部が形成され、これにより形成されるダイヤフ
ラムの主表面にゲージ抵抗を有する感圧素子を複数個形
成した半導体ウェーハと、前記各感圧素子に固着される
個々のベースを一体化したベース板体とを固着し、前記
半導体ウェーハの各感圧素子をベースごとにダイシング
する半導体変換器の製造方法において、前記半導体ウェ
ーハと前記ベース板体との少なくともいずれか一方の固
着面にダイ、′l/lダンインに沿った溝を形成してお
くことを特徴とするものである。
In order to achieve such an object, the present invention provides a semiconductor wafer in which a concave portion is formed in the center of the back surface, and a plurality of pressure sensitive elements having a gauge resistance are formed on the main surface of a diaphragm formed thereby; In the method for manufacturing a semiconductor converter, the semiconductor wafer and the semiconductor converter are bonded together with a base plate body which is an integral part of the individual bases fixed to each of the pressure-sensitive elements, and each pressure-sensitive element of the semiconductor wafer is diced for each base. The present invention is characterized in that a groove along the die and 'l/l dunn-in is formed in at least one of the fixing surfaces to the base plate.

以下、実施例を用いて本発明の詳細な説明する。Hereinafter, the present invention will be explained in detail using Examples.

第2図は本発明による半導体圧力変換器の製造方法の一
実施例を示す断面図である。ベース板体5があシ、この
ベース板体5は一板の板材からなり後工程のダイシング
で分離されるべき各ベースの中央にそれぞれ貫通孔5A
が設けられているとともに1ダイシングラインに沿って
溝5Bが形成されている。
FIG. 2 is a sectional view showing an embodiment of the method for manufacturing a semiconductor pressure transducer according to the present invention. The base plate body 5 is made of a single plate and has a through hole 5A in the center of each base to be separated in the subsequent dicing process.
A groove 5B is formed along one dicing line.

そして1このように構成されているベース板体5の上面
には半導体ウェーハが固着されるようになっている。前
記半導体ウェーハは複数の感圧素子6が一体に形成され
ているものであり、各感圧素子6は、前記ベース5との
対向面にてたとえばエツチングで凹陥部が形成されるこ
とによシダイヤフラム部6Aとそれ以外の領域にて支持
部6Bとを有する。なお、前記半導体ウェーハはその各
凹陥部がベース5の各貫通孔5Aと対向するように配置
される。
1. A semiconductor wafer is fixed to the upper surface of the base plate 5 constructed in this way. The semiconductor wafer is one in which a plurality of pressure sensitive elements 6 are integrally formed, and each pressure sensitive element 6 is etched by forming a recessed portion on the surface facing the base 5, for example. It has a diaphragm portion 6A and a support portion 6B in the other area. Note that the semiconductor wafer is arranged such that each of its recesses faces each of the through holes 5A of the base 5.

前記ダイヤフラム部6Aの表面には半導体ウェーハと異
なる導電型の拡散層の形成により得られるゲージ抵抗1
2、このゲージ抵抗12に接続された引き出し電極13
が配置されている。
A gauge resistor 1 obtained by forming a diffusion layer of a conductivity type different from that of the semiconductor wafer is formed on the surface of the diaphragm portion 6A.
2. Extracting electrode 13 connected to this gauge resistor 12
is located.

そして、このようにして得られるベース板体5と半導体
ウエーノ・との一体楕成物は、たとえばブレードによっ
て、図中D−D線すなわちダイシングラインに沿ってダ
イシングされ、第3図に示すように、ベース5が固着さ
れた個々の感圧素子6に分離される。
The integral ellipse of the base plate 5 and the semiconductor wafer thus obtained is then diced, for example, with a blade along line D-D in the figure, that is, along the dicing line, as shown in FIG. , into individual pressure sensitive elements 6 to which a base 5 is fixed.

このようにすれば、ダイシングラインに沿って溝が形成
されたベース5に半導体ウエーノ・を固着する場合、実
際、ベース5との固着部である支持部5Bは前記溝5A
の占有面積分だけベース5との固着に関与しなくなる。
In this way, when the semiconductor wafer is fixed to the base 5 in which a groove is formed along the dicing line, the supporting part 5B, which is the part fixed to the base 5, is actually connected to the groove 5A.
It is no longer involved in fixing to the base 5 by the occupied area.

このため、ベース5に対する半導体ウエーノ・9固着の
際に前記半導体ウェーハに若干の反シ等が生じた場付、
感圧素子6の支持部がベース5上の所定個所からずれて
固着されたりし、この結果応力集中が発生しても、この
応力集中は前記溝5Aの個所すなわちベース5との非固
着部に吸収されるようになる。
Therefore, in the event that the semiconductor wafer 9 is slightly warped when the semiconductor wafer 9 is fixed to the base 5,
Even if the support portion of the pressure-sensitive element 6 is fixed to the base 5 in a manner that is shifted from a predetermined location on the base 5, and stress concentration occurs as a result, this stress concentration will be applied to the groove 5A, that is, the portion that is not fixed to the base 5. Becomes absorbed.

したがって、ベース5に対する半導体ウェーI・の固着
が充分になされ、かつダイヤフラム部6Aに至る応力歪
みがなくなることから感圧素子6の特性に悪影響を及ば
ずことはなくなる。
Therefore, the semiconductor wafer I. is sufficiently fixed to the base 5, and the stress strain reaching the diaphragm portion 6A is eliminated, so that the characteristics of the pressure sensitive element 6 are not adversely affected.

また、ベース5に形成する溝の深さを深く形成しておけ
ば、第2図中D−D線に沿ってダイシングをする場合、
そのダイシングは実質上半導体ウェーハトツース5のご
く一部であることから、その作業が極めて容易となる。
In addition, if the depth of the groove formed in the base 5 is deep, when dicing is performed along the line D-D in FIG.
Since the dicing is substantially a small part of the semiconductor wafer tooth 5, the work is extremely easy.

従来においては半導体ウェーハとベース5とを一度にダ
イシングしなければならず、その作業が困難であるとと
もに、半導体ウェーハとベースとのそれぞれの硬度の差
からダイシングするためのブレードをダイシング工程中
にて半導体ウェーハ用およびベース用と使い分けて使用
しなければならない欠点があった。
Conventionally, the semiconductor wafer and the base 5 had to be diced at the same time, which was difficult, and due to the difference in hardness between the semiconductor wafer and the base, it was necessary to use a dicing blade during the dicing process. It had the disadvantage that it had to be used separately for semiconductor wafers and bases.

なお、ベース5に形成する溝5Bはベース5に至るよう
にし、かつこの溝5Bによシ分割されるべき各ベース5
を一体保持するように、各ベース5の裏面に接着テープ
等を貼付させておくようにすれば上述した効果はよシ大
とすることができる。
Note that the groove 5B formed in the base 5 should reach the base 5, and each base 5 to be divided by this groove 5B
The above-mentioned effect can be further enhanced by pasting an adhesive tape or the like to the back surface of each base 5 so as to hold them together.

さらに、本実施例のようにすれば、予めベース5にダイ
シングを兼ねる溝5Bを形成する段階で半導体ウェーハ
は固着されていないことから、溝″5Bの形成によって
不良が生じてもベース5のみ    □の不良だけで抑
えることができるので歩留りを向上させることができる
Furthermore, according to this embodiment, since the semiconductor wafer is not fixed at the stage of forming the grooves 5B that also serve as dicing on the base 5 in advance, even if a defect occurs due to the formation of the grooves "5B", only the base 5 will be removed. Since it is possible to suppress only the defects of , the yield can be improved.

本実施例では、ベース5にそのダイシングラインに沿っ
て溝5Aを形成したものであるが、半導体ウェーハのベ
ース固着面においてダイシングラインに沿った溝を形成
しても本発明の目的を達成できることはいうまでもない
In this embodiment, the groove 5A is formed in the base 5 along the dicing line, but the object of the present invention can also be achieved even if the groove is formed along the dicing line on the base fixing surface of the semiconductor wafer. Needless to say.

また、第4図に示すように、ベース5および半導体ウェ
ーハのそれぞれの固着面において、ダイシングラインに
沿った溝(半導体ウェーハ側は信号14で示している)
を形成するようにしてもよいことはいうまでもない。
Furthermore, as shown in FIG. 4, grooves are formed along the dicing lines on the fixed surfaces of the base 5 and the semiconductor wafer (the semiconductor wafer side is indicated by a signal 14).
It goes without saying that it is also possible to form a .

以上述べたことから明らかなように、本発明によれば、
ベースに対する感圧累子の固着を良好にし、かつその固
着面において応力の東中元生を防止することができる。
As is clear from the above description, according to the present invention,
It is possible to improve the adhesion of the pressure-sensitive resistor to the base, and to prevent stress from occurring on the adhesion surface.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は半導体圧力変換器の構成を示す図、第2図は本
発明による半導体圧力変換器の製造方法の一実施例を示
す断面図、第3図は本発明による半導体圧力変換器の製
造方法の一実施例により得られる半導体圧力変換器を示
す断面図、第4図は本発明による圧力変換器の他の実施
例を示す断面図である。 5・・・ベース、5A・・・貫通孔、5B・・m、6・
・・感圧筒10 第20
FIG. 1 is a diagram showing the configuration of a semiconductor pressure transducer, FIG. 2 is a sectional view showing an embodiment of a method for manufacturing a semiconductor pressure transducer according to the present invention, and FIG. 3 is a diagram showing the manufacture of a semiconductor pressure transducer according to the present invention. FIG. 4 is a sectional view showing a semiconductor pressure transducer obtained by one embodiment of the method, and FIG. 4 is a sectional view showing another embodiment of the pressure transducer according to the invention. 5...Base, 5A...Through hole, 5B...m, 6...
...Pressure sensitive tube 10 No. 20

Claims (1)

【特許請求の範囲】[Claims] 1、裏面中央部に凹陥部が形成され、これにより形成さ
れるダイヤフラムの主表面にゲージ抵抗を有する感圧素
子を複数個形成した半導体ウェーハと、前記各感圧素子
に固着される個々のベースを一体化したベース板体とを
固着し、前記半導体ウェーハの各感圧素子をベースごと
にダイシングする半導体変換器の製造方法において、前
記半導体ウェーハと前記ベース板体との少なくともいず
れか一方の固層面にダイシングラインに沿った溝を形成
しておくことを特徴とする半導体圧力変換器の製造方法
1. A semiconductor wafer in which a concave portion is formed in the center of the back surface, and a plurality of pressure sensitive elements having a gauge resistance are formed on the main surface of a diaphragm formed by this, and individual bases fixed to each of the pressure sensitive elements. In the method of manufacturing a semiconductor converter, the semiconductor wafer and the base plate are fixed together, and each pressure-sensitive element of the semiconductor wafer is diced into base plates, the semiconductor wafer and the base plate being fixed together. A method for manufacturing a semiconductor pressure transducer, characterized by forming grooves along dicing lines on a layer surface.
JP11772081A 1981-07-29 1981-07-29 Manufacture of semiconductor pressure transducer Pending JPS5821380A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11772081A JPS5821380A (en) 1981-07-29 1981-07-29 Manufacture of semiconductor pressure transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11772081A JPS5821380A (en) 1981-07-29 1981-07-29 Manufacture of semiconductor pressure transducer

Publications (1)

Publication Number Publication Date
JPS5821380A true JPS5821380A (en) 1983-02-08

Family

ID=14718619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11772081A Pending JPS5821380A (en) 1981-07-29 1981-07-29 Manufacture of semiconductor pressure transducer

Country Status (1)

Country Link
JP (1) JPS5821380A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61267342A (en) * 1985-05-21 1986-11-26 Fujikura Ltd Manufacture of semiconductor chip
JPS6221277A (en) * 1985-07-19 1987-01-29 Nec Corp Electrostatic bonding method
JPH07176764A (en) * 1993-12-20 1995-07-14 Nec Corp Semiconductor sensor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61267342A (en) * 1985-05-21 1986-11-26 Fujikura Ltd Manufacture of semiconductor chip
JPS6221277A (en) * 1985-07-19 1987-01-29 Nec Corp Electrostatic bonding method
JPH07176764A (en) * 1993-12-20 1995-07-14 Nec Corp Semiconductor sensor

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