JPS58209134A - Monitor device for primary test - Google Patents

Monitor device for primary test

Info

Publication number
JPS58209134A
JPS58209134A JP9137382A JP9137382A JPS58209134A JP S58209134 A JPS58209134 A JP S58209134A JP 9137382 A JP9137382 A JP 9137382A JP 9137382 A JP9137382 A JP 9137382A JP S58209134 A JPS58209134 A JP S58209134A
Authority
JP
Japan
Prior art keywords
fiber cable
wafer
test
integrated circuit
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9137382A
Other languages
Japanese (ja)
Inventor
Kazuya Takuma
詫摩 一哉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9137382A priority Critical patent/JPS58209134A/en
Publication of JPS58209134A publication Critical patent/JPS58209134A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To monitor the surface of a wafer accurately during an IC test by forming an opening to one part of a probe card and fixing one tip of an optical- fiber cable. CONSTITUTION:The probe card 4 is bored 10 where separate from a probe 5, and the surface of the wafer 2 is monitored by the optical-fiber cable 11. Accordingly, irradiating beams do not strike to an IC chip to be tested, and the surface of the wafer can be monitored at all times while continuing the test. For example, a chip to which measurement is completed is moved under the opening 10, a contact position between the probe and a pad is brought to an adequate one on measurement, and the surface of the wafer can be monitored during the next chip measurement from an indentation by the probe remaining on the pad. The incorporation of a fiber cable for illumination into the optical- fiber cable 11 is effective, and only an observing section can be lit up. A video device is coupled with another tip of the cable, and the surface of the wafer can be monitored precisely.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は、1次試験用モニタ装置に関し、特にウーエハ
ー上に形成された集積回路装置のパッドにプローブを当
接して該集積回路装置の試#を行なう装置において、該
ウェハー上の集積回路装置の観察を行なうために設けら
れたモニタ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a monitor device for primary testing, and particularly to a monitoring device for testing an integrated circuit device formed on a wafer by contacting a probe with a pad of the integrated circuit device. The present invention relates to a monitor device provided for observing integrated circuit devices on a wafer in an apparatus for performing #.

(21技術の背景 集積回路装置の実情工程にンいて、該集積回路装置をウ
ェハー上に形成された状懐で試験を行なういわゆる1次
試験は集積回路装置の製造工程における種々の欠陥を早
期に発見する上で極めて重要な作業の1つである。この
ような1次試験においては、ウェハー上に形成され友集
積回路装置の動作試験を行なうためにウェハー上の集積
回路装置の・ヤノドにグローブを当接して該集積回路装
置と外部回路との接続が行なわれる。この場合、グロー
ブが集積回路装置のパッド部分に正確にrg置央めされ
i接されることが必要であり、グローブと集積回路装置
のパッドとの位置関係がずれていると該プローブによっ
て集積回路装置の他の回路部分を破損する恐れがあると
ともに、ウェハー上に形成された各$積回路装置を順次
試験する際にプローブとパッドとの位置関係が最初から
また(−途中からずれることにより以後の集積回路装置
のすべてについて沿直ずれが生じ、最悪の場合以後のす
べての集積回路装置を破損するという事故を・生ずるこ
とがある。従って、1次試験を行なう場合ニゲロープと
パッドとの位置関係を的確に観察できるようにすること
が必要となる。
(21 Background of Technology) Regarding the actual process of integrated circuit devices, the so-called primary test, in which the integrated circuit device is tested while it is formed on a wafer, is used to detect various defects in the manufacturing process of integrated circuit devices at an early stage. This is one of the most important tasks for discovery.In such primary testing, a glove is placed on the top of the integrated circuit device on the wafer in order to test the operation of the integrated circuit device formed on the wafer. The integrated circuit device is connected to an external circuit by contacting the integrated circuit device with If the positional relationship with the pad of the circuit device is misaligned, the probe may damage other circuit parts of the integrated circuit device. If the positional relationship between the pad and the pad deviates from the beginning (-), all subsequent integrated circuit devices may be misaligned, and in the worst case, an accident may occur in which all subsequent integrated circuit devices are damaged. Therefore, when conducting the first test, it is necessary to be able to accurately observe the positional relationship between the rope and the pad.

(3)  従来技術と問題点 第1囚は、従来形の1次試験装置の概賂を示す。(3) Conventional technology and problems The first prisoner represents a conventional primary test device.

同図において、lはステージ、2はステージ1の上に搭
載されたウェハー、3は取付台 4はグローブカード、
5はプローブである。また、6は試験装置本体であり試
験用電子回路等を内蔵しており、該試験用電子回路は接
続リード7 VCよってプローブと接続されている。8
は顕微鏡、9は顕微鏡8の接眼レンズである。
In the figure, l is a stage, 2 is a wafer mounted on stage 1, 3 is a mounting base, 4 is a glove card,
5 is a probe. Reference numeral 6 denotes a main body of the test device, which contains a test electronic circuit, etc., and the test electronic circuit is connected to the probe through a connection lead 7 VC. 8
is a microscope, and 9 is an eyepiece of the microscope 8.

第1図の装置に2いては、1次試験を行なう場合はステ
ージ1を上昇させてウェハー2上に形成され之1つの果
ぶに回路装置のパッドにグローブ5を当接させ、試験装
置本体6に内蔵された試験用電子回路によって該果覆回
路の試験が行なゎnる、この場合ウェハー2上の1つの
集積回路装置の試験が終了するとステージ1は所定ピッ
チだけ移動され、次の集積回路装置の試験が行なわれろ
うこのようにしてウェハー2上の集積回路装置が順次試
験さnる。このような試ぷ全行なう場合に、プローブ5
が集積回路装置の・デッド上に正確に当接しているか否
かを調べる定めに、従来は顕微鏡8に内蔵された図示し
ない照明装置によってウェハー表面を照明し、この状態
で顕微鏡8によってウェハー表面全観察すること&でよ
りグローブの当接位置等の検晋を行なっていた。
In the apparatus shown in FIG. 1, when conducting the first test, the stage 1 is raised, the glove 5 is brought into contact with the pad of the circuit device formed on the wafer 2, and the test apparatus itself is removed. The test circuit is tested by the test electronic circuit built into the wafer 6. In this case, when the test of one integrated circuit device on the wafer 2 is completed, the stage 1 is moved by a predetermined pitch and the next one is moved. Testing of the integrated circuit devices will be performed.In this way, the integrated circuit devices on the wafer 2 will be tested one after another. When performing all such trials, probe 5
Conventionally, in order to check whether or not the wafer is in accurate contact with the dead surface of the integrated circuit device, the wafer surface is illuminated by an illumination device (not shown) built into the microscope 8, and in this state, the entire wafer surface is By observing and checking the contact position of the glove, etc.

しかしながら、第1図の従来形の装置6ておいては、例
えばMO8型集積回路等においてbウェハー表面のH察
を行19場合は集積回路装置の動作試験等を中止して行
なう必要があった、こn、はMO8型集積回路装置等は
極めて微少な電流で動作している之め照明を行なうこと
によって光″電子の衝突による放出′1流が発生し、集
積回路装置の正確な検査をすることが不可能となるから
でりる。
However, with the conventional device 6 shown in Fig. 1, when performing H detection on the surface of the b wafer in, for example, an MO8 type integrated circuit, it was necessary to stop the operation test of the integrated circuit device. Since MO8 type integrated circuit devices and the like operate with extremely small currents, illumination generates an emission current due to the collision of photoelectrons, making it difficult to accurately inspect integrated circuit devices. This happens because it becomes impossible to do so.

即ち、前記従来形においては、集積回路装置の動作試験
中等はウェハーの観察等のモニタリングが不可能である
という不都合があった。さらに、前記従来形においては
、集積回路装置のパッドにグローブを当廣した状態でモ
ニタリングを行なう友めグローブによって視界の多くが
さえぎられ、適確なモニタリングを行なうことが不可能
であるという不都合があった。
That is, in the conventional type, there is a disadvantage that monitoring such as observation of the wafer is impossible during operation tests of the integrated circuit device. Furthermore, in the conventional type, much of the field of view is obstructed by the friend glove, which is used for monitoring with the glove placed over the pad of the integrated circuit device, making it impossible to perform accurate monitoring. there were.

(4)発明の目的 本発明の目的は、前述の従来形における問題点に鑑み、
集積回路装置等の1次試験用のモニタ装置tI/C2い
て、元ファイバケーブル企用いてワエ/・−表面を一部
するという構想に基づき、集積回路装置等の試験測定中
においてもウェハー表面のモニタリングt−適Nに行ま
うことがでさるよりにすることにある。
(4) Purpose of the Invention The purpose of the present invention is to:
The monitor device tI/C2 for primary testing of integrated circuit devices, etc. is based on the concept of using a fiber cable to partially cover the wafer surface, even during test measurements of integrated circuit devices, etc. Monitoring - The goal is to do what is right.

15)  発明の構成 そしてこの目的は本発明によれ、ば、集積回路装置のウ
ェハーを順次移動しながら、グロー1カードに設は之グ
ローブf;r#ウェハー上の集積回路装置のパッドに当
接して該集積回路装置の1次試堕を行なう検査装置にお
いて、該ブロー1カードの一部に腰部用の開口を設け、
該開口に元ファイノぐケーブルの一端を固定し該光フア
イバケーブルを介してウェハー表面を観察できるように
したことを特徴とする1次試験用モニタ装置を提供する
ことによって達成される。
15) Structure and object of the invention According to the present invention, for example, while sequentially moving the wafers of integrated circuit devices, the globe f; In an inspection device that performs a first test of the integrated circuit device, a part of the blow 1 card is provided with an opening for the waist,
This is achieved by providing a primary test monitor device characterized in that one end of an optical fiber cable is fixed to the opening so that the wafer surface can be observed through the optical fiber cable.

(6)  発明の実施例 以下図面を用いて本発明の実施例1r−説明する。(6) Examples of the invention Embodiment 1r of the present invention will be described below with reference to the drawings.

第2図は、不発明の1実誇例Vこ係わる1次試験用モニ
タ装置を示す。第2図において、第1図と1司−の部分
tlPI−の参照番号で示されている。第2因の装置が
第1図の装置と異なる点はグローブガード4の一部に観
察用の開口10を設け、該開口10に元ファイバケーグ
ル11の−gfAを1定し、該尤ファイバケーブルを介
してウェハー2の表面、  全盈察できるようにした点
である。また、#元ファイバケーブル11の他端に(1
テレビジヨンカメラ装置およびモニターテレビソヨン全
具備する映像装置12が結合されている。あるい(・;
、該尤ファイバケーブル11を照明用および受光用のフ
ァイバケーブルを束ねた物でmIby、シ、受光用ケー
ブルの他端は先の映像装置に結合し照明用ケーブルの他
端は図示しない照明装置に結合するようにすることもで
きる。
FIG. 2 shows a primary test monitor device according to an uninvented example V. In FIG. 2, the portion tlPI- of FIG. The device for the second cause is different from the device shown in FIG. The point is that the entire surface of the wafer 2 can be observed through the cable. Also, at the other end of the # original fiber cable 11 (1
A video device 12 comprising a television camera device and a monitor television camera is coupled. Or (・;
The fiber cable 11 is a bundle of fiber cables for illumination and light reception. They can also be combined.

第2図の装置においては、グローブ5とは別の位置にグ
ローブカード4に開口10を設け、該開口を介して元フ
ァイバケーブル1lVCよってウェハー表面のモニタリ
ングを行なうことができるので、被試験集積回路チップ
に照明光が当らず、集積回路チップの試験測定を続行さ
せながら常時モニタリングすることが可能となる。PI
ち例えは試@測定の終了したICチッfを開口10の下
に移動し試J唄11定の場合におけるグローブとノンラ
ドの当接位置が的確であるか否かを、・!ラド上に形成
されたグローブによるくぼみ等により、次の集積回路チ
ップの試倹測定中にモニタリングすることができる。な
お、ウェハー表面の照#3は前述のように元ファイバケ
ーブル11に照明用ファイバケーブルを徂込んでおくこ
と&こより憧めで効果的にウェハー表面の観察部分のみ
全照明することができる。さらに、元ファイバケーブル
11の他端6て前述のような映像装置を結合しモニター
テレビノヲンにてウェハー表面の観察を行なうことによ
り的確かつ鮮明なモニタリングを行なうことができる。
In the apparatus shown in FIG. 2, an opening 10 is provided in the glove card 4 at a position different from the glove 5, and the wafer surface can be monitored through the opening by the original fiber cable 11VC, so that the integrated circuit under test can be monitored. Since the chip is not exposed to illumination light, it is possible to constantly monitor the integrated circuit chip while testing and measuring it. P.I.
For example, move the IC chip after the test @ measurement to the bottom of the opening 10, and check whether the contact position of the glove and the non-rad is accurate in the case of test J song 11. A glove indentation or the like formed on the rad allows for monitoring during the subsequent trial measurement of the integrated circuit chip. As for the illumination #3 on the wafer surface, as described above, by inserting the illumination fiber cable into the original fiber cable 11 and by doing so, it is possible to effectively illuminate only the entire observation portion of the wafer surface. Furthermore, accurate and clear monitoring can be performed by connecting the other end 6 of the original fiber cable 11 to the above-mentioned imaging device and observing the wafer surface on a monitor television.

(7)  発明の効果 このように本発明によれは′、試験測定中の平績口路チ
ップに照明光が当らないようにしてウェハー表面を観察
でさ、フたプローグによって視界をさえぎらnることか
ないから、集積回路チップの試験測定中においても常時
ウェハー表面のモニタリングを的確に行なうことが可能
となり、集積回路装置等の製造歩留まりを改善すること
かでさる。
(7) Effects of the Invention As described above, according to the present invention, it is possible to observe the wafer surface by preventing the illumination light from hitting the Heiguchi chip during test measurement, and by blocking the view with the lid probe. Therefore, it becomes possible to accurately monitor the wafer surface at all times even during testing and measurement of integrated circuit chips, which improves the manufacturing yield of integrated circuit devices and the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図に、従来形の1次′に験用モニター装置金示す概
略図、そして 第2必は、本発明の1実施例に係わる1次試験用モニタ
ー装置の構成を示す概略的側面図1である。 ■・・・ステージ、2・・・ウェハー、3・・・取付台
、4・・・グローブカード、5・−・グローブ、6・・
・試験装置本体、7・・・接続リード、8・・・顕微鏡
、9・・・接眼レンズ、10・・・開口、11・・・元
ファイバケーフル、12・・・映像装置。 特許出願人 富士通株式会社 特許出願代理人 弁理士  實 木    朗 弁理士  西 舘 和 之 弁理士  内 1)幸 男 弁理士  山  口  昭 之
FIG. 1 is a schematic diagram showing a conventional primary test monitor device, and FIG. 2 is a schematic side view showing the configuration of a primary test monitor device according to an embodiment of the present invention. It is. ■...Stage, 2...Wafer, 3...Mounting stand, 4...Glove card, 5...Glove, 6...
- Test device main body, 7... Connection lead, 8... Microscope, 9... Eyepiece, 10... Aperture, 11... Original fiber cable, 12... Image device. Patent Applicant: Fujitsu Limited Patent Application Agent: Patent Attorneys: Akira Minori, Patent Attorney, Kazuyuki Nishidate, Patent Attorney: 1) Yukio, Patent Attorney: Akira Yamaguchi

Claims (1)

【特許請求の範囲】 L 集積回路装置のウニ・・−を順次移動しなから、7
’o−プカードに設けたプローブを該ウエノ1−上の集
積回路装置のパッドに当接して該集積回路装置の1次試
す全行なう検量装置において、該プローブカードの一部
に観察用の開口を設け、該開口に光フアイバケーブルの
一端を固定し該元ファイバケーブルを介してウエノ・−
表面を観察できるようにしたことをfj像とする1次試
験用モニタ装置。 2、該元ファイバケーブルの他端にはテレビヅヨンカメ
ラ2よびモニタテレピノヨンを具備する映像装置が結合
されていることを特徴とする特許請求の範、囲第1項に
記載の1次試験用モニタ装置。 ″A、該元ファイバケーブルの一部の他端には照明用光
源が結合されており、該照明用光源によって該ウェハー
面を照明できるようにしたことを特徴とする特許請求の
範囲第1項または第2項に記載の1次試験用モニタ装置
[Claims] L. Since the parts of the integrated circuit device are sequentially moved, 7
In a calibration device that performs a first test of the integrated circuit device by contacting a probe provided on the probe card with the pad of the integrated circuit device on the probe card, a part of the probe card is provided with an aperture for observation. one end of the optical fiber cable is fixed in the opening, and the optical fiber cable is connected through the original fiber cable.
A monitor device for the primary test that allows the surface to be observed as an fj image. 2. The primary device according to claim 1, characterized in that the other end of the source fiber cable is connected to a video device comprising a television camera 2 and a monitor television. Test monitor device. ``A. An illumination light source is coupled to the other end of the part of the original fiber cable, and the wafer surface can be illuminated by the illumination light source.Claim 1. Or the monitor device for the primary test described in Section 2.
JP9137382A 1982-05-31 1982-05-31 Monitor device for primary test Pending JPS58209134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9137382A JPS58209134A (en) 1982-05-31 1982-05-31 Monitor device for primary test

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9137382A JPS58209134A (en) 1982-05-31 1982-05-31 Monitor device for primary test

Publications (1)

Publication Number Publication Date
JPS58209134A true JPS58209134A (en) 1983-12-06

Family

ID=14024569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9137382A Pending JPS58209134A (en) 1982-05-31 1982-05-31 Monitor device for primary test

Country Status (1)

Country Link
JP (1) JPS58209134A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6376342A (en) * 1986-09-18 1988-04-06 Tokyo Electron Ltd Probe device
JPS63204153A (en) * 1987-02-19 1988-08-23 Tokyo Electron Ltd Probe
US5172053A (en) * 1989-02-24 1992-12-15 Tokyo Electron Limited Prober apparatus
US6657446B1 (en) * 1999-09-30 2003-12-02 Advanced Micro Devices, Inc. Picosecond imaging circuit analysis probe and system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6376342A (en) * 1986-09-18 1988-04-06 Tokyo Electron Ltd Probe device
JPS63204153A (en) * 1987-02-19 1988-08-23 Tokyo Electron Ltd Probe
US5172053A (en) * 1989-02-24 1992-12-15 Tokyo Electron Limited Prober apparatus
US6657446B1 (en) * 1999-09-30 2003-12-02 Advanced Micro Devices, Inc. Picosecond imaging circuit analysis probe and system

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