JPS58205249A - Microcomputer with output terminal for display - Google Patents

Abstract

PURPOSE:To assign optional segments to an output terminal for display, by connecting optional bits of a segment data bus and optional bits of a strobe bus to a latch circuit selectively by a mask during manufacturing. CONSTITUTION:Liquid-crystal driving circuits 20 which drive liquid crystal at two different kinds of timing (X, Y) are connected to output terminals P1-P3 and a latch circuit 21 is connected to the terminal X and Y of each liquid- crystal driving circuit 20. A data input line 22 is connected to the latch input L of each latch circuit 21 and the output of an AND gate 23 is connected to the control terminal phi. Further, control input lines 24 and 25 are connected to the inputs of each AND gate 23. The data input line 22 and control input lines 24 and 25 constitute an input line and a strobe signal and segment data signals segDa-segDg constitute a matrix.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microgon viewer having a display output terminal, and more particularly to a microcomputer having a built-in drive circuit capable of driving a liquid crystal display device or the like.

In the past, only a few 4-pit, 1-step microcomputers (2) were equipped with a display output terminal that could directly pivot the display device. However, in recent years, 4-pit, 1-chip microcomputers (2) As a result, devices equipped with display output terminals appeared.F
FI=C for electronic watches: Among the microcomputers that have been developed, for example, some are provided with a display output terminal in which a drive circuit for dynamically driving a liquid crystal display device is built-in.

However, the display segments assigned to the display output terminal (2) are predetermined by the microcomputer manufacturer, and the segment pattern of the display device that can be connected to the microcomputer is determined. In the case of electronic watches and the like (:), it has been difficult to meet these demands because of the diverse demands of users and the large number of display output terminals.

The present invention has been made in view of the above-mentioned points, and includes a plurality of latch circuits corresponding to two display segments H2, a segment data bus to which segment signals to be displayed are sent,
At least part of the immediate data is applied from an instruction register that stores an instruction code to be executed, and the immediate data (a strobe generator that generates a strobe signal using two generators and a strobe path from which the strobe signal is sent) is applied. In addition, the arbitrary bits of the segment data bus and the arbitrary bits of the strobe path are masked at the time of manufacturing (-thus selectively specifying the output terminal for display) by connecting the output terminal for display. The present invention provides a microcomputer with a display output terminal capable of displaying a display output terminal.Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1811 is a block diagram showing an embodiment of the present invention,
Part of a microcomputer is shown.

P1 to P48 are display output terminals connected to the segments of the liquid crystal display device, and each output terminal P1 to P481- is connected to the output of the liquid crystal drive circuit (1). The liquid crystal drive circuit (11 is a dynamic decay type circuit, which has two different timings (X and Y) (2) determines whether or not to turn on the liquid crystal based on the data printed at terminal XC, and (2 marks 1) Data C to be input: Outputs a drive signal to determine whether to turn on or not based on the output terminal P.
Two display segments each driven at timing (X and Y) are connected to F4B and F4B, and are driven.

In addition, the latch circuits (2) are connected to the terminals X and YC of the drive circuit (11). That is, the latch circuits 121 are provided in the same number as the display segments. In other words, one latch circuit (21) is provided. Driving as many display segments as 1
I can do that. In this embodiment, since there are two latte circuits (2) for each output terminal, 48×2 display segments can be driven.

On the other hand, ROjJ13+ is a storage circuit that stores a program in advance, and sequentially sends out instruction codes constituting the program to an instruction register (4JC).

Instruction register +41 is a register consisting of 14 pits and stores a 14 pit instruction code to be executed. In addition, the instruction code which has been changed to 1 is applied to the control circuit (6) by the instruction bus (5), and furthermore (part of the immediate data of the instruction code, in this embodiment, 5 bits from bits 6 to 10). h-strobe generator (71C Niinto).

The same circuit (6) decodes the applied command code,
41i?A punishment for controlling the various circuits of C1 in order to carry out the operation of the command. -ts+ is output. The strobe generator (7) generates a control signal (9)c output from the control circuit (6) when a display rewriting command is executed.
2. Based on the display rewriting command and code (2), the included 5-pin immediate data (: Based on the 14-pin strobe signal for controlling the display data input of the latch circuit (2) The two bits of the strobe signal are the first strobe bus 1101+=,
6 bits are sent out to the second strobe path II 11 C1, and the remaining 6 bits are sent out to the 6th strobe path II 11 C1.

$1 strobe bath (1 sickle and 2nd strobe bath/Il
l corresponds to the display output terminals P1 to P24C; ・Near the child circuit I21 (two extended first strobe buses r(
+1 and 6th strobe bus 12+ are display cutout keys P2
Latch circuits corresponding to 5 to p48 (near 21 (two voltages are applied).

The data decoder 113 is a 7-segment 1d No. 2 code for displaying a predetermined code of the data sent to the 4-pit data bus I, for example, an 8'f-type numeric display pattern. Yes, data decoder, 1
The 18 digits of 3I are sent out to the 7 pinot segment data bus uel2 through gate ':5j7. Also, data C
:Group 4 is a gate, and segment data bus 1e is connected via ■.
It is connected to four predetermined pits. That is, control circuit +6
From the control wholesale signal q from 1 and 2, gate l and tη are rj
J] IJ! The output of the data decoder 13) is sent to the segment data bus U61+=, or the data on the data bus I is sent to the direct segment data bus +1.
61C2 can be sent. The segment data bus is extended near all latch circuits (2:).

First strobe path q0, second strobe bus til
+.

Sixth strobe vanu 112 and segment data bus σ
e and each latch circuit (21 input lines (one bottle is formed in a matrix) to form a PLA (Programmable Logic Array). Then, when manufacturing a microcomputer (: Mask C used: Therefore, a predetermined pit of each strobe bus (l1011t121) and a predetermined pit of the segment data bus t161 are selectively connected to a predetermined fin of the input line σ9. Details will be described later.

2 (8) is an input/output logic characteristic diagram of the strobe generator (7) shown in FIG. is shown in hexadecimal notation, and the vertical □ axis C2 shows the strobe signals of each strobe path filnl+(121).
01 is the strobe signal PSTB10 and PSTB20.
Bit, second strobe bus (Ill is the strobe signal PSTBO~PSTB5, 6 bits, third strobe bus 'l?IIt'!, N) '-F signal PS
It is composed of 6 pits TB6 to PSTB11. Fig. 2 (Two-pronged, strobe generator (711Z mark '1)
The strobe signal output corresponding to the immediate data that is 10 is the strobe signal marked with a circle, and only that signal is at the “1” level (or “0° level”).
becomes. For example, if the re-roofing command code on the display is “100
00110000111J, the data from pit 6 to pit 10 of the immediate data is "0".
0110'', that is, ``6.'', and the output strobe 4 words are PSTEIC! and PSTB5. That is, one execution of the command to change the bases of the display (for two, one of the two bits of the first stroke bus Got, the second stroke vanu 111 and the third stroke bus bus Got)
The predetermined 1 bit out of 13 and a total of 2 bits "□" are "1-
It becomes.

It should be noted that the immediate data expressed from pit O to pit 5 of the instruction code, that is, the lower six pits, indicates, for example, the address of a RAM (not shown in IJ, but a memory circuit in which data is stored), and the immediate data The 4-pit data stored at the RAM address specified by is sent out to the data bus.

Next, display output terminals P1 to P4 shown in 11J+-
8 [Details (=explains) how to reduce the size of the segment indicated by 9J 'J.For example, ・Fig. β
22, segment) 1L and 1b to output terminal P1C
2. Segments 1C and 18 are output terminals P2C 2. Segments 1e and 1g are output terminals p s't=, segment 1
f and α are connected to the output terminal P4C, and the segment)
2a and 2b are output terminals P5 (second segment) 2Q and 2d
When connecting output terminal P/) 1m, segments 2e and 2g to output terminal P71Z, segments 2f and β to output terminal P8, leaf 4 Figure 1: The terminal assignment shown creates a diagram. In FIG. 4, the vertical axis indicates terminal numbers, and the horizontal axis indicates the strobe signal and segment data No. 743 θe g Da, ~8eg
l)+g is described, and two different timings (X
, Y) i4 is provided. Each output terminal number (split into two, output terminal number 7 (:@ out of the two assigned display segments, display segment symbol that moves at the timing of X) in the column of -Enter the symbol of the display segment to be displayed in the Y column (-.In this embodiment, the characters or numbers displayed in the display segments 11L to 1g are the outputs of the data decoder!13) directly from the corresponding latch circuit 121. (-To be stored (: Therefore, it is assumed that it can be displayed, and that storage is performed by executing a single rewriting command. In other words, if the immediate data of the rewriting command is set to "0", I@
(As shown in Figure 2, the strobe signals output at that time are PSTBlo and PSTBO, so in Figure 4, a circle is placed at the cape of the strobe signals P8TB10 and PSTBO.This circle indicates the latch circuit (2). This means the connection with the line for !tlJm among the input lines 9.

In addition, segment data signals segDa to 8egDg (7
) Mark i@ with a circle. This circle mark is a latch]! ! Of the input lines 11 of the circuit 121, this means the connection with the data input line. 'f, ta, output terminals P5 to P8 (
2.1] Assigned display segments 22L to 2g (2
In this case, the immediate data of the rewrite command is “1”.
'', the C segment data is stored (: to be heard), strobe signals PSTB20 and PSTBO columns (double marks are added, and z1 are marked with 1 in the corresponding segment data signals sagpa-eegpg). - 10,000, Output terminal P4C @ assigned bit segments α and βC are written so that the immediate data is written by executing the “7” switching command q). Then, the columns of strobe words PSTB20 and PSTB5 are marked with a nimal mark. Also, the dot segment α is the data to be sent out as the segment data signal 8egDIL4F, and the dot segment β is the data to be sent out as the segment data signal egDbi- The data to be sent out is displayed. That is, the 4-bit data on the data bus !141 is sent directly to the segment data signal saga~ of the segment data bus 1L61 via the data decoder (+31).
If the 4 bits of 8egd are sent out via the gate controller, the data on the dot segments α and β (2) can directly display the data on the data bus (141).

As shown in Figure 4, the layout of the output terminals P1 to P48 created from the display segment pattern C2 of the display device used is as shown in the figure (two terminals, each strobe path ntpttun
A PLA mask is created that determines the connection between the input line 1 of the latte circuit (2) and the segment data bus 1e.

Figure 5 is a detailed diagram showing the connections between the strobe bus (11 and 111) and the segment data bus (161) of the microcomputer formed by the 41st W+2 and the input line (1). Output terminals P1, P2
, P3... are connected to a liquid crystal actual circuit (21) that drives the liquid crystal at two different timings (X%Y), and each liquid crystal IFA operating circuit (terminals t, x and terminal YC of ?υ are connected to The circuit +211 is increased by +5i. The data input line I2z is connected to the latch L (2) of the latte circuit 123J, while the output of the AND gate 4 is connected to the f1 interceptor φ. 4 CA N D gatek! J's manpower C: is IIVII Gojin Kaline-'44) 5 is marked DO.

The data human power line λl and the control input line Q9 are:
1p11 Figure C2 Indicated input line (configure 21 I+!2
The strobe signal PSTB[l~PSTB5
, strobe signal P8'l'B10p8TB20, and segment data signals segDa to segpg form a matrix, that is, PLA. Mo, that exchange J:? , C, the areas marked with black circles are the masks formed by the two groups shown in FIG. 4C (thus, they are connected).

In prisoner @5, when a command to rewrite the display in which the immediate data indicated by 10 is executed from pit 6 to customer pit 10, strobe signals PSTBO and PBT are
BICi becomes "1", and these two strobe signals P
Only the AND gate to which only STBD and PFfTBIC are connected has an output of °1, so the paper terminal ψ
The ratte circuit (211 operates, and the segment data signal s e g applied to the input terminal LC)
The data sent to D11-8egDg is stored. Specifically, the ratte circuits +211 to +2 corresponding to timing When a display rewriting command in which the date data is "1" is executed, only the latte circuit (21) activated by the AND gate 0.3 to which the strobe signals P8TBO and P8TB20 are applied (2, Segment [data 1 rooster number s]
egDa~θeFLDf! , is what I remember. for example,
At the output terminal P51=, the timing x (: the corresponding latch path C211+= is the segment data signal θeg
l) The data sent out is stored, but the contents of the latte circuit 1z1) at the output terminals P1 to P4 remain unchanged. In these cases, the segment data signal ee
gpa-,-segDg+Z The data sent is the first
Figure; 2, data bus! This is the output of the data decoder 1131 which converts the sent data into a code (2) for displaying characters or numbers.

10,000, when the immediate data from pit 6 to pit 10 executes the display rewriting command t7 of "7", the operation state is set to deaf due to the AND gate C31 to which the strobe signals PSTB5 and PSTB2G are applied. The wrap circuit Iz+3, for example the latch ioj path 121) associated with timing Y, stores the applied data at the output terminal P4.

In this embodiment, the second strobe path 'Ill controls the latte circuit T2+ of the output terminals P1 to P24, and the sixth strobe path 1121& is configured to control the launch circuit 121 of the output terminals P25 to F4B. This is because when the wiring is extended, the space occupied by the circuit (2) increases, which is preferable. 2
It is divided into two parts. Also, Figure 4 and fS! 5J+ = In order to memorize the display data of the 8-character segment with one display rewriting command, the configuration is a predetermined segment such as a dot segment or a figure. For bottle holders that do not have a combination of forget or forget, the bit of the instruction code for changing the rose is displayed. By changing the contents of the immediate data shown in 10, the input/output logic characteristics of the strophe generator (7:
Straw No. 145 PITBIC, P output by 2
STB20 and any of PSTBO to PSTB11 (
To connect the input line +191 of the Niratte lpi path (2) (:, allocate it using the method shown in Figure 4) (from the second, specify the display segment with the rewrite command, that is, it (: the corresponding Latte circuit (21) , the output terminal to which the display segment is attached is the output terminal P.
It can be arbitrarily selected from 1 to P48.

As described above, according to the present invention, a plurality of pit strobe signals are created using the display writing instruction code (2) and the included immediate data, and the strobe bus to which this strobe signal is sent and the data to be displayed are A segment data bus is sent out, and an input line of a latch circuit that stores display data (2) forms a matrix-like PLA, and a mask (2) that forms a strobe path and By selectively connecting the data bus and the input line C2, the display segment where the display output terminal is q@1 can be set arbitrarily, and the display can be changed with one fyf'l command. The number of segments can be selected arbitrarily.Therefore, the degree of freedom in display output terminals is very high (two people Q (>,
;The user of the microcomputer visually displays λ2.
It has the advantage of being able to avoid different segment patterns, and provides a sophisticated microcomputer for the user.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing an uninvented embodiment, Figure 2 &
Figure 1 (bifurcated input/output logic custom-made 15χI of Jay Lake, Figure 6 is a connection pattern diagram of the display seg node, Figure 4 is a #il connection diagram of the f section output terminal, Figure 5 is The figure is a logic circuit diagram in which two units of Figure C are connected. (]l+2(II...-l crystal drive circuit, +2+(21
1...Latch circuit, (31...ROM, (4)...
・Instruction register, 15)...Instruction path, [61...41 river rotation [1' each, (
71... Strobe generator, 11191Q field.
...Control f1 base code, 11111...Cormorant 1 strobe bus, WaD...a2 strike 1 cop pass, 02...-3rd
Strobe path, 1:p... data decoder, I.
...Data bus, 1+5)+171...Gate, t
lB...Segment data bus, (19...Input line, η...Data input line, 133)...A
ND game), 124 + 1” control @ input line. Applicant: 1 person outside Sanyo Denki Qn type company, patent attorney: Shizuo Sano

Claims (1)

[Claims] 1. In a microcomputer with a built-in drive circuit for a display device, a display segment (a plurality of corresponding latch paths and a segment path to which segment signals to be displayed are sent) and a strobe generator to which at least a part of the immediate data is applied from an instrument-to-gun register that generates four instructions to be executed and creates a strobe signal based on the immediate data; A strobe signal is sent from the strobe generator C7-
The specified bit of the segment data bus and the arbitrary bit of the strobe path are masked during manufacturing. : A microcomputer having a display output terminal to which an arbitrary display segment can be assigned.