JPS58204559A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS58204559A JPS58204559A JP8668482A JP8668482A JPS58204559A JP S58204559 A JPS58204559 A JP S58204559A JP 8668482 A JP8668482 A JP 8668482A JP 8668482 A JP8668482 A JP 8668482A JP S58204559 A JPS58204559 A JP S58204559A
- Authority
- JP
- Japan
- Prior art keywords
- base
- electrode plate
- plate
- metal stud
- pellet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置に係シ、特に、金属スタッドベース
の構造に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor devices, and more particularly to metal stud-based structures.
一般に半導体装置に用いる金属スタッドペースは熱伝導
に優れている材料を用いているが、線膨張係数が大きく
、半導体ペレットを直接接着すると金属スタッドペース
と半導体ペレットの線膨張係数の差により大きな歪が発
生し、半導体ペレットが破壊される。そこで、IigI
膨張係数が半導体ペレットと同程度で、縦弾性係数が金
属スタッドペースよりも大なる金属をスタッドペースと
半導体ペレットの間に挿入して、応力緩和材として用い
ている。これは一般に電極板と言われるものであるが、
この電極板は、半導体ペレットを十分に保鹸する目的で
板厚を厚くしている。しかし、一般的にこの区極叡祠科
は熱伝導が悪く、半導体装置の熱抵抗等の特性を低下さ
せる欠点を本っている。Generally, the metal stud paste used in semiconductor devices is made of a material with excellent thermal conductivity, but it has a large coefficient of linear expansion, and if semiconductor pellets are bonded directly, large distortions will occur due to the difference in the coefficient of linear expansion between the metal stud paste and the semiconductor pellet. generated and the semiconductor pellet is destroyed. Therefore, IigI
A metal having an expansion coefficient comparable to that of the semiconductor pellet and a longitudinal elastic modulus larger than that of the metal stud paste is inserted between the stud paste and the semiconductor pellet, and is used as a stress relaxation material. This is generally called an electrode plate,
This electrode plate is made thick in order to sufficiently preserve the semiconductor pellet. However, in general, this type of heat conduction is poor and has the drawback of deteriorating the characteristics such as thermal resistance of semiconductor devices.
本発明の目的は、#!膨張係数の大きな金輌スタツトヘ
ースの熱応力の半導体ペレットへの影響カ抑えられ、か
つ良好な熱特性を有する半導体装置を提供することにあ
る。The purpose of this invention is #! It is an object of the present invention to provide a semiconductor device which suppresses the influence of thermal stress of a metal stud hese having a large coefficient of expansion on a semiconductor pellet and has good thermal characteristics.
本発明の%黴は、電極板を環状にして、中央部を凸状に
した金属スタッドベースの凸部の周囲に、ろう材を介し
て接着し、電極板の上面が金属スタッドベース上向より
高くすることにある。金属スタンドペースによる熱応力
は電極板で緩和し、また熱伝導の良好な金娯スタッドベ
ースがろう材を介してth接半導体ペレットに接着され
るので、良好な熱特性を侍る事ができる。The mold of the present invention is made by forming an annular electrode plate and adhering it around the convex part of a metal stud base with a convex center part through a brazing material, so that the upper surface of the electrode plate is from the upper side of the metal stud base. The goal is to make it more expensive. Thermal stress caused by the metal stand space is alleviated by the electrode plate, and since the metal stud base with good thermal conductivity is bonded to the th contact semiconductor pellet via the brazing material, good thermal characteristics can be maintained.
以下、本冗明の一実施例を図を用いて説明する。Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
第1′lAに9と米の半導体装置を示す。金属スタッド
ベースl上に、ろう材を介して電極板2を接着し、さら
にろう材を介して半4捧ペレット3を接層しティ々・。The semiconductor device numbered 9 and 1 is shown in 1'lA. The electrode plate 2 is adhered to the metal stud base l through a brazing material, and the half-metal pellets 3 are further layered through the brazing material.
半4K ペレット3Viグラシベーシヨン、−またはR
i” V方式のものである。電極板2は金属スタッドベ
ース1の熱応力を緩和し、半4俸ヘレソト3を保禮する
h的のため、板厚は十分淳くしでいる。しかし、一般に
用いる電極板2は熱伝導が悪く、素子の熱特性を低下さ
せる一因となっている。また、電極板2と金属ベース1
との紛に張係数の差は大きいので、両者の接層に用いる
ろう材の選択も重要となる。Semi-4K Pellet 3Vi Gracivation, - or R
The electrode plate 2 is of the i''V type.The electrode plate 2 has a sufficient thickness to relieve the thermal stress of the metal stud base 1 and protect the metal stud base 1.However, in general, The electrode plate 2 used has poor thermal conductivity, which contributes to deterioration of the thermal characteristics of the element.
Since there is a large difference in tensile modulus between the two, the selection of the brazing filler metal used for the contact layer between the two is also important.
第2図は本発明による環at電極板1と金概スタッドベ
ース10の組合せ番示すものでおる。電・□”ご□。FIG. 2 shows the combination number of the ring at electrode plate 1 and the metal stud base 10 according to the present invention. Telephone・□”Please□.
極板11の穴部に金属スタッドベース10の凸部が挿入
、ろう付され、ベース凸部上面は、電極板11−ト面よ
り低くなっている。これによりt&板11と半導体ベレ
ット3間の半田厚は薄く、ベース凸部上面と半導体ベレ
ット3間の半田厚は厚くなる。11L惨板11と半導体
ペレット3は線膨張係数かはt’X Fiじであるので
、ろう材は接着の目的でのみ用いれば良く、半田厚は薄
くて4半導体ベレット3に悪影瞥は与えない。しかし、
半導体ペレット3と金属スタッドペース10の?fM膨
張係数は大きく真なり、ろう材は接層の目的に加え、応
力の緩和材としても*蒙となるので半田厚は厚くなけれ
ばならない0gEって本発明ではMiJs己半田厚条件
を満足する。さらに、FJえば半導体ペレット3にグラ
/ベーションペレツl用いた場合、グラ7ペーシヨン部
が電極&11の上部となる/Cめグラシペーション部に
応力の加わらない構造となる。The protrusion of the metal stud base 10 is inserted into the hole of the electrode plate 11 and brazed, and the upper surface of the base protrusion is lower than the top surface of the electrode plate 11. As a result, the solder thickness between the T& plate 11 and the semiconductor pellet 3 is thin, and the solder thickness between the upper surface of the base convex portion and the semiconductor pellet 3 is thick. Since the coefficient of linear expansion of the 11L board 11 and the semiconductor pellet 3 is t'X Fi, the brazing filler metal needs to be used only for the purpose of adhesion, and the solder thickness is thin and does not give any negative effect to the 4 semiconductor pellet 3. do not have. but,
Semiconductor pellet 3 and metal stud paste 10? The fM expansion coefficient is large, and the solder metal serves not only as a contact layer but also as a stress relaxation material, so the solder thickness must be thick. 0gE satisfies the MiJs solder thickness condition in the present invention. . Furthermore, if a grating pellet 1 is used for the semiconductor pellet 3 in FJ, the grating 7 section becomes the upper part of the electrode &11, and the structure is such that no stress is applied to the grating section.
また、本構造では、金属スタッドベース10凸部″1・
力を・金1でJ7)”−’C−、X”0′!″1&&1
1の接着部たけ−p、、なく、電極板11の穴部で抑え
るa造となっているため、電極板11の板厚は、恢米の
電極板2の1/2程度で十分である。さらに、熱応力を
電極板11の自任で抑える本構造では、金属スタッドベ
ース10と電極板11の接着に用いるろう材を第1区の
従来構造で文月しているろう材より、強度の1戊いもの
でも1丈用できる。In addition, in this structure, the metal stud base 10 convex portion ″1・
Power・J7 for gold 1)”-’C-,X”0′! ″1&&1
The thickness of the electrode plate 11 is held in place by the hole in the electrode plate 11, and the thickness of the electrode plate 11 is approximately 1/2 that of the steel electrode plate 2. . Furthermore, in this structure, which suppresses thermal stress by the electrode plate 11, the brazing material used for adhering the metal stud base 10 and the electrode plate 11 is 1/2 stronger than the brazing material used in the conventional structure of the first section. One length can be used even with a short-cut.
第3図は電極板11による、金属スタンドベース10凸
部の応力緩和の度合を示す。縦軸に熱により発生する金
属スタッドベース凸部歪gtoを、横軸に′#L極板外
径φl!と金属スタッドペース凸部径φ+o(=電極板
内径)の比φtt/φxeを示す。FIG. 3 shows the degree of stress relaxation of the convex portion of the metal stand base 10 by the electrode plate 11. The vertical axis represents the strain gto on the metal stud base convexity caused by heat, and the horizontal axis represents the external diameter of the L pole plate φl! The ratio φtt/φxe of the metal stud paste convex diameter φ+o (=electrode plate inner diameter) is shown.
電極板の蝦弾性保畝Elfと金属スタッドベースの縦弾
性係数E1oの比ケ一定としfc場合、電極環の内任φ
10が犬きくなれば、金属スタッドベース歪’10は+
1iW4スタツドペ一ス材料自体の歪に近づき、逆に内
径φ1゜示小さくなれば電極材料自体の歪に近づく。φ
■/φ10≧2で歪はは°は一定になる傾向であるので
、%i電極板内径は外径の1/2程度で十分である。!
、た、両者の縦弾性係数の比E1゜/E11、または、
巌膨張係数の差(α10−α1−)をパラメータとした
場合、その値が小さい場合に金属スタッドベース凸部歪
ε10は大きい方向に、逆に大きい場合Cま金属スタッ
ドベース凸部歪IIOは小さくなる方向に働く。よって
、金属スタッドベース凸部歪110を小さく抑えるには
、電極材料として、金属スタッドペースより縦弾性係数
の小なる材料で、かつ線膨張係数が小さい材料を用いれ
ば良く、これは従来より用いている材料で良い。If the ratio of the elasticity retention ridge Elf of the electrode plate and the longitudinal elastic modulus E1o of the metal stud base is constant fc, then the internal capacity of the electrode ring φ
If 10 becomes sharp, metal stud base distortion '10 is +
The strain approaches the strain of the 1iW4 studded paste material itself, and conversely, if the inner diameter φ1° becomes smaller, the strain approaches the strain of the electrode material itself. φ
(2) Since the strain tends to be constant when /φ10≧2, it is sufficient that the inner diameter of the electrode plate is about 1/2 of the outer diameter. !
, the ratio of their longitudinal elastic modulus E1°/E11, or
When the difference in the expansion coefficient (α10-α1-) is used as a parameter, when the value is small, the metal stud base convex strain ε10 increases, and conversely, when it is large, the metal stud base convex strain IIO decreases. Work in the direction of becoming. Therefore, in order to keep the metal stud base convex strain 110 small, it is sufficient to use a material with a lower modulus of longitudinal elasticity and a smaller linear expansion coefficient than the metal stud paste as the electrode material, which has not been used in the past. Any material is fine.
第4図は半導体ペレット3で発生した熱12が伝わる様
子を示す。半導体ペレット3で発生した熱はろう材を介
して電極板11、金属スタッドベース10凸部に伝わる
。例えばグラシベーションベレットの吻合、発熱部はモ
ートの内側であり、熱伝導の良好な金■スタッドベース
10凸部が接層されているので熱流12の多くは金■ス
タッドベース10凸部に伝わり、熱特性(熱抵抗)が抜
書される。FIG. 4 shows how the heat 12 generated in the semiconductor pellet 3 is transferred. The heat generated by the semiconductor pellet 3 is transmitted to the electrode plate 11 and the convex portion of the metal stud base 10 via the brazing material. For example, the anastomosis and heat generating part of a glacivation pellet is inside the moat, and since the convex part of the gold stud base 10 with good heat conduction is in contact with it, most of the heat flow 12 is transmitted to the convex part of the gold stud base 10. Thermal characteristics (thermal resistance) are omitted.
本祐明によれば、熱応力に対しては従来品と同等の強度
を持ち、熱伝導の良好な半導体装置を得ることができる
。According to Yumei Moto, it is possible to obtain a semiconductor device that has the same strength against thermal stress as conventional products and has good thermal conductivity.
第1図は従来構造の半導体装置を示す断面図、第2図は
本発明による半導体装置を示す(ト)[1田図、第3因
は電極環外径φ1!と金域ベース凸部径φ10の比φ1
./φ1゜にtjする金楓ベース凸部歪j1・を示す図
、第4図は第2図に示す半導体装置における熱の流れ方
を示す図である。
l、10・・・金−スタッドベース、2.11・・・電
極板、3・・・半導体ベレット、12・・・熱流。
甫 1図
211FIG. 1 is a sectional view showing a semiconductor device with a conventional structure, and FIG. 2 is a cross-sectional view showing a semiconductor device according to the present invention. and the ratio of the metal area base convex diameter φ10 φ1
.. FIG. 4 is a diagram showing the strain j1· of the convex portion of the gold maple base having tj at /φ1°, and FIG. 4 is a diagram showing how heat flows in the semiconductor device shown in FIG. l, 10... Gold-stud base, 2.11... Electrode plate, 3... Semiconductor pellet, 12... Heat flow. Fu 1 figure 211
Claims (1)
属スタッドベース、上記凸部の周囲にろう付された環状
’m極板、上記凸部および電極板上にろう付された半4
体ベレットからなシ、電極板と半導体ペレット間のろう
材は凸部と半導体ペレット間のろう材より博く、11L
極板は縦弾性係数が金属スタッドベースのそれより太き
く、−#張係数が半導体ベレットのそれとほぼ等しい材
料からなることを特徴メする半導体装置。1. A metal stud base with a protrusion on the side to which the semiconductor pellet is brazed, an annular electrode plate brazed around the protrusion, and a half-metal stud base brazed on the protrusion and the electrode plate.
The brazing material between the electrode plate and the semiconductor pellet is wider than the brazing material between the protrusion and the semiconductor pellet, and is 11L.
A semiconductor device characterized in that the electrode plate is made of a material having a longitudinal elastic modulus thicker than that of the metal stud base and a tensile modulus approximately equal to that of the semiconductor pellet.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8668482A JPS58204559A (en) | 1982-05-24 | 1982-05-24 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8668482A JPS58204559A (en) | 1982-05-24 | 1982-05-24 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58204559A true JPS58204559A (en) | 1983-11-29 |
JPS6249739B2 JPS6249739B2 (en) | 1987-10-21 |
Family
ID=13893826
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8668482A Granted JPS58204559A (en) | 1982-05-24 | 1982-05-24 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58204559A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5150197A (en) * | 1989-10-05 | 1992-09-22 | Digital Equipment Corporation | Die attach structure and method |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6421343U (en) * | 1987-07-29 | 1989-02-02 |
-
1982
- 1982-05-24 JP JP8668482A patent/JPS58204559A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5150197A (en) * | 1989-10-05 | 1992-09-22 | Digital Equipment Corporation | Die attach structure and method |
Also Published As
Publication number | Publication date |
---|---|
JPS6249739B2 (en) | 1987-10-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5021865A (en) | Lead frame for semiconductor device | |
US2897419A (en) | Semiconductor diode | |
JP2002110893A (en) | Semiconductor device | |
JP2016139635A (en) | Power semiconductor device | |
JP4023032B2 (en) | Mounting structure and mounting method of semiconductor device | |
JPH11265976A (en) | Power-semiconductor module and its manufacture | |
JPS58204559A (en) | Semiconductor device | |
JP2004111745A (en) | Semiconductor device | |
JPH07176664A (en) | Semiconductor device and fabrication thereof | |
JP2016134547A (en) | Semiconductor device | |
JP3522975B2 (en) | Semiconductor device | |
JPS63120431A (en) | Semiconductor device for electric power | |
JPH06685A (en) | Solder material | |
US3120052A (en) | Method of making alloyed junction semiconductor devices | |
US3512050A (en) | High power semiconductor device | |
JPH0741164Y2 (en) | Semiconductor device | |
JPS6332269B2 (en) | ||
JPS6347977A (en) | Gate turn off thyristor | |
JPS59134857A (en) | Semiconductor device | |
JPH04283947A (en) | Semiconductor device | |
JP2619155B2 (en) | Hybrid integrated circuit device | |
JPH05315491A (en) | Semiconductor electrode, manufacture thereof and semiconductor device | |
JPS5846177B2 (en) | semiconductor equipment | |
JP2005159012A (en) | Semiconductor device | |
JPS629721Y2 (en) |