JPS5820438B2 - display device - Google Patents

Description

[Detailed description of the invention] The present invention relates to semi-graphic display devices.

The prior art will be explained with reference to FIGS. 1 to 3.

FIG. 1 is a logical block diagram of a conventional display device, in which 1 is a refresh memory, 2 is a register, 3 is a character generator,
4 is a parallel-to-serial converter, and 5 is a display section.

When displaying a semi-graphic pattern as shown in FIG. 2, M, M+1, N, N of refresh memory 1
The +1 address has four types of patterns shown in Figure 3.
, 7, 8.9 is stored.

That is, information on the pattern on the screen is stored in an address area in the refresh memory 1 that is associated with the screen on a one-to-one basis.

The pattern information read out from refresh memory 1 into register 2 is converted by character generator 3 into a corresponding pattern.

This converted pattern (parallel) is converted into a serial signal by a parallel-to-serial converter 4 and sent to a display section 5 for display.

In a conventional display device having such a configuration, the required number of various patterns as shown in FIG. 3 must be stored in the character generator.

Therefore, the capacity of the character generator increases.

In other words, the capacity of the character generator limits the types of patterns that can be displayed.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a display device that can display a greater variety of semi-graphic patterns comprising more types of patterns than ever before using a character generator with a finite capacity.

Therefore, the display device according to the present invention decomposes the pattern information to be displayed as a semi-graphic pattern in an area of multiple bytes on the screen into simplified different types of patterns and stores them in a continuous set of address areas. a character generator that converts a plurality of bytes of pattern information read from a set of address areas of the refresh memory into corresponding simplified patterns; The present invention is characterized by comprising a pattern synthesis circuit which superimposes each of the generated patterns to synthesize a semi-graphic pattern and supplies the semi-graphic pattern to a display section.

An embodiment of the present invention will be described below with reference to FIGS. 4 to 7.

FIG. 4 is a logical block diagram of a display device according to the present invention, in which parts equivalent to those in FIG. 1 are given the same reference numerals.

In this embodiment, the pattern displayed in a 2-byte area on the screen is decomposed into two simplified patterns (referred to as simplified patterns), so the simplified patterns are divided into two groups and the character generator It is stored in.

The character generator is therefore logically divided into two parts 3A, 3B
It is divided into.

The simplified patterns output from each of the character generators 3A, 3B are combined by an OR circuit 10 serving as a pattern synthesis circuit and sent to the parallel-to-serial converter 4.

As an example, consider a case where a semi-graphic pattern as shown in FIG. 2 is displayed.

The pattern displayed in the 2-byte display area corresponding to addresses N and N-1-1 of the refresh/touch memory 1, that is, the pattern 11 shown in FIG. 5, is the two types of simplified patterns 12 and 12 shown in FIG. It is decomposed into 13 parts.

And one simplification pattern 12 is one character generator 3
A, the other simplification pattern 13 is the other character generator 3
Each is stored in B.

Various simplification patterns thus divided into two groups are stored in advance in each character generator 3A, 3B.

It is clear that the pattern to be displayed in the display areas at addresses M and M+1 can be displayed using only the simplified pattern 12 for one scale shown in FIG.

Therefore, the information of simplified pattern 12 is stored at address N of refresh memory 1, and the information of simplified pattern 1 is stored at address N+1.
Similarly, information on simplified pattern 12 is stored at address M, and information on space pattern is stored at address M+1.

For display, 2-byte simplified pattern information is read from two consecutive address areas of refresh memory 1 and set in register 2.

For example, from address N and address N+1, simplified pattern 12.
Pattern information indicating 13 is read out and set in register 2.

Of the 2-byte simplified pattern information in this register 2, one byte is converted into the corresponding simplified pattern (parallel signal) 12 by one character generator 3A, and the other 1 byte is used to generate the other character. It is converted into a corresponding simplified pattern 13 by the device 3B.

These two converted simplified patterns 12 and 13 are ORed by an OR circuit 10, and as a result, a pattern 11 is synthesized by superimposing the patterns 12 and 13.

The same applies to the simplified pattern information read from addresses M and M+1 of refresh memory 1.

Thus, a semi-graphic pattern as shown in FIG. 2 is displayed.

In this manner, the display device of the present invention displays various patterns by combining simplified patterns.

In general, the number of simplification patterns can be significantly reduced compared to the number of combined patterns.

Conversely, by combining a limited number of simplified patterns, a far greater variety of patterns can be created.

Therefore, it is possible to display a wide variety of semi-graphic patterns consisting of an extremely large variety of patterns using a relatively small capacity character generator.

Moreover, in the display device of the present invention, semi-graphic pattern information to be displayed in an area of multiple bytes on the screen is decomposed into simplified patterns and stored in a set of consecutive address areas of the refresh memory. There is.

For example, in the above embodiment, 2 bytes of pattern information are
It is decomposed into bytes of simplified pattern information and stored one byte at a time in two consecutive addresses in the refresh memory.

Therefore, the capacity of the refresh memory can be exactly the same as the conventional one.

Incidentally, it is also possible to convert 1 byte of pattern information on the screen into 2 bytes of simplified pattern information and store it in the refresh memory, but this would double the capacity of the refresh memory, making it difficult to The profits of the invention will be greatly diminished.

However, as long as such disadvantages are not a problem, it is of course possible to arbitrarily decide whether the pattern information corresponding to bytes on the screen is decomposed into simplified pattern information corresponding to bytes and stored in the refresh memory.

As described above, according to the present invention, it is possible to display a far greater variety of semi-graphic patterns than conventional display devices without increasing the capacity of the character generator and refresh memory, and to display the same number of semi-graphic patterns. When displaying , the capacity of the character generator can be significantly reduced, and many other effects can be achieved.

Brief explanation of the drawings ゛Figure 1 is a logical block diagram of a conventional display device, Figure 2 is a diagram showing an example of a semi-graphic pattern, and Figure 3 is a diagram showing an example of a semi-graphic pattern.
FIG. 4 is a logical block diagram showing an example of the display device according to the present invention;
FIG. 5 is a diagram showing a 2-byte pattern on FIG. 2, and FIG. 6 is a diagram showing a simplified pattern used when displaying the semi-graphic pattern of FIG. 2 on the display device of the present invention shown in FIG. FIG. 3 is a diagram showing a decomposition pattern.

1...Refresh memory, 2...Register, 3 (3A, 3B)...Character generator, 4
...Parallel-serial converter, 5...Display section, 1
0...OR circuit (pattern synthesis circuit).

Claims (1)

[Claims] 1. A refresh memory that decomposes pattern information to be displayed as a semi-graphic pattern in an area of multiple bytes on the screen into simplified different types of patterns and stores them in a set of consecutive address areas; and the refresh memory. A character generator that converts multiple bytes of pattern information read from a set of address areas into corresponding simplified patterns, and superimposes each simplified pattern output from the character generator. A display device comprising a pattern synthesis circuit that synthesizes semi-graphic patterns and supplies the synthesized pattern to a display section.