JPS58199594A - Multilayer circuit board - Google Patents
Multilayer circuit boardInfo
- Publication number
- JPS58199594A JPS58199594A JP8167482A JP8167482A JPS58199594A JP S58199594 A JPS58199594 A JP S58199594A JP 8167482 A JP8167482 A JP 8167482A JP 8167482 A JP8167482 A JP 8167482A JP S58199594 A JPS58199594 A JP S58199594A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- layer
- conductor
- wiring
- multilayer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明はコンピュータ等に使用されるＬＳＩ／ｆツケー
ジの多層配線基板に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multilayer wiring board for an LSI/f package used in computers and the like.
従来、この種の多層配線基板の１つに、絶縁層として無
機絶縁ペーストラ焼成固化したものが用いられている。Conventionally, in one type of multilayer wiring board of this type, an inorganic insulating paste fired and solidified has been used as an insulating layer.
しかし、このような配線基板では。However, with a wiring board like this.
絶縁層が多孔質であるため、使用状態において多湿の雰
囲気にあると、この絶縁層をはさんで上下に配設された
導体層間が短絡することがしばしば起こっていた。また
、他の多層配線基板に、配線材として導体波−ストヲ焼
成固化したものが用いられているが、その配線材が多孔
質であるため。Since the insulating layer is porous, when used in a humid atmosphere, short circuits often occur between the conductor layers disposed above and below the insulating layer. Further, in other multilayer wiring boards, conductor wave stowage fired and solidified is used as the wiring material, but this wiring material is porous.
基板全体を封止しなければなら々いと言う製作上の煩わ
しさがある。とくに銅ペーストなど卑金属導体波−スト
ヲ用いたものでは、封止しないで用いると、使用状態に
おいてその配線材が腐食して。There is a manufacturing hassle in that the entire board must be sealed. In particular, when using base metal conductor waves such as copper paste, if used without sealing, the wiring material will corrode during use.
導電性が大きく低下するという欠陥をもっている。It has the defect that conductivity is greatly reduced.
発明の目的
本発明の目的は、多層配線基板の絶縁層のうち少くとも
最上層に有機高分子絶縁材を用いることによ勺、湿度の
影響を防止することのできる信頼性の高い多層配線基板
を提供することにある。Object of the Invention The object of the present invention is to provide a highly reliable multilayer wiring board that can prevent the effects of humidity by using an organic polymer insulating material in at least the uppermost layer of the insulating layer of the multilayer wiring board. Our goal is to provide the following.
発明の構成
本発明による多層配線基板は、セラミック基板上に、導
体ペーストを焼成して得られた第１の導体配線と無機絶
縁波−ストヲ焼成して得られた第１の絶縁層とを組合わ
せて第１の多層配線層を形成し、該第１の多層配線層上
に、有機高分子よりなる第２の絶縁層と該第２の絶縁層
を覆う金属薄膜よシなる第２の導体配線とによって第２
の多層配線層を形成したことを特徴とする。Structure of the Invention A multilayer wiring board according to the present invention is a ceramic substrate, in which a first conductor wiring obtained by firing a conductor paste and a first insulating layer obtained by firing an inorganic insulating wave paste are assembled. Together, a first multilayer wiring layer is formed, and a second insulating layer made of an organic polymer and a second conductor such as a metal thin film covering the second insulating layer are formed on the first multilayer wiring layer. Wiring and by the second
It is characterized by forming a multilayer wiring layer.
次に１本発明による多層配線基板について図面を参照し
て説明する。Next, a multilayer wiring board according to the present invention will be explained with reference to the drawings.
第１図は本発明による実施例の構成を断面図により示し
たものである。この図において、セラミック基板１０上
には第１の配線層１１が導体波−ストヲ焼成して形成さ
れている。更に、基板１０上には、この第１の配線層１
１を覆うように第１の絶縁層１２が無機絶縁ペーストラ
焼成して形成されている。この第１の絶縁層１１には２
選択的に層間接続導体１３が配設され、これによって。FIG. 1 is a sectional view showing the structure of an embodiment according to the present invention. In this figure, a first wiring layer 11 is formed on a ceramic substrate 10 by firing a conductor waveform. Further, on the substrate 10, this first wiring layer 1
A first insulating layer 12 is formed by firing an inorganic insulating paste so as to cover the first insulating layer 12 . This first insulating layer 11 has two
Optionally, an interlayer connection conductor 13 is provided, thereby.
第１の絶縁層１２上に導体ペース）ｋ焼成して形成され
た第２の配線層１４と上記第１の配線層１１との間を接
続している。第２の配線層１４はポリイミド膜（有機高
分子）による第２の絶縁層１５で覆われ、この第２の絶
縁層１５に選択的に配設された穴を介して、絶縁層１５
上に選択めっき法を用いて形成された第３の配線層１６
と第２の配線層１４とが接続されている。A second wiring layer 14 formed by firing a conductive paste on the first insulating layer 12 and the first wiring layer 11 are connected. The second wiring layer 14 is covered with a second insulating layer 15 made of a polyimide film (organic polymer), and the insulating layer 15 is
A third wiring layer 16 formed thereon using a selective plating method.
and the second wiring layer 14 are connected.
第１の配線層１１．第２の配線層１４及び層間接続導体
１３の材料として用いられる導体波−ストは、米国デー
ボン社より金ベース） ノ＋９７９１ 。First wiring layer 11. The conductor waveform used as the material for the second wiring layer 14 and the interlayer connection conductor 13 is gold-based No+9791 manufactured by Devon, USA.
銅ペーストの＋９９２３等の名称で市販されているもの
が適している。また、第１の絶縁層１２の材料は、同じ
く米国デーボン社より無機絶縁ペーストとして４９９５
０．４４２７５等が市販されている。Copper paste commercially available under the name +9923 is suitable. Further, the material of the first insulating layer 12 is 4995 inorganic insulating paste from Devon Co., Ltd. in the United States.
0.44275 etc. are commercially available.
更に、第２の絶縁層１５としては、ポリイミドの他にエ
ポキシ樹脂なども考えられる。ポリイミドは市販品に米
国デーボン社のｉ９イラリンがあり。Furthermore, as the second insulating layer 15, epoxy resin or the like may be used in addition to polyimide. A commercially available polyimide is i9 Ilarin manufactured by Devon Corporation in the United States.
国内では日立化成のＰＩＱ 、東しのトレニース、フォ
トニース等がある。Domestic products include Hitachi Chemical's PIQ, Toshino Trainice, and Photonice.
発明の効果
以上の説明によシ明らかなように１本発明によれば、上
層に有機高分子絶縁膜を形成することによシ、下層の無
機絶縁による多孔質表面の露出することを防ぎ、これに
よって、耐蝕性や耐湿性が増加し、封止などの不経済な
処置を施すことなしに信頼性を向上することができる点
において得られる効果は大きい。Effects of the Invention As is clear from the above explanation, according to the present invention, by forming an organic polymer insulation film on the upper layer, exposure of the porous surface due to the inorganic insulation on the lower layer is prevented. This has a significant effect in that corrosion resistance and moisture resistance are increased, and reliability can be improved without performing uneconomical measures such as sealing.
第１図は本発明による実施例の構成を示す断面図である
。図において、１０はセラミック基板。
１１ 、 ］、 ４ 、１６は配線層、１２．１５は絶
縁層。
１３は層間接続導体である。
代理人（７１２７）弁理士後藤洋介
０
第１閃FIG. 1 is a sectional view showing the structure of an embodiment according to the present invention. In the figure, 10 is a ceramic substrate. 11, ], 4, and 16 are wiring layers, and 12.15 is an insulating layer. 13 is an interlayer connection conductor. Agent (7127) Patent attorney Yosuke Goto 0 1st flash
Claims (1)
れた第１の導体配線と無機絶縁ペーストを焼成して得ら
れた第１の絶縁層とを組合わせて第１の多層配線層を形
成し、該第１の多層配線層上に、有機高分子よシなる第
２の絶縁層と該第２の絶縁層を覆う金属薄膜よシなる第
２の導体配線とによって第２の多層配線層を形成したこ
とを特徴とする多層配線基板。1. On a ceramic substrate, a first multilayer wiring layer is formed by combining a first conductor wiring obtained by firing a conductor waveform and a first insulating layer obtained by firing an inorganic insulation paste. A second multilayer wiring layer is formed on the first multilayer wiring layer by a second insulating layer made of an organic polymer and a second conductor wiring made of a metal thin film covering the second insulating layer. A multilayer wiring board characterized by forming a wiring layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8167482A JPS58199594A (en) | 1982-05-17 | 1982-05-17 | Multilayer circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8167482A JPS58199594A (en) | 1982-05-17 | 1982-05-17 | Multilayer circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58199594A true JPS58199594A (en) | 1983-11-19 |
Family
ID=13752891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8167482A Pending JPS58199594A (en) | 1982-05-17 | 1982-05-17 | Multilayer circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58199594A (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4832475A (en) * | 1971-08-27 | 1973-04-28 | ||
| JPS4963962A (en) * | 1972-10-27 | 1974-06-20 | ||
| JPS5028655A (en) * | 1973-07-17 | 1975-03-24 | ||
| JPS54135360A (en) * | 1978-04-13 | 1979-10-20 | Oki Electric Ind Co Ltd | Multiilayer ceramic board |
| JPS5518897A (en) * | 1978-07-20 | 1980-02-09 | Kollmorgen Tech Corp | Variable reluctance step motor |
| JPS5598897A (en) * | 1979-01-23 | 1980-07-28 | Nippon Electric Co | Multilayer circuit board |
| JPS5642399A (en) * | 1979-09-13 | 1981-04-20 | Fujitsu Ltd | System for producing multilayer wiring board |
| JPS56107598A (en) * | 1980-11-25 | 1981-08-26 | Hitachi Ltd | Method of manufacturing integrated circuit board |
| JPS5759472B2 (en) * | 1973-07-20 | 1982-12-15 | Daimler Benz Ag |
-
1982
- 1982-05-17 JP JP8167482A patent/JPS58199594A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4832475A (en) * | 1971-08-27 | 1973-04-28 | ||
| JPS4963962A (en) * | 1972-10-27 | 1974-06-20 | ||
| JPS5028655A (en) * | 1973-07-17 | 1975-03-24 | ||
| JPS5759472B2 (en) * | 1973-07-20 | 1982-12-15 | Daimler Benz Ag | |
| JPS54135360A (en) * | 1978-04-13 | 1979-10-20 | Oki Electric Ind Co Ltd | Multiilayer ceramic board |
| JPS5518897A (en) * | 1978-07-20 | 1980-02-09 | Kollmorgen Tech Corp | Variable reluctance step motor |
| JPS5598897A (en) * | 1979-01-23 | 1980-07-28 | Nippon Electric Co | Multilayer circuit board |
| JPS5642399A (en) * | 1979-09-13 | 1981-04-20 | Fujitsu Ltd | System for producing multilayer wiring board |
| JPS56107598A (en) * | 1980-11-25 | 1981-08-26 | Hitachi Ltd | Method of manufacturing integrated circuit board |
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