JPS58199544A - Mounting method for ic - Google Patents
Mounting method for icInfo
- Publication number
- JPS58199544A JPS58199544A JP8123582A JP8123582A JPS58199544A JP S58199544 A JPS58199544 A JP S58199544A JP 8123582 A JP8123582 A JP 8123582A JP 8123582 A JP8123582 A JP 8123582A JP S58199544 A JPS58199544 A JP S58199544A
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- flexible
- flexible substrate
- ics
- display panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は複数個の工０を１枚のフレキシブル基板を用い
て実装する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for mounting a plurality of devices using a single flexible substrate.
従来複数個のｘＯをフレキシブル基板を用いて実装する
場合、１枚のフレキシブル基板に１個のｘＯを実装した
後、このフレキシブル基板全回路基板や表示パネル電極
端子等に実装していた。しかしながら、従来の方法では
工０の個数と同じ枚数のフレキシブル基板を必要とし、
またＩＯをフレキシブル基板に実装する時とこのフレキ
シブル基板を回路基板や表示パネル電極端子に実装する
時に必要な位置決め、接着等はＩＯの個数分縁ク１−
返さなければならず、また上記実装後の検査も工０の個
数分繰り返さねばならなかったため、実装の品質のばら
つきがあり、さらに実装時間および検査時間の大幅な短
縮を実現することはでき力かった。Conventionally, when a plurality of xOs were mounted using a flexible substrate, one xO was mounted on one flexible substrate, and then the flexible substrate was mounted on all circuit boards, display panel electrode terminals, etc. However, the conventional method requires the same number of flexible circuit boards as the number of workpieces.
In addition, when mounting IOs on a flexible board and when mounting this flexible board on a circuit board or display panel electrode terminal, the positioning, gluing, etc. necessary for mounting IOs must be done by the number of IOs, and after the above mounting, Since the inspection had to be repeated for the number of pieces in the process, there was variation in the quality of the mounting, and furthermore, it was impossible to achieve a significant reduction in the mounting time and inspection time.
本発明はかかる欠点を除去するためなされたものでア夛
、フレキシブル基板の枚数および実装の品質のばらつき
を減らし、また検査時間および実装時間を短縮する方法
を提供するととを目的とする。The present invention has been made to eliminate such drawbacks, and an object of the present invention is to provide a method for reducing variations in the number of flexible substrates and mounting quality, and shortening inspection time and mounting time.
以下図面に基き本発明の詳細な説明する。The present invention will be described in detail below based on the drawings.
第１図は従来の複数個のフレキシブル基板を用いて複数
個のＩＯを実装した時の正面図である。FIG. 1 is a front view when a plurality of IOs are mounted using a plurality of conventional flexible substrates.
第１図１．２．３はＩＯであり、４，５．６のフレキシ
ブル基板にそれぞれ１個づつ実装されており、それぞれ
のフレキシブル基板は７および８゜９．１０の電極に接
着されている。第２図は本発明の一実施例を示してお”
）、ＩＣ１ａ２ｅ３を１枚のフレキシブル基板４に実装
し、７および８，９、１０の電極に接着する時の正面図
である。Figure 1 1.2.3 shows the IO, one each mounted on flexible boards 4, 5, and 6, and each flexible board is glued to electrodes 7 and 8° and 9.10. . Figure 2 shows an embodiment of the present invention.
), is a front view when IC1a2e3 is mounted on one flexible substrate 4 and bonded to electrodes 7, 8, 9, and 10.
９−
本発明は上記のように複数枚のフレキシブル基板を１枚
のフレキシ、プル基板としたため、（１） Ｉｄｅ個
のＩＯを１枚のフレキシブル基１Ｆｃ−゛−条件（温度
、圧力等）で−廉に実装することが 。9- Since the present invention uses a plurality of flexible substrates as one flexible or pull substrate as described above, (1) Ide IOs can be connected to one flexible group 1Fc-゛- under conditions (temperature, pressure, etc.) - Cheap to implement.
できるため実装の品質が安定し、実装時間を短縮するこ
とができる。 ″
（２）（１）の実装後の検査は、複数個のＩＯからの出
力を同時に得ることができるため検査時間を短縮するこ
とができる。As a result, the quality of mounting can be stabilized and the mounting time can be shortened. ″ (2) In the post-implementation inspection of (1), outputs from a plurality of IOs can be obtained simultaneously, so the inspection time can be shortened.
（３） フレキシブル基板を回路基板や表示パネル電極
端子等（実装する際に必要な位置合わせ回数が減シ、同
一条件（温度、圧力等）で一度に実装することができる
ため実装時間を短縮することができ、実装の品質を安定
させることができる。(3) Flexible boards can be mounted on circuit boards, display panel electrode terminals, etc. (reduced number of alignments required when mounting, and can be mounted all at once under the same conditions (temperature, pressure, etc.), reducing mounting time. It is possible to stabilize the quality of implementation.
等の顕著な諸効果がある。There are various remarkable effects such as.
【図面の簡単な説明】
第１図は従来の複数枚のフレキシブル基板を用いて複数
個のｘＯを実装した時の一実施例を示す正面図であり、
第２図は本発明の複数個の工０を５１枚のフレキシブル
基板を用いて実装した時の一′ □’１ 、２ 、３
、 、工０． ４ 、５ 、６ 、 、フレキシブル
基板、７，８，９，１０．、、電極以上[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a front view showing an example in which a plurality of xOs are mounted using a plurality of conventional flexible substrates.
Figure 2 shows the results when a plurality of devices according to the present invention are mounted using 51 flexible substrates.
, , engineering 0. 4, 5, 6, , flexible substrate, 7, 8, 9, 10. ,,more than electrode
Claims (1)
前記フレキシブル基板を実装することを 。 特徴とする工０実装方法。[Claims] After mounting multiple IOs on one flexible board,
Mounting the flexible substrate. Features a labor-free mounting method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8123582A JPS58199544A (en) | 1982-05-14 | 1982-05-14 | Mounting method for ic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8123582A JPS58199544A (en) | 1982-05-14 | 1982-05-14 | Mounting method for ic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58199544A true JPS58199544A (en) | 1983-11-19 |
Family
ID=13740775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8123582A Pending JPS58199544A (en) | 1982-05-14 | 1982-05-14 | Mounting method for ic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58199544A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0375908A2 (en) * | 1988-12-29 | 1990-07-04 | International Business Machines Corporation | Method and structure for implementing dynamic chip burn-in |
| US5164888A (en) * | 1988-12-29 | 1992-11-17 | International Business Machines | Method and structure for implementing dynamic chip burn-in |
-
1982
- 1982-05-14 JP JP8123582A patent/JPS58199544A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0375908A2 (en) * | 1988-12-29 | 1990-07-04 | International Business Machines Corporation | Method and structure for implementing dynamic chip burn-in |
| US5164888A (en) * | 1988-12-29 | 1992-11-17 | International Business Machines | Method and structure for implementing dynamic chip burn-in |
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