JPS58193642U - lead frame - Google Patents

lead frame

Info

Publication number
JPS58193642U
JPS58193642U JP9198482U JP9198482U JPS58193642U JP S58193642 U JPS58193642 U JP S58193642U JP 9198482 U JP9198482 U JP 9198482U JP 9198482 U JP9198482 U JP 9198482U JP S58193642 U JPS58193642 U JP S58193642U
Authority
JP
Japan
Prior art keywords
outer frame
mounting section
lead frame
insulating part
approximately
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9198482U
Other languages
Japanese (ja)
Other versions
JPS6236299Y2 (en
Inventor
北村　裕二
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP9198482U priority Critical patent/JPS58193642U/en
Publication of JPS58193642U publication Critical patent/JPS58193642U/en
Application granted granted Critical
Publication of JPS6236299Y2 publication Critical patent/JPS6236299Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来のリードフレームの上面図、第２図は、
本考案リードフレームの上面図、第５図乃至第５図は本
考案リードフレームを用いて樹脂封止半導体装置を製造
するときの製造工程を示す要部断面図である。 １・・・ペレット載置部、２・・・外枠、３・・・外部
リード端子、４・・・絶縁部、５・・・導電路。Fig. 1 is a top view of a conventional lead frame, and Fig. 2 is a top view of a conventional lead frame.
The top view of the lead frame of the present invention and FIGS. 5A and 5B are cross-sectional views of main parts showing the manufacturing process when manufacturing a resin-sealed semiconductor device using the lead frame of the present invention. DESCRIPTION OF SYMBOLS 1... Pellet mounting part, 2... Outer frame, 3... External lead terminal, 4... Insulating part, 5... Conductive path.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 外枠と、この外枠略中央部に設けられ、半導体基板が表
裏両面に載置される載置部と、外枠からこの載置部周辺
まで延在された外部リード端子と、前記載置部周囲に外
部端子と略同じ厚みの非導電性物質で形成された絶縁部
と、この絶縁部に貫通した状態で埋め込み形成された導
電路と、から成るリードフレーム。An outer frame, a mounting section provided approximately at the center of the outer frame and on which semiconductor substrates are placed on both front and back surfaces, external lead terminals extending from the outer frame to the periphery of the mounting section, and the mounting section described above. A lead frame consisting of an insulating part made of a non-conductive material with approximately the same thickness as an external terminal around the part, and a conductive path embedded and penetrating through the insulating part.
JP9198482U 1982-06-18 1982-06-18 lead frame Granted JPS58193642U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9198482U JPS58193642U (en) 1982-06-18 1982-06-18 lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9198482U JPS58193642U (en) 1982-06-18 1982-06-18 lead frame

Publications (2)

Publication Number Publication Date
JPS58193642U true JPS58193642U (en) 1983-12-23
JPS6236299Y2 JPS6236299Y2 (en) 1987-09-16

Family

ID=30100202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9198482U Granted JPS58193642U (en) 1982-06-18 1982-06-18 lead frame

Country Status (1)

Country Link
JP (1) JPS58193642U (en)

Also Published As

Publication number Publication date
JPS6236299Y2 (en) 1987-09-16

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