JPS58192389A - Continuously assembled light emitting diode - Google Patents
Continuously assembled light emitting diodeInfo
- Publication number
- JPS58192389A JPS58192389A JP57076333A JP7633382A JPS58192389A JP S58192389 A JPS58192389 A JP S58192389A JP 57076333 A JP57076333 A JP 57076333A JP 7633382 A JP7633382 A JP 7633382A JP S58192389 A JPS58192389 A JP S58192389A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting diode
- electrode
- chip
- screening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Abstract
Description
【発明の詳細な説明】 この発明は連続組立発光ダイオードに関する。[Detailed description of the invention] This invention relates to serially assembled light emitting diodes.
発光ダイオードは、従来、２本の端子を有する単体の素
子として組立てられるのか一般であった。Conventionally, light emitting diodes have generally been assembled as a single element having two terminals.
このため、組立作業の自動化、スクリーニングなどが難
しかった。This made it difficult to automate assembly work and screen screening.
第１ＱＣは、従来例に係る発光ダイオードの縦断面図で
ある。The first QC is a vertical cross-sectional view of a light emitting diode according to a conventional example.
この図は樹脂モールド型発光ダイオード４０を示す。こ
の発光ダイオードは、２本の端子４１．４２を用い、一
方の端子の上に発光ダイオードチップ４３をダイボンデ
ィングし、さらに他の端子とチップ４３の電極とをワイ
ヤボンディング４４シて接続している。そして、透明の
樹脂によってモールドしたものである。モールド４５は
端子４１．４２を固定し、また光を集光する作用がある
。This figure shows a resin molded light emitting diode 40. This light emitting diode uses two terminals 41 and 42, a light emitting diode chip 43 is die-bonded onto one terminal, and the other terminal and the electrode of the chip 43 are connected by wire bonding 44. . It is then molded with transparent resin. The mold 45 has the function of fixing the terminals 41 and 42 and condensing light.
このような発光ダイオードは、組立を自動化する事が難
しい。多数の素子材料を連続的に、或は同時に組立てて
ゆくのに適していないからである。It is difficult to automate assembly of such light emitting diodes. This is because it is not suitable for assembling a large number of element materials continuously or simultaneously.
第１１ＴＩ！Ｊは、従来例に係る他の発光ダイオードの
縦断分解図である。11th TI! J is a vertical exploded view of another light emitting diode according to a conventional example.
これは金属ケース人発光ダイオード４６を示す。This shows a metal cased light emitting diode 46.
縦方向の端子４７を取付けたヘッダ４８の上に、発光ダ
イオードチップ４９をボンディングし、残りの端子とチ
ップ４９とをワイヤボンディング５０シ、さらにガラス
窓付金属キャップ５１をヘッダ４８に融着しである。A light emitting diode chip 49 is bonded onto the header 48 to which the vertical terminal 47 is attached, the remaining terminals and the chip 49 are wire bonded 50, and a metal cap 51 with a glass window is fused to the header 48. be.
このような発光ダイオードも組立の自動化に適しておら
ず、スクリーニングも煩労になる。Such light emitting diodes are also not suitable for automated assembly, and screening is also troublesome.
スクリーニングというのは、製品を通電状態のまま数日
〜数週間試験し、不良品があれば、これを除く工程をい
う。一般に、製品は、その寿命の続く間、故障する確率
は常に一定であるわけてはない。製造されて数日〜数週
間の内に故障するものが多く、これを初期不良と呼ぶ。Screening is a process in which products are tested for several days to several weeks with electricity being applied, and any defective products are removed. Generally, a product does not always have a constant probability of failure over its lifetime. Many products break down within a few days to weeks after being manufactured, and this is called initial failure.
この時間を経ると、故障率は減少し、安定した状態とな
る。そして、老化して寿命が尽きる頃、再び故障率が高
くなる。After this time, the failure rate decreases and becomes stable. Then, as they age and reach the end of their lifespan, the failure rate increases again.
このような確率的法則があるので、予め工場内で、通電
状態に数日〜数週間試験し、初期不良の現われたものを
チェックし、これを廃棄する。これがスクリーニングで
ある。Because of such probabilistic laws, products are tested in advance in a factory for several days to several weeks in an energized state, and any products showing initial defects are checked and discarded. This is screening.
第１０図、第１１図のような発光ダイオードは、各素子
が分離しており、スクリーニングのため、各素子ごとに
通電しなければならず、専用の治具や試験器具を多数必
要とし、手数もかかり、煩労である。またスクリーニン
グのために比較的広い空間を必要とする。In light-emitting diodes like those shown in Figures 10 and 11, each element is separated, and for screening, each element must be energized, requiring a large number of dedicated jigs and testing instruments, and is time-consuming. It is expensive and troublesome. It also requires a relatively large space for screening.
本発明は、これらの欠点を克服し、組立作業の自動化、
スクリーニングに最適な連続組立発光ダイオードを与え
る事を目的とする。The present invention overcomes these drawbacks and automates assembly operations,
The purpose is to provide continuously assembled light emitting diodes that are optimal for screening.
以下、実施例を示す図面によって、本発明の構成、作用
及び効果を説明する。Hereinafter, the configuration, operation, and effects of the present invention will be explained with reference to drawings showing examples.
第１図は、セラミック厚膜基板の上に、発光ダイオード
集合を製作するための、導体パターンを印刷したものの
平面図である。FIG. 1 is a plan view of a ceramic thick film substrate printed with a conductor pattern for manufacturing a light emitting diode assembly.
本発明は、金属製のハーメチックヘッダ・キャップ構造
や樹脂モールド構造をとらず、セラミック厚膜印刷基板
１の上に、電極パターン２を厚膜印刷する。In the present invention, the electrode pattern 2 is printed in a thick film on the ceramic thick film printed substrate 1 without using a metal hermetic header/cap structure or a resin mold structure.
電極パターン２は、同じ形状が、左右前後に繰返した周
期的パターンである、左右前後の１周期が、ひとつの単
位発光ダイオード３に対応する。The electrode pattern 2 is a periodic pattern in which the same shape is repeated back and forth in the left and right directions, and one period in the left and right directions corresponds to one unit light emitting diode 3.
この例では、５行６列の行列状に、３０個の単位発光ダ
イオード３のパターンが図示されている。In this example, a pattern of 30 unit light emitting diodes 3 is illustrated in a matrix of 5 rows and 6 columns.
−□９３１．わ。ｆｆ１Ｊ Ｏ行、１１状、。、光ヶ、
イオー、 −を製造することができ、これら一群の
発光ダイオードは一挙にあるいは連続的に製造される。-□931. circle. ff1J O line, 11th condition. , Hikariga,
A group of light emitting diodes can be produced either all at once or sequentially.
電極パターンの印刷は、通常の厚膜印刷技術により簡単
に行うことができる。たとえば銀パラジウムよりなる導
体ペーストを用い、所望のパターンに対応する部分を切
抜いた薄い金属製スクリーンを基板に当て、上から導体
ペーストをローラで塗布する。これを乾燥、焼成して、
電極パターンができる。Printing of the electrode pattern can be easily performed using normal thick film printing techniques. For example, using a conductive paste made of silver-palladium, a thin metal screen with a cut out portion corresponding to a desired pattern is applied to the substrate, and the conductive paste is applied from above with a roller. This is dried and fired,
An electrode pattern is created.
アノード電極４、カソード電極５が、単位発光ダイオー
ド３の端部に並んでいる。中央には、チップをボンディ
ングするためのチップ座６がある。An anode electrode 4 and a cathode electrode 5 are lined up at the end of the unit light emitting diode 3. At the center is a chip seat 6 for bonding chips.
カソード電極５、チップ座６と、隣接単位発光ダイオー
ドのアノード電極４が連絡パターン部７によって結合さ
れている。The cathode electrode 5, the chip seat 6, and the anode electrode 4 of adjacent unit light emitting diodes are connected by a connecting pattern part 7.
単位発光ダイオード３，３を分ける境界線８は破線で示
しである。A boundary line 8 separating the unit light emitting diodes 3, 3 is shown by a broken line.
境界線８に対応して、厚膜印刷基板１の裏面には、分割
用溝９を刻んである。A dividing groove 9 is cut on the back surface of the thick film printed substrate 1 in correspondence with the boundary line 8 .
同一単位発光ダイオード内のカソード電極５とアノード
電極４が分離しているのは当然であるが、隣接素子間の
カソード電極５とアノード電極４が連続している、とい
うのは重要である。Although it is natural that the cathode electrode 5 and anode electrode 4 within the same unit light emitting diode are separated, it is important that the cathode electrode 5 and anode electrode 4 between adjacent elements are continuous.
このようなｍｘｎ個のパターンの、チップ座６へ、発光
ダイードチップ１０を連続的にボンディンクシテユく。The light emitting diode chips 10 are continuously bonded to the chip seats 6 in such m×n patterns.
左右前後へのピッチは定まっているので、ボンディング
工程は自動化する事ができる。Since the pitch from left to right and front to back is fixed, the bonding process can be automated.
さらに、アノード電極４につながる連絡７Ｘ６ター７７
と、発光ダイオードチップ１０のＰ型置極部とをワイヤ
ボンディング１１する。ワイヤボンディングも自動化工
程のひとつである。Furthermore, the connection 7×6 terminal 77 connected to the anode electrode 4
and the P-type pole part of the light emitting diode chip 10 are wire-bonded 11. Wire bonding is also an automated process.
このようにしたものの１行分だけを示すのが第２図であ
る。FIG. 2 shows only one line of this arrangement.
この例では、厚膜印刷基板１の両側に、アノード側附加
領域１２、及びカソード側附加領域１３が設けられ、こ
こにスクリーニング用電極１４ 、１５か余分に印刷さ
れている。In this example, an anode side additional area 12 and a cathode side additional area 13 are provided on both sides of the thick film printed substrate 1, and screening electrodes 14 and 15 are additionally printed thereon.
スクリーニング用電極１４ 、１５は隣接発光ダイオー
ドのアノード、カソードに連続している。The screening electrodes 14 and 15 are continuous with the anode and cathode of adjacent light emitting diodes.
第２図のように、チップ座６に発光ダイオードチップ１
０をボンディングし、チップ１０のＰ型置極部とアノー
ド部とをワイヤボンディングすると、各行（この例では
６個）の発光ダイオードは、直列接続されることになる
。発光ダイオード群の直列体の両端か、スクリーニング
用電極１４ 、１５である。As shown in Figure 2, a light emitting diode chip 1 is placed on the chip seat 6.
By bonding 0 and wire bonding the P-type electrode portion and anode portion of the chip 10, the light emitting diodes in each row (six in this example) are connected in series. These are the screening electrodes 14 and 15 at both ends of the series array of light emitting diodes.
第３図は単位発光ダイオード３の拡大平面図である。FIG. 3 is an enlarged plan view of the unit light emitting diode 3.
アノード電極４につながる連絡パターン部７の一部は、
絶縁ガラスパターン１６によって覆われている。ガラス
パターンの厚膜印刷は、最初に行っておく。A part of the connection pattern portion 7 connected to the anode electrode 4 is
It is covered with an insulating glass pattern 16. Thick film printing of the glass pattern is performed first.
第４図は金属キャップを取付けた単位発光ダイオードの
拡大平面図、第５図は第４図中のＶ−■断面図である。FIG. 4 is an enlarged plan view of a unit light emitting diode with a metal cap attached, and FIG. 5 is a sectional view taken along the line V--■ in FIG. 4.
金属キャップ１７は皿型断面で、中央にガラス窓１８を
備える。発光ダイオードチップ１０から生ずる光は、ガ
ラス窓１８から外部へ放射される。The metal cap 17 has a dish-shaped cross section and is provided with a glass window 18 in the center. Light generated from the light emitting diode chip 10 is radiated to the outside through the glass window 18.
このため、ガラス窓１８は、チップ１０の直上にくるよ
う、金属キャップ１７は、厚膜印刷基板１ヘノ１ンダ付
け、又は導電性接着剤で固着される。この例では、カソ
ード電極５と、金属キャップ１７は電気的に接続されて
いる。For this purpose, the metal cap 17 is fixed to the thick film printed circuit board 1 by soldering or with a conductive adhesive so that the glass window 18 is directly above the chip 10. In this example, the cathode electrode 5 and the metal cap 17 are electrically connected.
金属キャップの取付けは、第１図のような行列状態のま
まで行う。これも自動化工程で行うとよい。Attachment of the metal caps is carried out in the same state as shown in FIG. 1. This may also be done as an automated process.
このようにしてｍ Ｘ ｎ個の発光ダイオードが一挙に
製造できる。In this way, m x n light emitting diodes can be manufactured at once.
このままの状態で、或は第２図に示すように、行ごとに
割って、スクリーニングする。発光ダイオードは直列に
つながっているから、両端のスクリーニング用電極１４
、１５間に適当な電源を接続すると、全発光ダイオー
ドに、一定電流を通電する事ができる。Screening is performed in this state or by dividing it line by line as shown in FIG. Since the light emitting diodes are connected in series, the screening electrodes 14 at both ends
, 15, a constant current can be applied to all the light emitting diodes.
通電状態で数日〜数週間保ち、電流、電圧、輝度特性な
どを試験する。初期不良の現われたものは除く。この後
境界線８に沿って、単位発光ダイオードに分割する。Keep the power on for several days to several weeks and test the current, voltage, brightness characteristics, etc. Excludes items that show initial defects. Thereafter, it is divided into unit light emitting diodes along the boundary line 8.
厚膜印刷基板１の裏に分割用溝９を設けておくと、簡単
にこれらを分割する事ができる。 −分割し
た単位発光ダイオードは第４図〜第６図に示すように、
薄い矩形状である。電極４，５がそのままになっている
が、この素子状態のまま、ハイブリッドＩＣなどの機能
素子として厚膜印刷回路基板へ取付けることができる。By providing a dividing groove 9 on the back side of the thick film printed circuit board 1, these can be easily divided. - The divided unit light emitting diodes are as shown in Figs. 4 to 6,
It has a thin rectangular shape. Although the electrodes 4 and 5 remain as they are, they can be attached to a thick film printed circuit board as a functional element of a hybrid IC or the like.
つまりチップ部品として使用されつる。In other words, it is used as a chip component.
裏面は、例えば第７図に示すように、裏アノード電極１
９、裏カソード電極２０を、表のアノード電極４、カソ
ード電極５に対応するよう設けても良い。さらに、裏面
の大部分を覆うようにシールド用導体パターン２１を、
裏カソード電極２０に連続して印刷すると良い。For example, as shown in FIG. 7, the back surface has a back anode electrode 1.
9. A back cathode electrode 20 may be provided to correspond to the front anode electrode 4 and cathode electrode 5. Furthermore, a shielding conductor pattern 21 is placed so as to cover most of the back surface.
It is preferable to print continuously on the back cathode electrode 20.
このようにすると、金属キャップ１７、シールド用導体
パターン２１により、発光ダイオードの周囲が金属で覆
われる事になり、他の素子や機能部品へ電磁誘電などの
影響を及ぼす事が少い。In this way, the area around the light emitting diode is covered with metal by the metal cap 17 and the shielding conductor pattern 21, and electromagnetic dielectric effects on other elements and functional parts are less likely to occur.
表面の電極はスルーホール２２によってつながっている
。The electrodes on the surface are connected by through holes 22.
単にチップ部品としてではなく、プリント基板などに実
装したい場合は、第８図、第９図に示すように、電極４
，５から、リード２３を延長させてもよい。If you want to mount it on a printed circuit board etc. instead of simply as a chip component, as shown in Figs. 8 and 9, the electrode 4
, 5, the leads 23 may be extended.
この実施例では、裏面にシールド用導体パターン２１を
印刷しているが、これは省くこともできる。In this embodiment, a shielding conductor pattern 21 is printed on the back surface, but this can be omitted.
さらに、窓つきの金属キャップ１７を使っているが、こ
れはシールド効果を必要としない場合、プラスチックキ
ャップとする事もできる。Further, although a metal cap 17 with a window is used, a plastic cap can also be used if a shielding effect is not required.
また透明のプラスチックでモールドしても良い。Alternatively, it may be molded with transparent plastic.
効果を述べる。Describe the effects.
（１）厚膜印刷基板上に、多数の単位発光ダイオードを
組立てる事としたので、自動組立をする事ができ、極め
て能率的である。(1) Since a large number of unit light emitting diodes are assembled on a thick film printed substrate, automatic assembly is possible and extremely efficient.
（２）隣接する単位発光ダイオードのカソード、アノー
ド電極が連続するような電極パターン２を印刷し、発光
ダイオードが組立てられた時、これら発光ダイオードが
直列に接続されるから、このままの状態で、複数個の発
光ダイオードに通電できる。スクリーニング工程を簡便
にすることができる。(2) Print an electrode pattern 2 in which the cathode and anode electrodes of adjacent unit light emitting diodes are continuous, and when the light emitting diodes are assembled, these light emitting diodes are connected in series. It is possible to energize several light emitting diodes. The screening process can be simplified.
この発明の発光ダイオードの用途は、
ｆａ） 光データリンク、光ワイヤレスリモコン（テ
レビ等の）などの光送信部
（ｂｌ パネル表示などの表示部
（Ｃ＋ 光利用の近接スイッチ
などである。Applications of the light emitting diode of the present invention are as follows: FA) Optical data links, optical transmission units such as optical wireless remote controllers (for televisions, etc.); BL Display units such as panel displays (C+) Proximity switches using light, etc.
第１図はセラミック厚膜印刷基板の上に、発光ダイオー
ド集合を製作するための導体パターンを印刷したものの
平面図。
第２図は導体パターンの上に発光ダイオードチップをボ
ンドしワイヤボンディングした発光ダイオード集合の１
行分のみの斜視図。
第３図は単位発光ダイオードの拡大平面図。
第４図は第３図の状態へ金属キャップを取付けた単位発
光ダイオードの拡大平面図。
第５図は第４図中のｖ−■断面図。
第６図は単位発光ダイオードの正面図。
第７図は単位発光ダイオードの底面図。
第８図はリードを取付けた単位発光ダイオードの平面図
。
第９図はリードを取付けた単位発光ダイオードの縦断面
図。
オードの縦断面図。
第１１図は従来例に係る金属ケース人発光ダイオードの
分解正面図。
１・・・・・・厚膜印刷基板
２・・・・・・電極パターン
３・・・・・・単位発光ダイオード
４・・・・・・アノード電極
５・・・・・・カソード電極
６・・・・・・チップ座
７・・・・・・連絡パターン部
８・・・・・・境界線
９・・・・・・分割用溝
１０・・・・・・発光ダイオードチップ１１・・・・・
・ワイヤボンディング
１２ 、１３・・・・・・附加領域
１４ 、１５・・・・・・スクリーニング用電極１６・
・・・・・絶縁ガラスパターン −
１７・・・・・・金属キャップ
１８・・・・・・ガラス窓
２１・・・・・・シールド用導体パターン２３・・・・
・・リード
発 明 者 坂 本 福 馬
戸 １） 敏 宏
西沢秀明
特許出願人 住友電気工業株式会社
３
−４５（
手続補正書（自発）（１）
特許庁長官 島 １）春 樹 殿 （
２）２発明の名称 連続組立発光ダイオード３、補正を
する者 （３
）事件との関係 特許出願人
居 所大阪市東区北浜５丁目１５番地
名 称 （２１３）住友電気工業株式会社代表者社長
亀 井 正 夫 （４゜４、代
理 人
５３７
住 所 大阪市東成区中道３丁目１５番１６号４５２−
明細書第５頁第１６行目
「厚膜印刷基板」とあるのを「厚膜印刷ＪＪ（板」と訂
正する。
同書第７頁第１８行目〜１９行目
「厚膜印刷基板１ヘハンダ付け、」とあるのを「厚膜印
刷基板１へ一般接着剤、」と訂正する。
同書筒７亘゛第１９行目〜２０行目
「この例では、カソード電極５と、」とあるのを「この
例で導電性接着剤で固着した場合、カソード電極５と、
Ｊと訂正する。
同書第８頁第１２行目と第１３行目の間に［また行列状
のパターンを全て直列につなぐスクリーニング用パター
ンを加えておく事によって行列状の全発光ダイ万一ドに
、。
−挙に通電する事ができる。」を挿入する。
「特許請求の範囲」については別ｆ（のとおシ１゜特許
請求の範囲
カソード電極、アノード電極及びチップ座よ）なる単位
発光ダイオードパターンが行列状に或は−列状に繰返す
電極パターンを印刷したセラミック厚膜印刷基板と、チ
ップ座の上に固着被覆されカソード電ＦＭ、！ニアノー
ド電極に接続された発光ダイオードチップとよシ成シ、
隣接する単位発光ダイオードのカソード電極とアノード
電極とが連続している事を特徴とする連続組立発光ダイ
オード。
４５３−FIG. 1 is a plan view of a ceramic thick film printed substrate on which a conductive pattern for manufacturing a light emitting diode assembly is printed. Figure 2 shows a set of light emitting diodes in which light emitting diode chips are bonded onto a conductor pattern and wire bonded.
A perspective view of only the rows. FIG. 3 is an enlarged plan view of a unit light emitting diode. FIG. 4 is an enlarged plan view of a unit light emitting diode with a metal cap attached to the state shown in FIG. 3. FIG. 5 is a sectional view taken along the line v--■ in FIG. 4. FIG. 6 is a front view of a unit light emitting diode. FIG. 7 is a bottom view of a unit light emitting diode. FIG. 8 is a plan view of a unit light emitting diode with leads attached. FIG. 9 is a longitudinal sectional view of a unit light emitting diode with leads attached. A vertical cross-sectional view of the ord. FIG. 11 is an exploded front view of a conventional metal case human light emitting diode. 1... Thick film printed substrate 2... Electrode pattern 3... Unit light emitting diode 4... Anode electrode 5... Cathode electrode 6. ... Chip seat 7 ... Connection pattern section 8 ... Boundary line 9 ... Division groove 10 ... Light-emitting diode chip 11 ...・・・
・Wire bonding 12, 13...additional area 14, 15...screening electrode 16・
...Insulated glass pattern −
17...Metal cap 18...Glass window 21...Shield conductor pattern 23...
...Lead inventor Fukumado Sakamoto 1) Toshihiro Hideaki Nishizawa Patent applicant Sumitomo Electric Industries, Ltd. 3-45 (Procedural amendment (voluntary) (1) Commissioner of the Japan Patent Office Shima 1) Haruki Tono (
2) Title of 2 invention Continuously assembled light emitting diode 3, person making correction (3
) Relationship to the incident Patent applicant Residence 5-15 Kitahama, Higashi-ku, Osaka Name (213) Representative President of Sumitomo Electric Industries, Ltd.
Masao Kamei (4゜4, generation)
Mr. 537 Address: 452, 3-15-16 Nakamichi, Higashinari-ku, Osaka - On page 5, line 16 of the specification, "thick film printing board" is corrected to "thick film printing JJ (board)." In the same book, page 7, lines 18 to 19, "soldering to the thick film printed circuit board 1," is corrected to "general adhesive to the thick film printed circuit board 1." Lines 1 to 20 replace "In this example, the cathode electrode 5," with "In this example, when fixed with a conductive adhesive, the cathode electrode 5,
Correct it with J. Between the 12th and 13th lines of page 8 of the same book, [Also, by adding a screening pattern that connects all the matrix-shaped patterns in series, all the light-emitting diodes in the matrix can be connected. - Can be energized at the same time. ” is inserted. Regarding the "Claims", it is printed an electrode pattern in which unit light emitting diode patterns are repeated in rows and columns or columns. A ceramic thick film printed circuit board and a cathode electrode FM, which is coated firmly on the chip seat! A light-emitting diode chip connected to the near-node electrode,
A continuously assembled light emitting diode characterized in that cathode electrodes and anode electrodes of adjacent unit light emitting diodes are continuous. 453-
Claims (1)
発光ダイオードパターンが行列状に繰返す電極パターン
を印刷したセラミック厚膜印刷基板と、チップ座の上に
固着被覆されカソード電極とアノード電極に接続された
発光ダイオードチップとより成り、隣接する単位発光ダ
イオードのカソード電極とアノード電極とが連続してい
る事を特徴とする連続組立発光ダイオード。A ceramic thick film printed substrate with an electrode pattern printed with a unit light emitting diode pattern consisting of a cathode electrode, an anode electrode, and a chip seat that repeats in a matrix, and a light emitting diode that is fixedly coated on the chip seat and connected to the cathode electrode and anode electrode. A continuously assembled light emitting diode comprising a chip and characterized in that the cathode electrode and anode electrode of adjacent unit light emitting diodes are continuous.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57076333A JPS58192389A (en) | 1982-05-06 | 1982-05-06 | Continuously assembled light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57076333A JPS58192389A (en) | 1982-05-06 | 1982-05-06 | Continuously assembled light emitting diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58192389A true JPS58192389A (en) | 1983-11-09 |
Family
ID=13602427
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57076333A Pending JPS58192389A (en) | 1982-05-06 | 1982-05-06 | Continuously assembled light emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58192389A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015520515A (en) * | 2012-06-05 | 2015-07-16 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングＯｓｒａｍ Ｏｐｔｏ Ｓｅｍｉｃｏｎｄｕｃｔｏｒｓ ＧｍｂＨ | Method for manufacturing a plurality of optoelectronic semiconductor elements, a lead frame composite, and an optoelectronic semiconductor element |
-
1982
- 1982-05-06 JP JP57076333A patent/JPS58192389A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015520515A (en) * | 2012-06-05 | 2015-07-16 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングＯｓｒａｍ Ｏｐｔｏ Ｓｅｍｉｃｏｎｄｕｃｔｏｒｓ ＧｍｂＨ | Method for manufacturing a plurality of optoelectronic semiconductor elements, a lead frame composite, and an optoelectronic semiconductor element |
| US20150200138A1 (en) * | 2012-06-05 | 2015-07-16 | Osram Opto Semiconductors Gmbh | Method for producing optoelectronic semiconductor components, leadframe assembly and optoelectronic semiconductor component |
| US9741616B2 (en) | 2012-06-05 | 2017-08-22 | Osram Opto Semiconductors Gmbh | Method for producing optoelectronic semiconductor components, leadframe assembly and optoelectronic semiconductor component |
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