JPS58192370A - Semiconductor device - Google Patents

Abstract

PURPOSE:To suppress the diffusion of constituting atoms and an ohmic contact forming metal of a substrate into an Au layer, which is used as an electrode, by a method wherein a metal layer consisting of Pd is provided on the metal layer, having Au as a base material, formed on a III-V group compound semiconductor substrate. CONSTITUTION:A P type ohmic electrode 32 is formed on the wafer 31 consisting of n-GaAs crystal. Then, Au-Ge-Ni 33 is vapor-deposited on the back side of the wafer 31. While the above vapor-deposition procedure is performed, an alloy reaction is generated between n-GaAs and Au-Ge-Ni alloy and an excellent ohmic contact is formed. Then, a Pd film 34 is vapor-deposited on the above. Desirably, a metal such as Au 35, for example, is vapor-deposited on the film 34. This film 34 can suppress the diffusion of Ge, Ga and the like on the surface of Au, thereby enabling to form a highly reliably ohmic electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure constituting an ohmic electrode for a ■-■ group compound semiconductor.

One of the problems required for electrode formation technology is bondability. This wire bonding is usually performed by thermocompression bonding. That is, pure Au and Au-
When thermocompression bonding is performed using this method, a very strong bond is obtained.

Conventionally, as for ohmic electrodes for silica compound semicircular bodies, AuQe/Ni/A u , A U G e
N j / A' * A uS fl /A u
, A u Z n / A u etc. were used.

However, when these two-layer or three-layer tC electrodes undergo a heat treatment process during vapor deposition or after the electrode formation process by using a CVD method, diffusion of semiconductor constituent atoms and ohmic contact forming metals into the Au layer is suppressed. could not. For this reason, there was a drawback that wire bonding properties were deteriorated due to the deformation of the Au surface.

In order to avoid such drawbacks, Au-Ge/'ra
There is also a method to solve this problem by using a three-layer trench structure like A u. (Unexamined Japanese Patent Publication No. 56-29365) In addition to Ta, W
There are also methods using Pt, but each has problems with adhesion and etching properties. In addition, the above-mentioned high melting point gold 1jA (Ta,
W, P, etc.) must be produced by electron beam evaporation, and the
When depositing on a wafer with a thickness of 0 μm to 100 μm, the following drawbacks occur. This problem will be explained using FIG. 1. In this case, the wafer 12 must be fixed to the wafer holder 11 above the melting point metal vapor deposition source 14.

The wafer is thin and the strength of the ■-■ group compound semiconductor is weak and fixed, so if the wafer is held down by applying force with the screws 13 or the like, it will break, making handling difficult. In the m1 diagram, 13 is an electron beam, 15 is a W filament that generates the beam, and 16 is a water-cooled crucible.

An object of the present invention is to provide a reliable ohmic electrode that suppresses diffusion of the constituent atoms of a compound semiconductor and the metal forming an ohmic contact into the Au layer that is the electrode. Moreover, the wire pounding strength is strong and the 1! It can be manufactured using a simple method that does not cause damage to thin compound semiconductor wafers during the vapor deposition process for forming the electrodes. This manufacturing advantage is a great advantage of the ohmic electrode for semiconductor devices of the present invention intended for lid products.

In order to achieve the above purpose, the following 411 configurations are taken.

The main points are: (1) providing a first gold J/i4 layer mainly composed of Au and forming an ohmic contact with the III-Va compound semiconductor substrate; A second metal layer made of PD is provided on the first metal layer.

AM, 'l'4! ! c111tll(°ils#h
o*avc*ip+Jvc.

A third metal layer, such as Au, is provided. However, this is not necessary if the Pd layer is made thick enough for that purpose. However, if the Pd layer is formed by a normal vapor deposition method, it is difficult to form an excessively thick Pd layer, so this method is not very advantageous.

The present invention suppresses the diffusion of constituent atoms of the compound semiconductor substrate (for example, Ga in the case of GaAs) or ohmic contact forming metals (for example, Zn) into the polar layer by the second metal layer made of Pd. It is possible to ensure sufficiently high reliability.

The present invention is extremely useful when applied to a compound semiconductor substrate on which a highly concentrated impurity layer is not formed.

The first metal layer usually contains at least an impurity element matching the conductivity of the ■-■ group compound semiconductor, and
An alloy containing u as a main component is used. Au-7,n, Au-Be for PJtlU type.

Au-8i, Au-Ge for N conductivity type.

Representative examples include Au-Ge-Ni and Au-8n.

The content of the impurities in these alloys is determined to be such that when the alloys are melted, the impurities can be doped in a controlled manner into the compound semiconductor substrate.

For example, in the case of A u -7,n, Zn is 10 to 20 Wi
-'7o, for A uG e, Ge is 4~12Wi
-% 8 degrees.

The first metal layer usually has a thickness of 200 nm to 300 nm. The lower limit of the film thickness is such that at least a continuous film can be formed after melting. The upper limit may be determined based on factors such as ease of vapor deposition.

The second metal layer has a thickness of 50 nm to 650 nm. As mentioned above, the second metal layer (Pd layer) may be thick;
In this case, the third metal layer may be omitted. However, although it is not impossible to deposit Pd thicker than 650 nm, it is difficult.

The third metal layer is usually made of Au and has a thickness of 300 nm or more.

The present invention can utilize a conventional resistance heating method.

This method will be explained using FIG. Vapor deposited metal 22 is suspended from filament 21. If this is placed above the wafer 24, there is no need to fix the wafer, and it is sufficient to simply place it on the heating carbon plate 23.

P d 1d (1) A high melting point metal that acts as a diffusion barrier. (2) In the iIk layer process, a resistance wire heating method that does not require fixing the wafer can be used. This is particularly effective when it is necessary to handle

Hereinafter, the present invention will be explained in detail with reference to Examples.

First, we will explain the conditions for forming the ohmic pole, and then
The actual manufacturing process of an aAs-GaAtAs laser will be described.

First, N-type GaAsKA u -G e-Nio gold (i
AU-12wt%Ge-4wt%Ni) is layered to a thickness of 200 nm to 300 nm by a resistance wire heating method. During this vapor deposition, the wafer is heated to 360C to 380C to deposit the alloy. Next, adjust the wafer temperature to 150C to 250C.
PD and Au are continuously deposited at a lower temperature.

If the thickness of Pd is 5 Qnm or more, it will act as a sufficient barrier and can suppress the diffusion of Qe, Ga, etc. into the Au surface (3). Further, if a heat treatment step is required after that, the Pd may be made thicker in accordance with the 1L time at that time. If the thickness of Au is 300 nm or more, there will be no problem in wire bonding.

It is clear from the present invention that a similar process is possible for N-type InP.

Next, a wafer wafer machine used for actually manufacturing a semiconductor laser will be described using FIGS. 3 (1) to (3). FIG. 4 is a perspective view of the semiconductor laser.

(1) A P-ohmic electrode 32 is formed on a wafer 31 that has been processed to have a GaAtAs f surface by epitaxial growth on an n-GaAs (100 nm) crystal and has the crystal structure necessary to function as a laser. The wafer thickness at this time is 45QAtm.A Cr/Au two-layer film is coated on the electrode to a thickness of approximately 1 to 1.3 μm.The electrode is etched in photo-etching step 1 to form a splice plate. (Figure 3 (1)).

(2) Subsequently, the surface of the wafer is polished, strained, and etched. Etching liquid is llt 8 U4klt 0
The t-H,0 system is used. The final wafer thickness is 100
~120 μm (Figure 3 (2)). This is a thickness that allows the laser chip to be easily separated.

At the same time, it is also thick enough to damage the wafer if it is handled in a way that places a large amount of local pressure on it.

(3)')-L-HaIICAu-Qe-N explained earlier
A three-layer i/Pd/AH film is successively deposited by resistance wire heating. The degree of vacuum during deposition is 3 × 10-” Torr. First, the wafer temperature is set to 3600 °C, and A
11-ae-Niaa is deposited to a thickness of 300 nm.

During this time, n-(JaAs and Au-Qe-Ni alloy (fc, for example, Au84wt%, Ge12wt%, Ni4Wi%
) causes alloying reaction during deposition and forms good ohmic contact. Next, Ueno @lk for 200t:'
Pdji [34 to 200 nm, Au35 to 8
00 nm continuous deposition to make the total 11 electrode film thickness 1.3 μm (FIG. 3 (3)).

(4) The finished chip of the wafer machine is 400 μm x 30
Divide into dimensions of 0 μm x 100 μm by a groove and a cross section (Fig. 4). After the chip is broken, sputtered 810*Iil is deposited as a cleavage film on the cleavage surface of the chip to protect the steel surface. At this time, the temperature of the chip increases during sputtering, but due to the N-ohm property and other bondability
does not deteriorate.

In the current case, the substrate is GaAl, but InP-In
Even in the case of semiconductor lasers such as GaAIP type, it is similar to nP substrate.

Further, the ohmic a-contact forming metal layer is Au-Ge.

The same applies to Au-8t alloy and the like.

Furthermore, in the case of a laser using a P-type substrate as the substrate, the only difference is that the ohmic contact-forming gold X+- is formed of, for example, an Au-7,n alloy.

Furthermore, Pd is an etching solution for Au, NH,I-■,
It can be etched with a thread etching solution, and there is no problem even if patterning of 11L poles is required.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram explaining the electron beam evaporation method.
FIG. 2 is a schematic diagram illustrating the resistance wire heating vapor deposition method, FIG. 3 is a Wr plane view of the device showing the electrode forming process of the laser device, and FIG. 4 is a perspective view of the laser device. 31... Wafer, 33... First gold layer (Au-Qe-Ni, etc.) for forming ohmic contact, 34-Second metal made of Pd J-135... Third metal part (example!
1 Figure 6 2nd VJ 3 Figure (3) 5 Tomi 4 Continuation of figure 1 page σ ■ Inventor Kobayashi Shosou 1-280 Higashikoigakubo, Kokubunji City Hitachi, Ltd. Central Research Laboratory @ Inventor Sato Mushi Kokubunji City 1-280 Higashi-Koigakubo, Hitachi, Ltd., Central Research Laboratory Inventor: Hirokato Kato, Hitachi, Ltd., Takasaki Factory, 111 Nishi-Yokote-cho, Takasaki-shi Inventor: Masamichi Kobayashi, 111 Nishi-Yokote-cho, Takasaki City, Hitachi, Ltd. Manufacturing site Takasaki factory 363-

Claims (1)

[Scope of Claims] 1, l[[-Vm compound semiconductor substrate; a first metal layer mainly composed of Au and forming an ohmic contact between the substrate; and a first metal layer on the first metal layer. A semiconductor device including at least a second metal layer made of PD provided in the semiconductor device. 2. The semiconductor device according to claim 1, further comprising a third metal layer on the second metal layer. 3. The semiconductor device according to claim 2, wherein the third metal layer is made of ALI. 4. The first metal layer contains an impurity constituting the N4 electric type in the semiconductor substrate and is made of a metal mainly composed of Au. N
The semiconductor device according to claim 1, 2, or 3, characterized in that it is of a conductive type. 5. @The first metal layer has a P4 electric type t in the semiconductor substrate.
Claim 1, characterized in that: - a metal layer containing impurities and consisting mainly of ALI, and a region in contact with the first metal layer of the semiconductor substrate P is of P conductivity type. , the semiconductor device according to item 2 or 3.