JPS58189811A - Digital signal extracting circuit in pcm reproducer - Google Patents

Abstract

PURPOSE:To attain the extraction of accurate data, by detecting a peak level when a data synchronizing signal exists and obtaining the optimum slice level for extraction of digital data in following to a distored signal waveform. CONSTITUTION:The high potential peak level PH and the low potential peak level PL at a period T when the data synchronizing signal A exists are inputted to a voltage division circuit consists of resistors R1 and R2, where they are brought to the optimum slice level in following to an input signal waveform, and the result is applied to a comparison signal terminal of a comparator 3, where a false video signal applied from a clamp circuit 2 is compared with the optimum slice level in following to the signal waveform from the the circuit 7, and an accurate digital output is extracted from the output.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM playback device &C using a VTR,
In particular, the present invention relates to a digital signal extracting circuit in a PCM reproducing apparatus capable of obtaining an optimum level when extracting a digital signal.

PCM tape recorders are known in the field of digital audio, and one of them is a PC that uses a general home VTR as a recording medium, that is, a recording/playback VTR.
I have an M tape recorder. V in the recording and reproducing system as described above.
TR is [importantly used] 1) In CM tape recorders,
From the VTRK, two channels of R signals σ] are recorded on one diagonal track by time division multiplexing VTRK. For this purpose, the waveform of the PCM signal is converted into a signal form that conforms to the standard 17.1 television signal, including water and vertical synchronizing signals, and is recorded on the magnetic tape. Hereinafter, in this specification, P
The CM signal is called a pseudo video signal.

First, the form of the above-mentioned pseudo video signal will be explained using the NTSC system as an example.

The above-mentioned σ-in pseudo video signal G+,) format is a signal format that conforms to a standard television signal, and during Esurud (26Z5H), the data block is set to σ].
H and control (goods) signal B0. Put it on 1. Contains H. One data block consists of 6 sampling signal words (3 words for the L channel signal and 3 words for the R channel signal, each arranged alternately), 1 each of error correction words P and Q, and 1 error detection word (CaC ) and 1, and these are arranged in the IH section. The control signal block is arranged at the beginning of the data section of each field and consists of five words: one start signal word, one content identification signal word, one address signal word, one control signal word, and one error detection word (CRC).
These are arranged in the IH section. Note that the format and arrangement of each horizontal and vertical synchronization signal are the same as a standard television signal.

FIG. 1 shows the arrangement and structure of the above-mentioned pseudo video signal within the IH. In the figure, H is the horizontal synchronization signal, ^ is the data synchronization signal, B is the data block signal, and C is the data block signal.
is the white reference signal. The code for the above data synchronization signal is 1010, and the 8th data block is:
Sampled signal word ('l+ R1+ L2+ R2+
L3i R3) + error correction word (p, Q'I
It is composed of an error detection word (CRC), and the waveform of the word is an NRZ signal waveform. As shown in Figure 1, each horizontal synchronization signal (2)
Immediately after, a data synchronization signal and a white reference signal at the end are added, and the above-mentioned words are inserted between these 01 and arranged within one horizontal synchronization interval. Although Fig. 1 only shows the arrangement and configuration σJ within the IH section, the arrangement and configuration within each field θ] includes an equalization pulse and a vertical synchronization signal at the beginning of each field σ). placed, 10th H in odd field, 1o in even field, s H
[Jπ control signal professional, IH with Ri.

245H with data blocks placed between them are arranged, and the remaining H is a blank section.

Next, a conventional example of a PCM tape recorder that handles a pseudo video signal having the above-mentioned configuration will be explained. Second
The figure shows a digital signal extraction circuit used in a conventional PCM tape recorder. In FIG. VC, Tl is an input terminal, and a pseudo video word signal reproduced from T and VC (as described above, σ, reproduced from VTRK) is supplied to the input terminal Tl.

1 is an amplifier equipped with AGC for amplifying the above-mentioned Q] pseudo video signal to a level suitable for processing; 2 is the pseudo video signal V1. ．． On the other hand, a clamp circuit 3 is a nib/parator to obtain DC stability. Note that (2) is a slice level setting (h volume) for setting the slice level of the above-mentioned pseudo video signal in the comparator 3νC, and T2 is an output terminal from which a digital output is taken out.

In the circuit with the above configuration, the input terminal T is reproduced and the pseudo video signal supplied is 1V.
Since the p-p is 8 degrees, the amplifier 1 adjusts the amplitude to a constant value and amplifies it to a level (approximately 3 V p-p) K suitable for processing71).The pseudo video signal via the amplifier 117 described above is A DC-like novel is unstable/,,
), Jtl is supplied to the clamp circuit 2. Here, Bedes 7 is clamped to obtain DC stability. Figure 3a) 'it, the waveform shown is the 7971 circuit 24 shown above.
- Indicates a pseudo video signal via 1. The illustrated level Lc, -t, ie, the pedestal level, is OV&C clamped [, ~] to obtain direct current stability. The signal that has passed through the clamp circuit 2 is supplied to the human input signal terminal of the comparator 3σ.
) Comparison signal terminal p? A DC voltage is applied through the slice level setting σ circuit J-■, and the above C riff/parator 3 receives the above signal supplied from the 7971 circuit 2 to set the slice level. +7
) : %lium 2 and compared with the one slice level (level h shown in FIG. 6 tal K), and the digital signal portion Q shown in FIG. 6 ibl is extracted from the output.

In the example of the f5-conventional PCM tape recorder described above, when extracting only the digital signal portion from the pseudo video signal, the slice level is semi-fixed and the amplifier 10,) AG
C [Rely on method 〇]. Stiffness] Maximum α of method
The disadvantage is that the 8GC of the amplifier 1 operates at J:5 to keep the peak value of the waveform constant. A-) The slice level deviates from the optimum value and must be manually corrected. In other words, the slice level is semi-fixed with respect to the original signal.
: Therefore, when amplitude fluctuation occurs, the optimal type of slice reduction...σ) Range b1 is narrow (・K iE If accurate digital data cannot be retrieved (・・there is a drawback. PCM signal σ) When using a general home VTR as a recording medium (1,j) It is difficult to obtain an ideal reproduction signal due to the influence of wave number characteristics and phase timing. be.

Apart from the above, the waveform σ) in the digital data part of the pseudo video signal σ) is integrated, and the peak level is divided by the experimentally determined ratio +X. It is also known as a slicing level. This item has a high performance level <61h'' = no problem in most cases, and V in long-term (6 hours) mode.
TRK J: When recording and reproducing, the optimum zero slice level can be obtained with σ] (not 1. This is due to the following reasons.

(11 standard (2 hour) mode v) For waveforms played by a VTR, the force and deflection width/1" are set to the optimum slice level.
- Alta, if the level is slightly off (・Kamikimi σ〕width σ】 range, there will be no problem.

However, after a long period of time (6 hours)
In this case, there is almost no width as described above, and rather it is close to the point π (・also σ
]. Therefore, the detection of the peak value α] is always sensitive. On the contrary, waveform number frequency specific OJ deterioration,
To s2, due to the effects of harsh emphasis/noise suppression circuits, etc., it has become σ-strong even though it is non-current, so the appropriate peak value Q] judgment h''-ip *
(2) Depending on the percentage of the VTR used, the waveform σ〕h
・Since this is due to the distortion caused by σ, the slice level obtained by converting it from the peak value can not be said to be the engineering optimum value. This is caused by the signal processing of the VTR, and is not uniform.Therefore, when recording and playing back a recording, fine adjustment b1 is required for each VTR used.

The present invention was made in order to eliminate the various drawbacks of the conventional π described above.
A PC that can follow a certain signal waveform to obtain the optimal slice level and extract accurate data σ]
An object of the present invention is to provide a digital signal extraction circuit in an M reproducing device.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 4 is a block diagram of a digital signal extraction circuit according to the present invention. In the figure, TI is an input terminal, and T2 is an output terminal from which f digital signals are extracted. 1 is an amplifier, and 2 is a clamp circuit which clamps the pedestal level of the pseudo video signal to a set clamp level. The signal that has passed through the clamp circuit 2 is supplied to the input signal terminal of the comparator 3 and also to the gate control 4. It is also supplied to the high-order peak detection circuit 5 and the low-order peak detection circuit 6.

The above-mentioned σ gate control 4 detects the data synchronization signal (code xoto) arranged immediately after each horizontal synchronization signal from the pseudo video signal supplied from the CL71 circuit 2, and from its output 1010 mentioned above
A gate signal that passes only σ waveform Q) is obtained. The above gate signal, which is the output of the gate control 4, is supplied to a high-level peak detection circuit 5 and a low-level peak detection circuit 6, and the peak value f is detected by a resistor R.
The voltage is appropriately divided by a voltage dividing circuit 7 constituted by 1s R2 and supplied to a comparison signal terminal of a comparator 3. The signal from the voltage dividing circuit 7 supplied to the comparison signal terminal of the above comparator 30 determines the optimum slice level that follows the signal waveform according to the present invention. In addition, the above voltage dividing circuit 7
0. ) The voltage division ratio between the resistors R and R2 is determined experimentally so as to obtain the optimum level. The comparator 3 compares the pseudo video signal supplied from the clamp circuit 2 with the voltage f from the voltage dividing circuit 7, and the digital signal portion σ is accurately extracted from its output. Ru.

In the digital signal extraction circuit having the circuit configuration described above, the pseudo video signal reproduced from the VTRl/C and supplied to the input terminal T is amplified by the amplifier I to a level suitable for processing (approximately 3Vpp). It is supplied to the clamp circuit 2. In the clamp circuit 2, the pedestal level of the pseudo video signal is clamped to a set clamp level and output as a DC stable signal. The above-mentioned clamp circuit 2tLJ and the reflapped pseudo video signal are connected to the input signal terminal of the comparator 3 and the gate control/control 4. High level peak detection circuit 5
and the lower peak detection circuit 6, respectively.

The gate control 4 detects the code 101O of the data synchronization signal shown by σ] in FIG. 5 arranged immediately after each horizontal synchronization signal, and from its output the code 10100
A gate signal is output that allows only the waveform to pass.

The gate signal from the gate control 4, which is passed through the above-mentioned 10100 waveform σ, is passed through the high-level peak detection circuit 5.
and the lower peak detection circuit 6, respectively. Then, in the high-level peak detection circuit 5, based on the above-mentioned gate signal from the gate control 4,
During the period T during which the data synchronization signal A (1010 signal) shown in FIG. 5 exists in the pseudo video signal supplied from the clamp circuit 2, a very high peak level pH is detected. Similarly, from the lower peak detection circuit 6,
Detect the low σ] peak level PL during the above-mentioned period T in which the data synchronization signal A exists. High level Q] peak level P in period TVc detected as above
H and the low peak level PL are made into an optimal slice level that follows the input signal waveform by the external pressure circuit 7 composed of resistors R1 and R2, and are supplied to the comparison signal terminal of the comparator 3σ. The comparator 3 compares the pseudo video signal supplied from the clamp circuit 2 with the optimal slice level that follows the signal waveform obtained from the above-mentioned path from the voltage divider circuit 7, and accurately determines the A digital output is taken out.

1 As shown above, the peak of the signal waveform is set to the higher level σ
] By setting the slice level by detecting the lower level PL (lowest point) instead of just using the level PH (highest point), it is possible to prevent false detection due to waveform bias. In addition, the peak of the waveform is not captured from the entire pseudo video signal, but from the data synchronization signal (signal of code 1010 arranged immediately after each horizontal synchronization signal).
By detecting this, it is possible to set a slice level that matches the custom waveform transmission. Above σ】Code 1
The 010σ] signal most accurately reflects the characteristics of the transmission system. If the entire waveform is detected,
Since the peaks in the continuous portion of (2) are detected, the frequency characteristics deteriorate and cannot be said to be optimal in the °C color system.

As described above, according to the present invention, it is possible to extract accurate data with σ] configured to follow even a peculiar signal waveform and obtain the optimum slice level for extracting digital data. [σ] As a result, it is possible to provide a digital signal extraction circuit for a PCM playback device that can more accurately set the slice level for the original signal and can be expected to operate stably even with the above-mentioned fluctuations in the level of the original signal. reactor.

Furthermore, according to the present invention described above, stable operation as described above can be expected even when a VTR in long-time mode (6 hours) is used for recording and reproducing system of PCM signals. , you can obtain even stronger stability by using the VTR in standard (2 hour) mode, and
It is also possible to improve compatibility between different types of VTRs.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the arrangement and configuration within the IH of a pseudo video signal in which a PCM signal is converted into a signal format similar to a standard television signal, and Fig. 2 is an example of a conventional digital signal extraction circuit. FIG. 6 +a+ and +b+ are waveform diagrams for explaining a conventional example, FIG. 4 is an embodiment showing a digital signal extraction circuit according to the present invention, and FIG. 5 is a waveform diagram for explaining an embodiment according to the present invention. It is a diagram. l: amplifier, 2: clamp circuit, 3: comparator, 4
Gate control, 5: High level peak detection circuit, 6
:lower σ] peak detection circuit, 7: voltage dividing circuit. Patent applicant: Akai Electric Co., Ltd. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] In setting the optimal slice level for digital signal extraction in a PCM playback device using a recording/playback system K VTR, a PCM signal is converted from a pseudo video signal waveform into a signal format conforming to a standard television signal. In step 6 of detecting the peak, the peak is detected from the data synchronization signal portion of the pseudo video signal, and the optimum slice level is set in accordance with the transmission cycle of the pseudo video signal waveform. A digital signal extraction circuit in a PCM playback device featuring features.