JPS58189669U - Video signal encoding circuit - Google Patents
Video signal encoding circuitInfo
- Publication number
- JPS58189669U JPS58189669U JP1982086301U JP8630182U JPS58189669U JP S58189669 U JPS58189669 U JP S58189669U JP 1982086301 U JP1982086301 U JP 1982086301U JP 8630182 U JP8630182 U JP 8630182U JP S58189669 U JPS58189669 U JP S58189669U
- Authority
- JP
- Japan
- Prior art keywords
- encoding circuit
- video signal
- signal encoding
- esaki diodes
- esaki
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の映像信号の符号化回路を示す構成説明図
、第2因は本考案の一実施例を示す構成説明図、第3図
は本考案に係るエサキダイオードの特性の一例を示す図
、第4図は第2図の単位回路を示す図、第5図は第4図
の回路の動作の一例を説明するための図、第6図は本考
案に係る符号化回路の動作の一例を説明するための図、
第7図aは本考案に係る固体撮像素子の出力信号の一例
を示す図、第7図すは本考案に係るゲートパルスの一例
を示す図である。
131.132・・・エサキダイオード、15・・・符
号化回路、161,162・・・負荷抵抗、171゜1
72・・・基準電圧源。Fig. 1 is an explanatory diagram of the configuration of a conventional video signal encoding circuit, the second is an explanatory diagram of the configuration of an embodiment of the present invention, and Fig. 3 is an example of the characteristics of the Esaki diode according to the present invention. 4 is a diagram showing the unit circuit of FIG. 2, FIG. 5 is a diagram for explaining an example of the operation of the circuit of FIG. 4, and FIG. 6 is a diagram of the operation of the encoding circuit according to the present invention. A diagram to explain an example,
FIG. 7a is a diagram showing an example of an output signal of the solid-state image sensor according to the present invention, and FIG. 7 is a diagram showing an example of a gate pulse according to the present invention. 131.132...Esaki diode, 15...Encoding circuit, 161,162...Load resistance, 171°1
72...Reference voltage source.
Claims (1)
のエサキダイオードと、この各エサキダイオードのカソ
ードにそれぞれ対応して負荷抵抗を介して接続された基
準電圧源と、前記各エサキダイオードのカソードにコン
デンサを介して接続されたPCMに変換する符号化回路
とを具備することを特徴とする映像信号の符号化回路。A plurality of Esaki diodes to which video signals are respectively applied to the anodes, a reference voltage source connected to the cathodes of each of the Esaki diodes via load resistors, and a capacitor connected to the cathode of each of the Esaki diodes. 1. An encoding circuit for a video signal, comprising: an encoding circuit for converting into PCM, which is connected through the encoder.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982086301U JPS58189669U (en) | 1982-06-10 | 1982-06-10 | Video signal encoding circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982086301U JPS58189669U (en) | 1982-06-10 | 1982-06-10 | Video signal encoding circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58189669U true JPS58189669U (en) | 1983-12-16 |
Family
ID=30095120
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1982086301U Pending JPS58189669U (en) | 1982-06-10 | 1982-06-10 | Video signal encoding circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58189669U (en) |
-
1982
- 1982-06-10 JP JP1982086301U patent/JPS58189669U/en active Pending
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