JPS58101234U - Redundant interface circuit - Google Patents

Redundant interface circuit

Info

Publication number
JPS58101234U
JPS58101234U JP19627681U JP19627681U JPS58101234U JP S58101234 U JPS58101234 U JP S58101234U JP 19627681 U JP19627681 U JP 19627681U JP 19627681 U JP19627681 U JP 19627681U JP S58101234 U JPS58101234 U JP S58101234U
Authority
JP
Japan
Prior art keywords
systems
input terminals
power
interface circuit
redundant interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19627681U
Other languages
Japanese (ja)
Inventor
清 村沢
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP19627681U priority Critical patent/JPS58101234U/en
Publication of JPS58101234U publication Critical patent/JPS58101234U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は高信頼層が要求される電子機器め従来例を示す
ブロック図、第2図は本考案に係る冗長インタフェース
回路が適用された電子機器の一例を示すブロック図、第
3図は第2図の冗長インタフェース回路の一実施例を示
す回路図である。 31.33・・・信号入力端子、32.34・・・電源
端子、35.36・・・信号出力端子、37.38・・
・基本面路。
Fig. 1 is a block diagram showing a conventional example of an electronic device that requires a high reliability layer, Fig. 2 is a block diagram showing an example of an electronic device to which the redundant interface circuit according to the present invention is applied, and Fig. 3 is a block diagram showing an example of an electronic device to which a redundant interface circuit according to the present invention is applied. FIG. 2 is a circuit diagram showing an embodiment of the redundant interface circuit of FIG. 2; 31.33... Signal input terminal, 32.34... Power supply terminal, 35.36... Signal output terminal, 37.38...
・Basic surface road.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1系統および第2系統から各対応してデジタル信号入
力が導かれる2系統の信号入力端子と、電源が選択的に
印加される2系統の電源入力端子と、この2系統の電源
入力端子のどちらに電源が印加されるかによって前記2
系統の信号入力端子のデジタル信号入力の相異なる一方
を選択するデジタル回路と、このデジタル回路により選
択されたデジタル信号入力が導出され前記第1系統およ
び第2系統に各対応して出力する2系統の信号出力端子
とを具備することを特徴とする冗長インクフェース回路
Two systems of signal input terminals to which digital signal inputs are respectively led from the first system and the second system, two systems of power input terminals to which power is selectively applied, and two systems of power input terminals. The above 2 depends on which side the power is applied to.
a digital circuit that selects one of the different digital signal inputs of the signal input terminals of the system; and two systems that derive the digital signal input selected by the digital circuit and output it correspondingly to the first system and the second system. A redundant ink face circuit comprising: a signal output terminal;
JP19627681U 1981-12-26 1981-12-26 Redundant interface circuit Pending JPS58101234U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19627681U JPS58101234U (en) 1981-12-26 1981-12-26 Redundant interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19627681U JPS58101234U (en) 1981-12-26 1981-12-26 Redundant interface circuit

Publications (1)

Publication Number Publication Date
JPS58101234U true JPS58101234U (en) 1983-07-09

Family

ID=30109523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19627681U Pending JPS58101234U (en) 1981-12-26 1981-12-26 Redundant interface circuit

Country Status (1)

Country Link
JP (1) JPS58101234U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63298639A (en) * 1987-05-29 1988-12-06 Fujitsu Ltd Control route switching system for input/output device
JPH06290064A (en) * 1991-08-12 1994-10-18 Trw Inc Fault-tolerant data recorder
JP2016060413A (en) * 2014-09-19 2016-04-25 日立オートモティブシステムズ株式会社 Vehicular electronic control unit and control method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55146528A (en) * 1979-05-04 1980-11-14 Hitachi Ltd Multiplexing electronic unit
JPS56124963A (en) * 1980-03-07 1981-09-30 Meidensha Electric Mfg Co Ltd Coupling system of double composite system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55146528A (en) * 1979-05-04 1980-11-14 Hitachi Ltd Multiplexing electronic unit
JPS56124963A (en) * 1980-03-07 1981-09-30 Meidensha Electric Mfg Co Ltd Coupling system of double composite system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63298639A (en) * 1987-05-29 1988-12-06 Fujitsu Ltd Control route switching system for input/output device
JPH06290064A (en) * 1991-08-12 1994-10-18 Trw Inc Fault-tolerant data recorder
JP2016060413A (en) * 2014-09-19 2016-04-25 日立オートモティブシステムズ株式会社 Vehicular electronic control unit and control method

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