JPS5818760A - Multicomputer processing system - Google Patents

Abstract

PURPOSE:To prevent stoppage of the whole system even when one set of computer among plural computers of the system is stopped for changing or testing software, by performing an arrangement that each of the plural computers can make accessing to both or only one of duplex common memories. CONSTITUTION:Common memories 1A and 1B are made duplex by a common memory controlling circuit 2 and, at the same time, connected to plural computers 3a, 3b-3i, respectively. The common memories can access to auxiliary memories 8A and 8B and peripheral equipments 11 through a data bus 12. In the status register of each computer, an access mode setting bit which specifies the access to the common memories 1A and 1B is installed, and both the common memories are set to the foreground mode in normal on-line operation and the status registers in the computers are also set to the same mode. Both the common memories are simultaneously used for writing and reading. When one computer is being tested, the computer is set to the background mode and one of the common memories is also set to the background mode. In this case, only the memory under the background mode can be accessed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multi-computer processing system, and particularly to a multi-computer processing system suitable for a system in which the arrangement of data on a shared memory is frequently changed.

Various industrial process controls and online information systems require extremely high reliability, so the main equipment in the system, such as the central processing unit (hereinafter simply referred to as a computer), is multiplexed and mutual backup is used to improve system reliability. Often, methods are used to improve In such a multi-computer processing system, in order to achieve faster information transmission between computers, faster information transmission between computers, and continuity of processing, efforts have recently been made to speed up the switching of tasks between computers and to improve processing speed. In order to achieve continuity, shared memory is used.

Computing institution shared memory is often duplicated for the purpose of improving reliability, and management information between computers and frequently accessed online data are stored in the shared memory. The adoption of shared memory among computing institutions not only provides high reliability, but also makes it possible to use hardware resources efficiently by easily sharing the load between computers, and to switch computer operations at high speed without interruption. The following problems arise depending on the application field.

In other words, if for some reason it becomes necessary to change the software,
If the data content or allocation in shared memory is changed, the entire system must be stopped. Also,
Even when one of multiple computers is removed from online control and used to test a program under development, the content of the test is limited because this computer cannot be allowed to rewrite online data on the shared memory. It will be done. −
For example, computer control systems for power systems require high performance in terms of reliability, responsiveness, etc., and the power systems to be controlled are expanded and modified on a daily basis. Therefore, the arrangement of data on the shared memory that represents the real-time state of the power system is frequently changed. Furthermore, after the change, there is a request to perform a test run using the changed software before starting actual operation. However, if online programs are allowed to reference transient data during software changes, there is a risk of malfunction of the computer system, so when such software changes are made, the system must be stopped, and data stored in shared memory must be stopped. Tests that rewrite data cannot be executed.

In view of the above-mentioned problems, the present invention takes advantage of the advantages of using computing engine shared memory (high reliability, ease of load sharing, and faster switching of tasks for computers), while continuing online operation of the system. Another object of the present invention is to provide a multi-computer processing system that allows software to be freely changed and tested on multiple computers.

The features of the present invention include two shared memories with two access modes: faground mode and background mode, master/slave management when the two shared memories are accessed in the same mode, and copying when changing the access mode. The present invention is configured to include a shared memory control circuit that performs processing, and a plurality of computers each having a status register containing a bit for setting the access mode of the shared memory.

That is, in the present invention, each duplex shared memory has two states, foreground mode and background mode, and by providing a bit for setting the access mode of the shared memory in the computer status register, multiple computers can be connected. Each computer can access both or only one of the duplicated shared memories, and the mode of the shared memory and the access mode of the computers can be freely changed by a program. By providing such a function, the two shared memories can be redundantly operated during steady operation, and the two shared memories can be separated when changing or testing software on one of the multiple computers. , you can freely switch between using one for online use and the other for testing.

Embodiments of the present invention will be described below based on the drawings. 1st
The figure shows the overall configuration of a multi-computer processing system according to the present invention.
is duplicated by the shared memory control circuit 2, and at the same time,
Multiple computers 3a.

3b, . . . , 31, respectively.

And each computer 3a, 3b,...31 is each
data bus 12 and multi-channel access controller 7A;
Auxiliary memory 8A is duplicated via 7B.

8B, and can access peripheral devices 11 shared between computers through a shared bus control circuit 10 connected to the data bus. The intercomputer communication device 13 still performs signal reception between computers. Here, the two shared memories each have two modes, a foreground mode and a background mode, and the shared memory IA
, 1B has a function that allows the mode to be changed by operation from the operation panel attached to 1B or by commands from the connected computer. On the other hand, as shown in FIG. 2, the status register of each computer is provided with an access mode setting bin B7 that defines access to the shared memories IJIA and IB. Here, the meanings of the other bits in the status register 20 are:
It is similar to a conventional calculator.

Each computer 3a, 3b, . . . depends on the relationship between the shared memory mode and the computer side access mode.

The relationship between 31 and the shared memos IJIA and IB changes as follows. That is, in normal online operation, the two shared memos IJIA and IB are both set to foreground mode, and the access mode of the status register 20 in each computer is also set to foreground mode. When a computer writes to the shared memory in this state, two shared memories IA.

Writing is done to IB at the same time. Further, at the time of reading, data is read from one of the two shared memories IA and 1B to which the foreground mode was set first (this is called the mask side during shared memory duplex operation). If one or more computers are still undergoing software modification or testing, set the access mode of these computers to background mode, and set one of the shared memories IA' and 1B to foreground mode and the other to background mode. . The computer of the person doing online work is set to foreground mode, so it can only access the shared memory in foreground mode (
On the other hand, a computer set to background access mode can only access shared memory set to background mode. By doing this, one of the two shared memories can be used for online processing while the other can be used for software modification or testing. Moreover, test data can be freely set in the background mode shared memory.
Software testing is possible in exactly the same environment as online operation.

It should be noted here that the access mode of the computer does not remain assigned. This is because the shared memory stores shared resource management information for each computer, so if you separate the shared memory of the two computers, including the storage area where this management information is stored, it will cause problems in the multi-computer processing system. Management and communication between computers become impossible.

Therefore, even if a computer is set to background mode, when accessing dual system management information or messages between computers, the mode must be changed to foreground mode and then
It is configured to access the shared memory and then return the access mode to its original state.

On the other hand, the shared memory control circuit 2 performs master and slave management when the two shared memories are in the same mode as described above, as well as copying when the mode of one of the shared memories is changed. In other words, when one shared memory is in foreground mode and the other is in background mode, when you change the shared memory set to background mode to foreground mode, the data on the foreground mode side is changed to the new foreground mode. Copy it to someone else. Furthermore, if a fault is detected in one of the duplicated shared memories, this shared memory is disconnected.

Next, the procedure for changing and testing software in this embodiment will be explained.

First of all, 1) Under normal operating conditions, two shared memories IA and I
B is redundantly operated in the foreground mode, and all the computers 3 a + 3 b + . . . -31 share the processing in the foreground mode. Tani computers can freely access online information on the shared memory, and information can be exchanged between computers using the shared memo IJIA.

This is done via IB.

Next, 2) In order to change and test software using a specific computer among the computer group 3a, 3b, ..., 31, for example, computer 3a, the processing work that was previously assigned to computer 3a 1i444 will be transferred to another computer. Calculator (e.g. il calculator 3b
), and the computer 3a immediately stops processing. and 3) Change the shared memo IJIA and 11 (for example, IA) to the ground mode (calculator 3).
71 according to the program command of a. ). Similarly, a block j of the duplicated auxiliary memory (for example, auxiliary memory 8A) is also separated by redefining the configuration definition of the operating system.

Furthermore, 4) Change the configuration of the computer 3a at the same time as changing the ground mode setting, 3)
Connect the auxiliary memory IJ8A that was disconnected at .

With the above operations, one computer system is configured by the computers 3a, .

If you temporarily set the access mode of the shared memory to foie gras wood mode, you can freely monitor the thin needle calculator and send and receive information to the thin needle calculator. Therefore, when one of the fine needle calculators stops due to some kind of failure, it is possible to stop software modification or testing and take over the processing work for backup.

Now, 5) When the test is finished, the original processing duties will be returned to computer 3a, and the other computers will also be assigned to computer 3a.
In order to incorporate it into the new software system centered on a, the access mode will be set to background mode.

Next, 6) Equalize the contents of the duplicated shared memory and auxiliary memory with the new software using the remaining computer set to foreground mode. Furthermore, 7) Return all computers to foreground mode again and return to normal operation mode. and 8) change the shared memory IA, which is set to background mode, to foreground mode.

The above steps enable software changes and tests.

As described above, according to the present invention, it is possible to realize a multi-computer processing system in which software can be freely changed and tested on one or more computers without reducing the operating rate.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the overall configuration of a multiple computer processing system according to the present invention, and FIG. 2 is a diagram showing the bit configuration of a status register in each computer of the multiple computer processing system of FIG. IA, IB...shared memory, 2...shared memory control circuit, 3a, 3b, -...--, 3r-computer, ? A.

Claims (1)

[Claims] 1. Two shared memories with two access modes: foreground mode and background mode, master/slave management when the two shared memories are accessed in the same mode, and copy processing when changing the access mode. 1. A multi-computer processing system comprising: a shared memory control circuit; and a plurality of computers, each of which has a bit for setting an access mode of the shared memory in a status register.