JPS581815A - Reproducing circuit of digital information - Google Patents

Abstract

PURPOSE:To realize the accurate reproduction of information, by superposing an AC bias signal on a differential signal obtained based on a reproduced digital output to form a digital signal including a level part and a frequency part and making the frequency part of a long section inefficient. CONSTITUTION:The digital signal S'A of a tape 1 is reproduced and applied to a differentiating circuit 4, and an AC bias signal given from an oscillator 6 is superposed on the differential output of the circuit 4 by a mixer 7. Thus a digital signal SG including a level part and a frequency part is obtained via a zero-level comparator 5. Then a D type FF9 which reads in the signal SG is triggered by the output SH of a monostable multivibrator 8 which is triggered by the signal SG. For the signal SH, the time (d) during which the semistable state of <=1/2 digit of the signal S'A is turned to a stable state is set to a triggering action. And the frequency part corresponding to a long section of the signal S'A is made inefficient. Then the level of the signal SG is latched in accordance with the signal S'A. Thus the accurate reproduction is possible even to a digital signal having a long section of inversion.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital information reproducing circuit, and more particularly to a digital information reproducing circuit for accurately reproducing digital information recorded on a recording medium such as a magnetic tape using a specific modulation method.

A conventional example will be explained with reference to FIGS. 1 to 3.

As shown in Figure 1, digital information recorded on a magnetic recording medium (e.g. magnetic tape, magnetic disk, magnetic drum, magnetic card, etc.) (SA in Figure 2, arrows indicate the direction of the magnetic field) ), the first stage of reproduction is performed on recording medium 1.
The reproducing magnetic head 2 is brought close to the signal and detected as an electrical analog signal by magneto-electrical conversion. This detection signal is amplified by an amplifier 3 so as to be suitable for processing in a reproducing circuit system (second numbered SB). As shown in FIG. 2, the signal SB corresponds to the binary code that is each component of digital information, that is, rlJ and rOJ signals, and the binary code is "
It is an analog waveform that has an extremely thick or extremely small peak at the boundary that changes from 1'' to rOJ or vice versa. The amplified signal 81B is input to the differentiating circuit 4 in order to reproduce digital information by utilizing the fact that the analog waveform having such maximum or minimum peaks changes in accordance with the content of the recorded digital information. Ru. From the differentiating circuit 4, the differential waveform which becomes zero level with respect to the maximum or minimum peak of the signal SB and which changes positive or negative with respect to this zero level is the signal S in FIG. The output is as shown below. This differential signal Sc is input to the next-stage zero level comparator 5. The zero level comparator 5 detects the timing at which the differential signal Sc changes to positive or negative with the zero level as a boundary, and outputs two signals corresponding to this timing. A digital signal whose waveform rises or falls between voltage levels is generated as shown in the signal SD in FIG. In this way, the digital information SA recorded on the recording medium 1 is reproduced by the reproduction circuit as a corresponding digital signal.

By the way, as a method for recording digital information as shown in FIG. 3(a) (in the figure, rlJ and rOJ indicate binary codes) on a recording medium, F as shown in FIG. 3(c) is used.
M method, MFM method as shown in figure (C), figure (d)
It is known that there is an NRZI system as shown in ). Both methods magnetically record digital information, which consists of binary codes, on a recording medium, and modulate it in a way that is extremely convenient for reproduction from the recording medium. A method that corresponds to the characteristics of magnetic recording and reproduction, such as in order to be able to remove the DC component of digital information, or to be able to simultaneously reproduce the signal reading clock during reproduction. will be adopted. That is, F in FIG. 3(b)
In the M method, 2f(
f indicates the carrier frequency of the digital information to be modulated),
The “0” signal is associated with f, and in the same figure (C
), the signal is inverted at “1”, rOJ
If the rOJ signal is not inverted and the rOJ signal is continuous, it is "0".
This method inverts the signal at the boundary between the signal and “0”, as shown in the figure (
In the NRZI method of d), a signal of "1" inverts and "
This is a method in which the signal is not inverted when the signal is "0".

Therefore, when one section of the signal of each component "1" or "0" of the digital information to be modulated is T, in the first two methods, the signal is inverted at least once in the section of 2T. This will occur twice. As explained in Fig. 2, the more signal inversions there are, the more
Digital information can be reproduced accurately. However, in the NRZI method shown in Fig. 3(d), the signal reversal force (sometimes not occurring in the 2T section). may no longer correspond to digital information.

That is, before recording onto a recording medium, digital information as shown in FIG. 3(a) is modulated into NRZI digital information as shown in FIG. If that information is recorded (
Figure 3 (replaces SA in Figure 2 with information on ψ) shows the signal waveform when the digital information is detected through the reproducing magnetic head (in Figure 1, the information on ψ is replaced with information on ψ as shown in Figure 2 SB). For example, in the figure (d), P
Alternatively, a portion of zero level occurs in the interval of q [an interval in which "0" is quite continuous], and as a result, the signal passes through the differentiating circuit 4 and then the zero level comparator 5 converts it into P or Q as digital information. Even though the signal is "0" within the section, a "1" signal is detected as if it were present within that section, and as a result, the signal in Figure (d) cannot be reproduced accurately. I can't.

Therefore, the main purpose of the present invention is to eliminate the above-mentioned drawbacks. It is an object of the present invention to provide a digital information reproducing circuit capable of accurately reproducing digital information without any errors.

To summarize this invention, an alternating current signal having a higher frequency than that corresponding to the recorded digital information is superimposed on the differential signal by an adding means, and this superimposed signal is converted into a digital signal by a zero level comparator. While only the boundary between “1” and “0” is considered significant, “1”
Alternatively, the circuit means is configured to ignore "0" leakage.

Hereinafter, the present invention will be explained in detail based on illustrated embodiments.

FIG. 4 is a block diagram of one embodiment. Note that the same reference numerals as circuit means in FIG. 1 indicate the same or equivalent circuit means. Reference numeral 6 denotes an oscillation circuit, which outputs an AC oscillation signal (signal SE) having a frequency sufficiently higher than the frequency of the analog signal corresponding to the recorded digital information output from the differentiating circuit 4. 7 is an adder circuit (mixer) which receives the signal SE and also receives the differential signal s from the differentiator circuit 4;
9 and add these two together. The output of the mixer 7 (signal "p") is given to the next stage zero level comparator 5. The zero level comparator 5 determines whether the input analog signal SF exceeds the set reference level, that is, the zero level here. The first digital signal (signal S
G) is discarded. Moreover, this zero level comparator 5 may be a zero cross detection circuit. They are functionally equivalent, and are circuits that change the output level to positive or negative each time the analog input signal crosses the zero level. The output part of the zero level comparator 5 is connected to the trigger power (TR) of a retrigger type monostable multivibrator 8 (hereinafter referred to as "retrigger multi"), and is connected to a D type flip-flop circuit 9 (hereinafter referred to as "retrigger multi"). , this flip-flop circuit is connected to the D input of "DFFJ".The output section of the re-trigger multi 8 is connected to the trigger input (TR) of the DFF 9.

Once the re-trigger multi 8 is triggered and enters a quasi-stable state, the circuit will not respond at all even if a trigger pulse is input again during that state, and the circuit will not respond at all even if a trigger pulse is input again. Unlike an ordinary multivibrator, which only outputs pulses, it also responds to triggers in the metastable state of the circuit, each time causing the circuit to enter a new metastable state. Therefore, if a plurality of consecutive trigger pulses are input at intervals within the metastable period of the circuit, one wide square wave output pulse will be generated. The basic principle of a retrigger multi-circuit is that the time constant capacitor is charged (discharged) by a certain amount for each input, each time resetting the circuit's metastable state. In this embodiment, the time required for one trigger to go from a quasi-stable state to a stable state is set to d. This time d is approximately half or less of the time (=minimum period) allotted to one digit of the recorded digital signal.

The output SH of this re-trigger multi 8 is the power input to the trigger input (or clock input) of DFF9 & DFF9 is a well-known flip-flop, and when the i-trigger pulse is given, the information given to the data input terminal is Read and accumulate at least until the next trigger pulse is given.
have the ability to remember. In this example, the trigger is activated only by the fall of the signal SH, and the level state of the output SG of the zero level comparator 5 is latched. DFF
The signal St outputted from the terminal 9 to the terminal 10 is reproduced digital information.

Next, the circuit operation of one embodiment will be explained based on the signal waveform diagram shown in FIG. Recorded digital information Sλ recorded on a recording medium 1 such as a magnetic tape is detected by a magnetic head 2, electrically amplified by an amplifier 3 (signal si), and then differentiated by a differentiating circuit 4 to produce a first analog signal. A signal s(5) is output to the mixer 7.The mixer 7 adds an AC bias signal sE from the oscillation circuit 6 to this signal 5/.
is superimposed to generate a signal SF as a second analog signal, which is input to the zero level comparator 5. The zero level comparator 5 changes the output level to positive or negative every time the signal SF crosses the zero level. Since the signal SF has a high frequency component, it is output near the zero level, and the positive and negative changes in the voltage are frequent. This relatively high frequency portion of the signal SG is defined as a frequency portion. The other level-like output portions that have relatively little change are classified as level portions. Therefore, as an example, if you refer to the signal SG for the series of "0" signals on the rightmost side of the digital waveform shown as SA in FIG. Of course, a frequency section occurs, but a relatively long section or frequency section also appears in the intermediate section. The same goes for a series of consecutive "1"signals; generally, a frequency section occurs in the middle of a long series of "0" or "1" signals.Then, the levels on both sides of the long continuous frequency section Both sides are at high level or low level, and a state where both sides are high and low or low and high does not occur.

The re-trigger multi 8 is triggered by a change in the level of the signal S6 (
(rising and falling edges) and outputs square wave pulses. Furthermore, since it is a retrigger type, the square wave pulse falls at the rear end of the frequency section, in other words, when time d has elapsed from the level change that extends to the right in the figure and corresponds to the rightmost end on the non-time axis. . The fall of this square wave has a significant effect on the DFF 9 at the next stage, and serves as a trigger for the DFF 9. DFF9 latches the level of signal SH at the time when this trigger is activated. DFF9 is connected to the boundary between “0” and “1” in the signal Sλ or between “1” and rO
The output is always inverted corresponding to the boundary with J. However, this DFF 9
The latch does not operate and maintains the same output level.

Therefore, a digital signal corresponding to the digital information (waveforms S and C) recorded on the recording medium 1 is derived from the output section of the DFF 9, as shown by the signal waveform SN in FIG.

Note that the first circuit means for outputting the first digital signal (SG) is the zero level comparator 5 in the above embodiment. Since this is a comparator, the purpose is to vary the reference voltage to provide versatility, and it is not necessarily set to only the zero level, but may be set to a predetermined voltage level near the zero level.

As mentioned above, the zero-level comparator may be a zero-cross detection circuit as a subordinate concept.

Note that although the recording medium has been described throughout this specification with magnetic recording media such as magnetic tape, magnetic disk, magnetic card, and magnetic drum in mind, the present invention is not particularly limited to magnetic recording media. For example, it goes without saying that the present invention can be similarly applied to a digital signal reproducing circuit system based on photo-electrical conversion by detecting the presence or absence of a hole or its density using light (particularly laser light).

As described above, according to the present invention, a digital signal consisting of a level part and a frequency part is created from a differential signal on which an AC bias signal is superimposed, and a period in which "1" or "0" continues for a relatively long time is generated. Since the digital circuit means is configured to make the intermediate frequency part meaningless, even if the digital information has a relatively long inversion section, there will be no reproduction error caused by the differential signal of the information dropping to zero level. This has the effect of reproducing accurate digital information.

The present invention is particularly advantageous in reproducing digital information recorded on compact cassettes or microcassettes using the NRZI method.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional example, FIG. 2 is a signal waveform diagram of each part of the circuit shown in FIG. 1, and FIG. 3 is an explanatory diagram of a recording method. FIG. 4 is a block diagram of an embodiment of the present invention, and FIG. 5 is a waveform diagram of each part of the circuit shown in FIG. 1... Magnetic recording medium, 2... Magnetic head, 3...
Amplifier, 4-4 division L 5... Zero level comparator, 6... Oscillator, 7... Adder circuit, 8... Retrigger type monostable multivibrator, 9... D type flip 70 tubes . Patent Applicant: Sharp Corporation Agent: Patent Attorney: Aobai Bo and 2 others Figure 1, Figure 2, S. Figure 3

Claims (3)

[Claims] (1) Digital information corresponding to the recorded digital information is obtained by detecting recorded digital information recorded on a recording medium, amplifying it with an amplifying means, and then differentiating it with a differentiating circuit to process the obtained first analog signal. A digital information reproducing circuit configured to reproduce a digital information, which receives the first analog signal, receives an AC oscillation signal from an oscillation circuit, and superimposes the AC oscillation signal on the first analog signal to generate a second analog signal. an adder circuit that outputs a signal; and a level section that receives the second analog signal and causes the waveform to rise or fall between two voltage levels each time the analog signal crosses a preset voltage level. a first circuit means for outputting a first digital signal as a signal including a frequency part; and a first circuit means for outputting a first digital signal as a signal including a frequency part; second circuit means for generating a signal; second circuit means for receiving said first digital signal and varying its output based on said second digital signal and a level portion following said frequency portion of said signal; 3. A digital information reproducing circuit characterized in that the digital information reproducing circuit comprises a third circuit means, and is configured to derive the reproduced digital information corresponding to the recorded digital information from the third circuit means. (2) The digital information reproducing circuit according to claim (1), wherein the predetermined time is approximately 1/2 of the time allocated to one digit of recorded digital information. (3) The second circuit means is a retrigger type monostable multivibrator.
The digital information reproducing circuit described in item 2).