JPS58114317A - Reader of digital modulated signal - Google Patents

Abstract

PURPOSE:To ensure the stable and accurate reading of the digital modulated signal, by comparing a modulated signal of a modulating system in which a high- level period is equal to a low-level period with a prescribed comparing level and then detecting the time moduli of high and low levels to control the prescribed comparing level. CONSTITUTION:An FM signal is recorded to a laser disk, etc. so that the mean time moduli are approximately equal to each other between a high level and a low level. A reproduced signal of such FM signal is used for a forward phase input of a comparator 2 via a capacitor C1, and a prescribed comparing level is applied to a backward phase input. These inputs are fed to a D-FF5 and an edge detector 3 to undergo a signal process. An LPF containing a resistance R7 and a C9 and an LPF containing an R8 and C10 as well as an inverter 6 are provided in order to detect the time moduli of high and low levels for the output of the comparator 2. The time moduli are fed to a differential amplifier 11, and the prescribed comparing level of the comparator 2 is controlled by a differential output. In such a way, a faithful reproduction is possible for the signal which passed through a recording or transmitting system in which a high level and a low level are asymmetrical to each other.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reading device for a digital modulated signal, and in particular for reading a modulated signal in which digital information is modulated using an FM (Frequency Mom 1a-tio%) modulation method and then recorded or transmitted. Regarding the device.

One of the modulation processing methods when sending digital information signals such as POM (pulse code modulation) signals to recording media or transmission media
As an example, the %FM modulation method is widely known. This modulation method inverts the level at both ends of each bit cell of the digital signal that is the modulated signal, inverts the level at the center of the bit cell when the bit is "1", and inverts the level at the center of the bit cell when the bit is "0". This is done based on the conversion rule that no inversion processing is performed at the center of the bit cell. - Figure 2 (6) shows an example of a signal waveform modulated by this modulation method. In this FM modulation method, the high level and low level periods are equal as shown in the figure, so Since it does not contain a DC component and the level is necessarily inverted at the boundary of the bit cell, lock information required during demodulation can be obtained, which has the advantage of being able to perform a so-called cell clock.

Due to the finite frequency characteristics of the transmission system, recording medium, etc., the digitally modulated signal transmitted or recorded using this modulation method is received by the information reading device as shown in Figure 2 (6).
This results in a distorted waveform like this. This signal is generated by the circuit shown in Figure 1, which is a signal equivalent to a binary signal during modulation (Figure 2 (1)
)) and input to a demodulation circuit (not shown).

Referring to FIG. 1, the received signal shown in FIG. 2(b) is input to the positive phase input of the level comparator 2 via the capacitor
The comparison output (1) becomes the data input of the D-FF (delayed flip-flop) 5, and the edge detector 3.
It is also an input. By applying the ground level to the negative phase input of the comparator 2, the received signal (6) is compared with the zero level. The edge detector 3 is MMV
(monostable multivibrator) 31.32 and inverter 33. Moreover, it's better than Or Dirt 34, 9, MM
The comparison output (1) is directly applied to the trigger input of V 3:i, and the negative phase input of the comparison output (c) by the inverter 33 is applied to the trigger input of MMV 32. Both M
Each Q output of the MV is powered by two OR gates 34. The output (b) of this gate 34 is input to the PLL (phase-locked loop) circuit 4, and its output (-) becomes a clock signal and serves as a clock input to the D-FF 5, as well as a self-clock signal to the demodulation circuit in the next stage. It is sent as a signal for use. The Q output ω of the D-FF5 becomes binary level read information.

Figure 2 (6) to (1) show the signals (&) of each part of the circuit in Figure 1.
The waveforms of ~ω are shown in correspondence with each other, and the input signal (6)
is compared with zero level in comparator 2, so that (
It is converted into a binary bell signal as shown in 6) and has approximately the same waveform as the initial modulated signal (α), but due to the initial sound and time axis jitter contained in the received signal, the original signal (α) ) is different from This comparison output (6) is input to the edge detector 3, and a pulse side signal of a constant width corresponding to each edge is obtained as shown in (d). Since this pulse train signal contains clock information, the PLL
It is possible to extract a clock signal input to the circuit 4 as indicated by the symbol #. By using this clock signal and reading the comparison output by the D-FF 5, the digital modulation signal shown in Fig. 3 is restored.

By using the circuit shown in Fig. 1, it is possible to perform transmission using electric systems, transmission in systems that are inherently symmetrical such as +, -, and NS, such as magnetic recording and reproducing systems, and recording and reproducing. It is possible to obtain the original signal accurately.

However, pits (
In a recording and reproducing system that optically reads the state of a digital modulation signal with a concave part at a low level and the state without pits at a high level, it is necessary to adjust the amount of reflected or transmitted light during playback. Since this is used to detect the presence or absence of pits and to detect binary levels, the peak values of the high level and low level are symmetrical, so the reproduced signal has an upper and lower pitch as shown in Figure 2 (6). The peak level is not necessarily symmetrical and has asymmetry as shown in FIG. 3 (6). If the waveform shown in Figure 3 (6) is input to the circuit in Figure 1, the comparison output will be as shown in Figure 3 (p
), which is a one-dimensional modulated signal, is significantly different from the waveform of (α) in the figure. As a result, the pulse train signal obtained by the edge detector 3 becomes extremely irregular as shown in FIG. 3(d), so that the PLL circuit 4 cannot stably extract and reproduce clock information. Furthermore, even if the clock signal can be regenerated, the output of comparator 2 is
As shown in FIG. 6, if the signal is significantly different from the original signal and contains a lot of jitter and noise, accurate reproduction of information will be impossible.

Therefore, it is an object of the present invention to provide a digital modulation signal reading device capable of stably and accurately reproducing a digital modulation signal that has passed through a system in which the correspondence between high and low levels is asymmetric.

A digital modulation signal reading device according to the present invention is a device for reading a modulation signal of digital information recorded or transmitted using a modulation method in which the time rates of high level and low level are almost equal, and the device reads a modulation signal of digital information recorded or transmitted by a modulation method in which the time rate of high level and low level is almost equal, and and ζ), detecting the high and low level time rates of the comparison outputs of and ζ), and controlling a predetermined comparison level so that the time rates of both are always approximately equal. .

The present invention will be explained below using the drawings.

FIG. 4 is a circuit diagram of an embodiment of the present invention, and parts equivalent to those in FIG. 1 are designated by the same reference numerals. N modulated signal of digital information recorded on a laser disk etc. (Figure 3)
)) is reproduced by the pickup (see Fig. 3 (6)).
) is made the positive phase input of the comparator 2 via the coupling capacitor 1, and its level is compared with a predetermined comparison level which is the negative phase input of the comparator 2, and is input to the D-FF 5 and the edge detector 3 for signal processing. What is done is equivalent to the example in FIG.

In order to detect the time ratio of high level and low level in the output of the comparator 2, a first LPF (low pass filter) consisting of a resistor 7 and a capacitor 9) and a second LPF consisting of a resistor @8 and a capacitor 10 are used. A comparison output is directly applied to the first LPF, and the comparison output is inverted by an inverter 6 and supplied to the second LPF. (at the output of both LPFs).

(b) is input to the differential amplifier 11, and the difference output (0) between them is input to the level comparator 2 in reverse phase and serves as a comparison level.

Here, as mentioned above (if the modulation method is such that the average time rate of high level and low level are almost equal, such as the FM modulation method, the modulation signal contains almost no DC component, so the level comparator If the level of 2 is set to zero level, the time ratios of both a) and low level of the comparison output are almost equal, and if the comparison level is set to be larger than the zero level, the time ratio of the high level of the comparison output is On the contrary, if the comparison level is set to a zero level or a small value, the time rate of the high level of the comparison output increases significantly, and the time rate changes according to the comparison level. Therefore, by detecting the change in the time rate of the high and low levels of this comparison output and controlling the comparison level of the comparator accordingly, it is possible to always control both time rates of the comparison output equally. It is.

In view of this fact, the time rate of the comparison output is detected by the first and second low-pass filters, and since the DC component level of the comparison output corresponds to the time rate of both levels, the time rate of the comparison output is detected by the first and second low pass filters. Changes in the outputs of the first and second LPFs are shown in FIG. 5 (6).

(B) Therefore, the change with respect to the comparison level of the differential amplifier 11 becomes as shown in FIG.
If the comparison level is too low, the comparison level is increased, and if the comparison level is too high, the comparison level is automatically controlled to be decreased.

As shown in Figure 2 (6), it is possible to faithfully reproduce signals that have passed through a recording or transmission system where the peaks of the low level and low level are asymmetric, and the clock can always be extracted and reproduced stably. This makes it possible to obtain accurate data information. The detection of the time rate at each level is limited to the illustrated example, and one kind of modification is possible.

In addition, although the case of an optical recording disk was described above, it is not limited to this, nor is it limited to the FM modulation method. In short, any modulation method is applicable as long as the signal after modulation has substantially the same time rate of high level and low level.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional digital modulation signal reading device.
2 is a waveform diagram showing the operation of the circuit in FIG. 1, FIG. 3 is a waveform diagram showing the operation of the circuit in FIG. 1 when applied to an optical recording disk, and FIG. 4 is a waveform diagram showing the operation of the circuit in FIG. 1. Example schematic,
FIG. 5 is a characteristic diagram illustrating the operation of the circuit shown in FIG. 4. Explanation of symbols of main parts 2...Level comparator 3...Edge detector 4.
...PLL circuit 5...D-FF11...
Differential amplifier applicant: Pioneer Co., Ltd. agent: Motohiko Fujimura, patent attorney

Claims (2)

[Claims] (1) A digital modulation signal reading device for reading a modulation signal of digital information recorded or transmitted using a modulation method in which the time rate of high level and low level are both approximately equal, the reading device having a predetermined comparison level with the modulation signal. and a time ratio detection means for detecting a time ratio between a high level and a low level of the output of the comparison means and controlling the predetermined comparison level according to this time ratio. A device that does this. (2) The time rate detection means is configured to detect a DC component of the comparison means and control the predetermined comparison level according to this DC level. The device described.