JPS5817743A - Transmitter for digital signal - Google Patents

Abstract

PURPOSE:To improve substantial signal transmission speed, by using a frequency shift modulation wave with different channel number, and transmitting one digital signal on the same transmission path at the same time. CONSTITUTION:An output of frequency shift modulators 110 and 111 is both transmitted with a transmission line 31, a frequency shift demodulator 240 receives frequencies f0 and f1 for demodulation, and a frequency shift demodulator 241 receives frequencies f0 and f1 for demodulation. A serial parallel converter 250 modulates an output of the demdoulator 240 into a parallel signal and a serial parallel converter 251 converts the output of the demodulator 241 into a parallel signal. Thus, the output of the converter 250, the output of the converters 120 and 251 and the code of the converter 121 are respectively equal. When the output of the converters 250 and 251 are arranged overlappingly, the code is the same as that of an A/D converter 13 and the code is converted into a D/A converter 26. Thus, since the transmission line is operated in parallel, the amount of information transmitted for a specified time can by doubled for a prescribed bit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal transmission device. This relates to a transmission device used in such cases.

A conventional device of this type is shown in FIG. In Fig. 1, (1) indicates a controlled station (hereinafter referred to as a slave station), (2) indicates a control station (hereinafter referred to as a master station), and (31) indicates a controlled station (hereinafter referred to as a master station).
) and (32) are transmission lines, respectively. In the codes used below, the code whose most significant digit is 1 represents the number of subordinate stations, and the number whose most significant digit is 1 represents the master station equipment. It is assumed that Ql is an input data signal, Kan is an output data signal, and both Kan is an analog signal. The output (c) is a frequency shift modulator (hereinafter abbreviated as MOD), (a) and ＠ are respectively parallel-to-serial converters (hereinafter abbreviated as PA), and (to) are analog-to-digital converters (hereinafter abbreviated as PA). a4. Trout is a demodulator (hereinafter abbreviated as DEM), (to) # is a serial-parallel converter (hereinafter abbreviated as φ), and (c) is a digital-to-analog converter (hereinafter abbreviated as D/A). ), ■ input interface (hereinafter abbreviated as IN), (to) output interface (hereinafter abbreviated as OUT), the line is the input control signal, Ql is the output control signal, the signal (g),
(to) are both on/off signals.

Next, the operation will be explained. Nx (
The output of 2) is a bit-parallel digital signal and LPA.
(b) converts the signal into a bit series form and uses this signal to frequency shift the carrier wave (FS) in the MOD eJ force.
) is modulated and sent to the transmission path (31). For convenience of explanation below, the output signal in % is the logic “0” part (space).
MODal) outputs a frequency of f for space input and a frequency of fl(f1'qf,) for mark input.

The DEM (c) inputs the signal from the transmission line (31) and outputs a space for the input of frequency f, and a mark for the input of frequency f1. S/P w is DEM (ha)
The bit-serial digital signal output from the D/A is converted into a bit-parallel digital signal for one word, and the D/A signal is converted into an analog signal.

The same is true when transmitting the control signal from the master station (2) to the slave station (1), but the control signal -, O is the first signal on, so N width and D/A are required. I don't.

Since the structure of the transmission equipment is more similar than that of conventional transmission equipment, the bit interval of the digital signal is shortened and the baud is
When the signal transmission speed expressed by K is increased, the occupied frequency bandwidth of the signal becomes wider.
), there is a limit to the frequency bandwidth that can be transmitted, so it is necessary to increase the number of transmission paths to increase the amount of information transmitted within a certain period of time. In addition, when duplicating equipment and switching in case of an accident, the accident must be detected on the receiving side and reported by the receiving side φλ.
When information transmission is unidirectional, there are drawbacks such as difficulty in switching.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it is possible to simultaneously transmit one digital signal on the same transmission path using a plurality of frequency shift modulated waves with different channel numbers. It is an object of the present invention to provide a transmission device with substantially improved signal transmission speed. .

Embodiments of the present invention will be described below with reference to the drawings.

Figure 2 is a block diagram showing one embodiment of the present invention, in which the same reference numerals as in Figure 1 indicate the same or corresponding parts, and (12
0) and (121) are P/ corresponding to 5 people (2) respectively.
For example, if the output of the A/D (to) is a parallel array of n bits numbered 1 to n (for convenience of explanation, n is an even number), then P/S (120) is
．． 3,5. ...Input each odd bit of number n-1 and output the stiffness in bit series form, P/S (121) is 2
゜4.6. . . . Inputs each n-th even numbered bit and outputs it in bit series form. (110), (111) are equivalent to MODα force
10) inputs the output of P/S (120) and outputs the frequency of fo when the input is a space and fl when it is a mark, then MOD (111) is the output of P/S (121)
When the input is a space, the frequency of Fif, (f, \f0. f2\f1) is output when the input is a space. namely MOD (110).

(111) generates frequency shift modulation wave signals of mutually different channels.

The outputs of MOD (110) and (111) are both transmitted through the transmission line (
31). (240) and (241) are D
DEM is equivalent to EM (c), but DEM (240
) receives and demodulates the frequencies of f, and fl, and generates DEM (
241) receives and demodulates the f6 and f2 frequencies. (
250) and (251) are S signals corresponding to S/P (c), but s/P (250) is a DEM (240). E7, S/P (251) is a DEM.
(241) Convert the output into parallel signals. Therefore S
The output of /P (250') is P/! The sign is the same as the input of S (120), and the output of S/P (251) is p/8
It has the same sign as the input of (121). S/P (,2
If the outputs of (50) and (251) are stacked and arranged, AA)
(It has the same sign as the output of 1+, which is converted to an analog signal by D/A (2). P/8 (120) →
MOD (110) −+DEM (240) −+ 8
/)' (250) ノ transmission [11M (121) −+
MoI) (In) →S/P (251) Since the transmission devices operate in parallel, P/S (120), (1
21) The amount of information that can be transmitted in a given time can be doubled while keeping the bit interval of the signal at the output as it is.

In addition, in Fig. 2, MOD@ is a frequency shift modulation signal, and f6yfl(f3\t6+t@S t□e f
3\f2) is generated 7, and the DEM (14) demodulates it, so that this signal can also be transmitted via the transmission line (31)K.

With the above calculation, if MOD (110) outputs the frequencies of fo and f8, and MOD (rill) outputs the frequencies of fo and f2, then MOD (110) outputs the frequencies of fo and f2.
Output the frequency of 7, MOD (111) ij f,
, and f2 frequencies may be output. Also, the normal signal FiPA (120) → MOD (110) → DE
Transmission 12 in the system M (240) → S/P (250),
P/S only specific priority words (121) 4M0D
(111) → DEM (241) → S/P (251
) may be used for transmission.

As described above, according to the present invention, since simultaneous transmission is performed using frequency shift keying signals of different channels, the amount of information that can be transmitted per unit time can be increased.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional device, and FIG. 2 is an explanatory diagram showing an embodiment of the present invention. (1)...Slave station, (2)...Master station, (110), (
111) Scrap... Frequency shift demodulator (MOD), (1
20), (121), (2)...Parallel-serial converter (P/S
), α]...Analog-digital conversion source constraint), (+
-t), (24o), (24t)...frequency shift demodulator (DEM), Q! , (250), (251
)...Serial to parallel converter (S/P'), m...Digital to analog converter (D/A). Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Shin Kuzuno −

Claims (1)

[Claims] Each parallel-serial converter converts the parallel bits of each bit group into a bit-serial form and outputs the input digital signal in bit-parallel form into a plurality of bit groups. Each frequency shift modulator that performs small frequency shift keying, means for setting each frequency shift modulator in advance so that the output frequencies of each frequency shift modulator are different from each other, and each of the above-mentioned frequencies. means for transmitting the outputs of the shift modulators through a common transmission path; demodulators for demodulating portions of the signals transmitted through the non-common transmission path that correspond to output signals from each frequency shift modulator; each serial-to-parallel converter converting the output of each demodulator into bit-parallel form;
A digital signal transmission device comprising means for rearranging each bit group output from each serial-to-parallel converter to reproduce the digital input signal.