JPS58168988A - Electronic timepiece with temperature compensating function - Google Patents

Abstract

PURPOSE:To increase a temperature compensation range by controlling the frequency of a crystal oscillator and the operation of a frequency divider according to the square of the temperature information of a temperature measuring circuit. CONSTITUTION:The output of the crystal oscillator 1 is supplied to a clocking circuit 3 through the frequency dividing circuit 2. A temperature compensating circuit 4 consists of the temperature measuring circuit 12, a squaring circuit 11 for squaring the output information of the circuit 12, the 1st counter 7 for measuring the pulse width of the circuit 11, a carrying circuit 13, the 2nd counter 8, registers 9 and 10, the 1st correcting circuit 5 which corrects the frequency of the oscillator 1 by referring to the output information of the register 9, and the 2nd compensation circuit 6 which inverts the interruption gate of the circuit 2 by referring to the output information of the register 10. The stepped difference of the compensation of the circuit 5 is compensated by the compensation of the circuit 6, so flat characteristic is obtained.

Description

[Detailed description of the invention] This is related to watches.

In the past, many methods have been proposed in which a temperature detection circuit is installed in an electronic watch to sense the temperature of the cell phone and compensate for the temperature of the reference signal source. Variations and Crystal Oscillators (7) Due to the difficulty of suppressing variations, few crystal oscillators have been put into practical use.

In recent years, in addition to the conventional temperature compensation capacitor type and high frequency oscillation type using an AT cassette crystal resonator, two tuning fork type crystal resonators with different temperature characteristics have been used to adjust the temperature. An electronic clock with compensation was developed. Among these new methods, the method of connecting two crystal oscillators in parallel to a single amplifier is said to eliminate the need for temperature detection. Although it has a long n〒, it has less advantages over high-frequency oscillation type lighting because the temperature compensation band is at most 0~40U and the crystal resonator must be specially made.

Also, from the difference frequency between the two crystal oscillators, the temperature and 1. If this method is used to obtain V-signal information, there is a possibility that errors may occur due to interference or tuning phenomena between the two oscillators.1.If the physical distance between the two oscillators is increased to avoid this, a state of thermal equilibrium cannot be guaranteed, so the temperature There is a problem that there is a possibility that a 1 error will occur (in the information), and the cycle time of the correction operation is long because detailed corrections are made to the frequency divider, and special measuring equipment is required. There are problems such as not being able to measure rate. The cycle time should be matched to this rate measuring device, otherwise it will not only cause inconvenience in after-sales service, but also
It is also not advantageous in terms of the production process.

Another method is a temperature compensation method that combines temperature measurement using a temperature-sensitive oscillator composed of IVIO8-PET, etc., and frequency control by switching the capacitance of a crystal oscillator, which has already been proposed by the applicant. It is. In this method, a capacitor that can be switched on and off by a switch such as a transmission gate is built into an IC for crystal oscillation, and is controlled based on temperature information.
Temperature compensation is performed by utilizing the fact that the average rate depends on the intermittent time ratio, and the maximum correction amount depends on the size of the switching capacity. According to this method, detailed (・Supplementary I)
E is possible, but it also has drawbacks.

In other words, in order to widen the temperature compensation range, the switching capacitance must be increased, but this will prevent the crystal oscillation conditions from being maintained optimally. It was necessary to make some sacrifice.

An object of the present invention is to solve the above problems.
(While keeping the oscillation conditions of the crystal oscillator optimal, the temperature is compensated for in an unprecedentedly wide temperature range (), and the rate measurement and rate adjustment at shipping inspections and watch shops are performed in the same way as ordinary electronic watches.) To provide a temperature-compensated electronic timepiece that is easy to handle and has excellent mass productivity.

In order to achieve the above object, the present invention provides a temperature compensation circuit having a temperature-sensitive oscillator constituted by an MO8I transistor in the same IC chip as a clock circuit, and further includes a crystal resonator having quadratic temperature characteristics. A first correction means that performs precise correction in a short time by mounting the IC chip in close contact with the circuit board on which the IC chip is mounted so that the temperature-sensitive oscillator and the crystal resonator are in a state of thermal equilibrium. The second correction means corrects the quadratic temperature characteristic into a step-like characteristic, and corrects the step-like characteristic into a flat straight line by means of a second correction means that makes a large correction at once.

Hereinafter, the configuration of the present invention will be explained according to the drawings.

FIG. 1 shows the configuration of an electronic timepiece according to the present invention.
It is an example block diagram. 1 is a crystal oscillator which is capable of oscillating at two different frequencies by being equipped with a switch for changing the 7-width capacitance of the oscillation circuit; 2 is equipped with an interrupt gate that divides the signal from the crystal oscillator 1; and an interrupt gate. This makes it possible to arbitrarily invert the frequency-divided signal in the middle (the frequency divider circuit 6 synthesizes the signals from the frequency divider circuit 2 to create a time measurement signal, and displays the time. 4 is a temperature compensation circuit f1 which sends a control signal to the switch of the crystal oscillator 1 and the frequency divider circuit 2v+interrupt gate.

Ai: 12 of the parts constituting the warm skin compensation circuit 4
11 is the temperature measurement circuit 12 which has a temperature-sensitive oscillator and outputs digital information approximately proportional to temperature;
A squaring circuit generates a signal with a pulse width proportional to the square of the temperature information of the duck; 7 is a first counter for measuring the pulse width of the output signal of the squaring circuit 11; 16 is a signal to which the first counter 7 is designated; a carry circuit that resets the first counter 7 and outputs a carry signal when the value reaches the above value; 8 is a second counter that counts the carry signal from the carry circuit; 14;
9 is a storage device for storing a numerical value for regulating the operating level of the temperature measuring circuit 12 and a numerical value for regulating the operation of the carry circuit 16; 9 is a storage device for storing the counting results of the first counter 7; 10 is a second register for storing the counting result of the second counter 8; 5 is a register for sending a control pulse to the switch of the crystal excavator 1 while referring to the output information of the second register 9; This is a dividing circuit, and together with the switch constitutes the first correction means. 6 is an interrupt circuit that sends a control signal to the interrupt gate of the frequency dividing circuit 2 while referring to the output information of the second register 10;
This constitutes a correction means.

To explain the operation of FIG. 1, the crystal oscillator 1 oscillates at a lower frequency when the control signal potential from the time division circuit 5 is at a low level, and at a higher frequency when it is at a high level. The circuit 2 is accelerated each time the control signal from the interrupt circuit 6 is inverted. The normal clock operation is always performed together with the clock circuit 6. - Measuring the signal period of the temperature-sensitive oscillator.
By multiplying or adding the numerical information from the storage device 14,
The resulting digital numerical information is output.

The second east circuit 11 performs a squaring operation on the numerical information from the temperature measurement circuit 12 using the most significant bit as a sign pit, outputs a signal whose pulse width is proportional to the squared result, and outputs a signal whose pulse width is proportional to the squared result. measures this pulse width using the frequency divided signal from the frequency dividing circuit 2. Since the second counter 8 counts the number of carries of the first counter 7, it may be considered as an upper part of the first counter 7. 1st
Information on the counter 7 is sent to the time division circuit 5 via the register 9, and information on the second counter 8 is sent to the interrupt circuit 6 via the second register 0.

At this time, the first and second registers? , 10 retain the previous counting results even during the counting operation of both counters 7 and 8, and when a new counting result is obtained, it is instantaneously rewritten at the optimal timing. The time division circuit 5 operates in a 2-second cycle, constantly refers to information from the Rujistor 9, and operates to apply a pulse with a time width proportional to this information value to the changeover switch of the crystal oscillator 1. make The interrupt circuit 6 also operates in a 2-second cycle, constantly refers to information from the second register 10, and operates to invert the interrupt gate of the frequency divider circuit 20 a number of times equal to this information value. In this example, the 16 KHz signal is inverted, so one interrupt operation is equivalent to a 15.26 pIm correction.

FIG. 2 is a characteristic diagram showing the compensation characteristics of the temperature compensation circuit 4 in the present invention. In the figure, the two quadratic curves indicated by broken lines are the frequency deviation △fL when the control pulse from the time division circuit 5 is at low level, and the frequency deviation Δf,I when it is at high level. , the difference between the two (hereinafter referred to as Δf8w) is almost constant at any temperature.

Δf indicates the characteristic when only the first correction means operates, and represents how the quadratic curve, which is the original characteristic of the crystal, is corrected to a step-like characteristic by fine correction. Δf2 indicates the case where both the first correction means and the 20th correction means work, and the stepped characteristic caused by the first correction means is further corrected by the second correction means, and a wide temperature range is obtained. This shows that the temperature characteristics are flat over the entire range.

The above-mentioned /'s j' s w is designed to be 5 to have a value of 15 or more, and the carry circuit 13 that carries up the first counter 7 calculates the correction amount of the first 11 positive means. The maximum value of is regulated to be approximately 15 ppl, so 6
The height difference of 110 steps is about 15 ppm, and the correction steps of the second correction means are approximately equal to 15.26rKMr.

As a result, the step difference in Δf is exactly compensated for by the second correction means, and a flat characteristic is obtained.

FIG. 3 is a circuit block diagram showing the configuration of FIG. 1 in more detail. The crystal oscillator 1 includes an inverter, a feedback resistor,
A crystal oscillator 22 is connected to an amplifier 21 including an oscillation capacitor, and a capacitor 25 that can be switched on and off by a changeover switch 24 is connected to the opposite side of the trimmer capacitor 26. is the crystal oscillator 1
A frequency divider 26 which divides the frequency by 1/2 by inputting the signal from
and the output signal F1 is controlled by the interrupt circuit 6.
an interrupt gate 27 for inversion by No. N P6;
A frequency divider 28 further divides the frequency of the output signal F/ of the interrupt gate 27 to create a time measurement unit signal and the like. Among the parts constituting the temperature compensation circuit 4, the temperature measurement circuit 12 includes a temperature-sensitive oscillator 38 composed of a MOS-FET, etc., and measures and digitizes the oscillation period τ of this oscillation signal. A period measuring circuit 39 that multiplies the numerical information sent from the storage device 14 by , further adds 2 to the numerical information, and further divides the resulting remainder by a predetermined number to output the resulting remainder as temperature information T. It is composed of. In this embodiment, the predetermined number is 28, and T is temperature information for 8 points. The 2-east circuit 11 checks the sign of the temperature information T using the most significant bit, squares the remaining 7 bits, and generates a signal P,+1 with a pulse width proportional to the 14-bit value obtained as a result. is configured to print.

This squared pulse PI+ is a 16KHz signal)7. It is a pulse whose period is 1-unit time, and the maximum length is 1 sand. The first counter 7 is provided with an A and N D gate 67 in order to use this squared pulse PII as a gate signal, and performs a counting operation using the 2 KHz signal 1.I passing through this gate 67 as an input signal. It is composed of 1-(・ru.

The digit 2 circuit 13 compares the value of 3 with the value of the first counter 7 in the number 111 information sent from the storage device 14, and outputs a coincidence signal. The OR gate 41 receives the control signal c1 for resetting the first counter 7 in advance and the coincidence signal from the minus number circuit 40 as input signals, and The configuration is such that the output signal is sent to the reset terminal of No. 7.
The counter 8 corresponds to the coincidence circuit 4 of the carry circuit 13.
Count the number of coincidences from the first counter 7, and use the control signal C1 to count the number of coincidences.
(It's a trap to be tricked.

The first register 9 and the second register 1o are tricured by the control signal C2, read the values of the first counter 7 and the second counter 8, respectively, and are sent to the time division circuit 5 and the interrupt circuit 6, respectively. Always output numerical information. The time division circuit 5 that operates based on the information of the first register 9 is a negative trigger set type OFF.
' 5 i and a coincidence detection circuit 52, the minus number generation circuit 52 inputs the divided signals F9 to F+6 of 512 Hz to 0.5 Hz as one data, The numerical information of the 8 pins is input as the other data, and the coincidence signal is input to the reset terminal of the P P 5 i. The frequency-divided signal FI6 is also input to the cent terminal of the F F 5 i, and the output pulse P of the time division circuit 5 is kept at a high level from the fall of F16 to the time of coincidence detection. Therefore, the time-division control pulse P5 is output once every 2 seconds, and its pulse width is changed from 0 to about 2 seconds in steps of 28 seconds, and this pulse is outputted from the crystal oscillator SW oscillator. When the voltage is applied to the changeover switch 24 of 1, the pHm differential operation 11- can be performed. Interrupt circuit 6
is divided by the 3-bit information from the second register 10.
The frequency-divided signals from path 2 are 1, 5, and the inverted signal 1, .
Consisting of a pulse train generation gate circuit that receives ~J, 1.6 as an input signal, and a toggle tie 7' FF 36:
3 f+, the pulse train generation gate circuit is ""
+ 4,” + 5, p, 6 and the second register 1o
1-manpower NAND31 using the highest number F as a human-power signal
, I'', , Jpa 2, and 2 of the second register 10.
A three-man power NAND 32 that uses Pino 1 as an input signal,
1゛, and Q! I 8e Two-man power N A N D 36 whose input signal is the highest pit of the second register 10, and three-man power N A N f whose input signals are the output signals of the three N]~\1)61-36. ) 34 and the said N A N I
) 34 and the frequency-divided signal 1" + 3 as input signals, the output signal is applied to the toggle tag +r 1-36, and the output signal is applied to the toggle tag +r 1-36.
After the frequency is divided by 2, the interrupt pulse P is generated. The signal is sent to the frequency dividing circuit 2 as a signal.

0) As a result, the number of times the control signal P6 output from the interrupt circuit 6 is inverted in the 2 second direction matches the value of the second register 10 marked j, and this signal P6 is the interrupt signal of the frequency divider circuit 2. gate 27
Since it is applied to 16 K llz M 1) 1 and inverts it, correction of 15.2'61F step is performed.

The storage device 14 stores set values for controlling the temperature measurement circuit 12. In order to memorize 3 as a set value for regulating the operation of the carry circuit 16, there is P-4, OM (・ is Rayuse R, OM (・(Also, it is necessary to cut the wiring pattern on the board. It becomes a structure (・ru.

The operation shown in FIG. 3 will be explained in more detail as follows. The oscillation period of the temperature-sensitive oscillator 68 included in the temperature measurement circuit 12 is, for example, 5 x 10- seconds at OC and 7 x at 50C.
It has a characteristic that the oscillation period changes in proportion to the temperature, such as 10-' seconds. In order to convert this τ into temperature information T, the circuit 1 measurement circuit 69 measures τ, converts it into a numerical value, multiplies this numerical value by 1, and adds N2.

A reference signal is required to measure τ, and in this embodiment, the frequency divided signal F2 from the frequency dividing circuit 2 is used.
・・・・・・・・・・・・・・・(1) However, J'F
2 is the 'L-divided signal door 2 frequency, m is an integer, and assuming that there is an additional '-' bit above the 8 bits representing T, this is the value of the upper pit. That is, τ
It is shown that the remainder obtained by adding 2 to the result of multiplying by 4 and measuring the time using the frequency-divided signal F2 and dividing by 28 is T. Note that this temperature measurement circuit has already been proposed by the applicant, so a detailed explanation will be omitted.

Also, it goes without saying that 1N is rounded down to an integer (...Temperature information T is converted into time again in the next squaring circuit, and if the time length is t, then t can be expressed as follows.

t −= (T 128 )2/fF' + ・・
・・・・・・・・・・・・・・・・・・・・・(2) In other words, t is the unit length of the period of the 16KHz signal T31. are processed as code pits. Depending on the circuit configuration of the 2nd east circuit 11, the following may occur. ``This is not an essential problem. Therefore, in this embodiment,
2) It is assumed that a square circuit that operates as shown in equation 2 is used. Let this time t be the gate time (, 2, H22 times F4
The value N obtained by counting is as follows.

N=t/f, 4 That is, N=(T-128)2/8 ・・・・・・・・・
...River......Ll Also, N is rounded down to an integer. Now, if the value remaining in the second horn/turf is N1, and the value remaining in the second counter 8 is N2, then
The relationship between N and numerical information and 3 is as follows.

To N=, to xN2+, ・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・+51 That is, N1 and N2 represent the remainder and quotient when N is divided by 3. At this time, the correction amount 11 by the first correction means is as follows.

N.

H,=△f II W x knee [p-]...
(6156) Then, the correction amount 11□ by the second correction means is as shown below.

11.1 2+5.26xN2 (Sir)
・・・・・・・・・・・・(7) Here, ha, j5wxK
The condition 3=15.26x256 is satisfied 7'l (
・Then, the total correction tflt, which is the combination of both, can be expressed by the relationship between N and 0).

Since N is a quadratic function of T as shown in equation (1),
Numerical information 1 < , and 2 set T to appropriate characteristics.
, -r roji. Furthermore, depending on the setting of K, even if ΔZ' q is larger than 114 or 15.26pIm, the maximum correction amount of the first correction means is set to 15.2691+
In, it is possible to match the correction step of the second supplementary +E means, and it is possible to make the connection between the two divine correcting means smooth.

It goes without saying that the present invention can be easily implemented even when the oscillation frequency of the temperature-sensitive oscillator is proportional or inversely proportional to the temperature. Further, the correction by the second correction means is 15.
Not limited to 26 ppm steps, if configured to invert and correct 32 h, llz step, 7.63 p.
It becomes IX11 steps, and by inverting 8K Hz + sub, it becomes 30.52 + 11X11 steps, and if the maximum correction amount of the first correction means is adjusted accordingly, a similarly excellent system can be realized. At this time, the number of bits of the second counter is not limited to 3 bits, but should be increased especially for 7,631) In steps.

As described above, the electronic watch of the present invention includes a temperature measurement circuit that outputs temperature information that is approximately proportional to the temperature, and a temperature measurement circuit that outputs temperature information that is approximately proportional to the temperature.
a square circuit that multiplies the power, and a first circuit that controls the frequency of the crystal oscillator.
a second correction means for controlling the operation of the frequency dividing circuit; a first counter for counting the square operation result of the square circuit; and a carry circuit for controlling the carry operation of the first counter. and a second counter for counting the number of carries, the first correction means is controlled by the value of the first counter, and the second correction means is controlled by the value of the second counter. By doing this, it realizes temperature compensation over a wider temperature range than ever before.
High accuracy can be maintained no matter where it is stored, making it extremely

[Brief explanation of drawings]

Fig. 1 shows the basic configuration of the present invention σ). Fig. 2 shows the temperature compensation operation of Fig. 1.
FIG. 3 is a circuit block diagram showing the configuration of FIG. 1 in detail. 4... Temperature compensation circuit, 5... Time division circuit, 6... Interrupt circuit, 7... 1st counter, 8...... 1st counter. 2 counters, 11...2
Multiplication circuit-200204060, 5Q

Claims (1)

[Claims] a crystal oscillator whose frequency-temperature characteristics are approximately quadratic; a frequency dividing circuit that creates a timekeeping unit signal from the output of the crystal oscillator;
In a temperature compensated electronic watch equipped with a temperature measurement circuit,
a first correction means for controlling the oscillation frequency of the crystal oscillator; a second correction means for controlling the operation of the frequency dividing circuit;
a squaring circuit that generates a time width proportional to the square of the numerical information from the temperature measuring circuit; and a first circuit that counts the frequency-divided signals from the frequency-dividing circuit using the output signal of the squaring circuit as a gate signal.
a counter, a second counter connected in series to the first counter, a setting value for regulating the operation of the temperature detection circuit, and a setting for specifying a carry condition of the first counter. a storage means for storing the value;
a carry circuit for carrying up the first counter based on a set value specifying the carry condition; the first correcting means is controlled by information on the porridge 1 counter; An electronic timepiece with temperature compensation, characterized in that the second correction means is controlled by information from the counter.