JPS58165368A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS58165368A JPS58165368A JP4720582A JP4720582A JPS58165368A JP S58165368 A JPS58165368 A JP S58165368A JP 4720582 A JP4720582 A JP 4720582A JP 4720582 A JP4720582 A JP 4720582A JP S58165368 A JPS58165368 A JP S58165368A
- Authority
- JP
- Japan
- Prior art keywords
- region
- forming
- well
- boron
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000012535 impurity Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 21
- 238000002955 isolation Methods 0.000 claims abstract description 15
- 238000009792 diffusion process Methods 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 3
- 239000000463 material Substances 0.000 claims abstract 4
- 238000010438 heat treatment Methods 0.000 claims abstract 3
- 239000000758 substrate Substances 0.000 claims description 8
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 230000000295 complement effect Effects 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 229920003259 poly(silylenemethylene) Polymers 0.000 claims 1
- 230000001755 vocal effect Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 abstract description 32
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 16
- 229910052796 boron Inorganic materials 0.000 abstract description 16
- 230000015572 biosynthetic process Effects 0.000 abstract description 5
- 239000002344 surface layer Substances 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 238000009388 chemical precipitation Methods 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 210000003127 knee Anatomy 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000003570 air Substances 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000009279 wet oxidation reaction Methods 0.000 description 2
- OQCFWECOQNPQCG-UHFFFAOYSA-N 1,3,4,8-tetrahydropyrimido[4,5-c]oxazin-7-one Chemical compound C1CONC2=C1C=NC(=O)N2 OQCFWECOQNPQCG-UHFFFAOYSA-N 0.000 description 1
- 101000742346 Crotalus durissus collilineatus Zinc metalloproteinase/disintegrin Proteins 0.000 description 1
- 241000219112 Cucumis Species 0.000 description 1
- 235000015510 Cucumis melo subsp melo Nutrition 0.000 description 1
- 241000238557 Decapoda Species 0.000 description 1
- 101000872559 Hediste diversicolor Hemerythrin Proteins 0.000 description 1
- 241000277331 Salmonidae Species 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 241000270666 Testudines Species 0.000 description 1
- FJJCIZWZNKZHII-UHFFFAOYSA-N [4,6-bis(cyanoamino)-1,3,5-triazin-2-yl]cyanamide Chemical compound N#CNC1=NC(NC#N)=NC(NC#N)=N1 FJJCIZWZNKZHII-UHFFFAOYSA-N 0.000 description 1
- 210000001015 abdomen Anatomy 0.000 description 1
- 239000012080 ambient air Substances 0.000 description 1
- 210000000988 bone and bone Anatomy 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000005098 hot rolling Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000011859 microparticle Substances 0.000 description 1
- 239000006187 pill Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明扛半導体装置0製造法に関し、脣にノ(イボ−1
う・0M0s4’@体俟illを料象とする。DETAILED DESCRIPTION OF THE INVENTION Regarding the method of manufacturing a semiconductor device according to the present invention,
The subject is 0M0s4'@bodyill.
バイポーラMPIIトランジスタと0M0nlFl’r
(相補111M0#電界効釆トランジスタ)と髪一つ9
半部体ji叡に共存さゼる場合、従来はlIi基*(f
−ブストレート)lit面KP臘つ:cル1g形M。Bipolar MPII transistor and 0M0nlFl'r
(Complementary 111M0# field effect transistor) and one hair 9
When coexisting in the half body jii, conventionally the lIi group*(f
-Blast rate) lit side KP 臘tsu: cl 1g type M.
して、cotwiウェルtベースとする横形11FPM
トランジスタ等を形属し、又他f)Pillウェルにy
チャネルMO8FKTt−、ウェルの形成されないN基
板異面KPチャネルMO8F1丁を形成する方式が一般
に採用されてbる。しかしこの方式では、バイポーラト
ランジスタOコレクタ抵抗r0゜が大きb各慣域間のア
イソレージ曹ン(電気約分1111)が困難などの欠点
があった。horizontal 11FPM based on cotwi well t.
transistors, etc., and other f) Pill wells.
A method is generally adopted in which one channel MO8FKTt- and one KP channel MO8F are formed on a different surface of an N substrate in which no well is formed. However, this method has drawbacks such as the bipolar transistor O's collector resistance r0° being large and the isolation between the respective ranges (electrical ratio 1111) being difficult.
これに対して本出願人に、Pg&1基仮の上に一部でN
壊込層を介してy−エピタキシャル81層髪形成し、
このy−エピタキシャル81層髪形より一方ではii
+’場込層に遍し、一方ではP−基板に接゛続されるP
−型ウエル會形成し、M+堀込層上のP−ウェルtペー
スとするNPM)ランジスタを形成するとともに、P−
基板に接続されるP−ウェルの−Sをアイソレージ曹ン
として利用し、又は夏チャネルMpalFITy形成し
、あるいはPウェルにより分−されtM−エピタキシ胛
・、。On the other hand, the present applicant was advised that some parts of the N
Forming 81 layers of y-epitaxial hair through a broken layer,
On the one hand, from this Y-epitaxial 81 layer hairstyle, II
+' P that spans the field layer and is connected to the P- substrate on the other hand.
Form a P-type well, and form a P-well t-type NPM transistor on the M+ trenched layer.
The -S of the P-well connected to the substrate is used as an isolation layer, or to form a summer channel MpalFITy, or separated by the P-well and tM-epitaxy tube.
ヤル層KPチャネルMO・−“FITij形成するバイ
ポーラ0MO8牛導体装筺V*案した。A bipolar 0MO8 conductor housing V* was proposed to form a bipolar layer KP channel MO--FITij.
このような方式によれはN 埋込層を利半することでコ
レクタ抵抗を小さくでき、Pウェルによるアイソレージ
曹ンも有効で69、プロセス的にも従来のパイポーッグ
■セスに比して工1数もそf’Lftど増加し1にい等
O利点を有する。上記方式によれにバイポーラトランジ
スタoH11ベースとyチャネルMO−νmtoPjl
l!!板とを同じP蓋つェルプロ竜スにより形成するた
めの、MOgFlテに適合するように?ウェルO不純物
―駅を低くするとバイポーラ−ではパンチスルーを起シ
島くする。逆KP履ベースO#I&[t116めると、
M0811テのV□か変る。又、P渥つェルによるアイ
ソレージロンはa度を轟くすることが望ましい。しかし
、i”ma*を各領域に連合するようK11lI整する
ためKはm別on択的不関物導入ニーとそれに伴なうマ
スクニーtIX必畳となってプロセスの禦細化はさけら
れ傘体ことKnつた。With this method, the collector resistance can be reduced by reducing the N buried layer, and the isolation process using the P well is also effective69, and the process requires less work than the conventional Pipog process It also increases f'Lft and has an advantage of 1. According to the above method, bipolar transistor oH11 base and y channel MO-νmtoPjl
l! ! Is it compatible with MOgFlte to form the same plate with the same P lid? Well O impurity - lowering the station will cause punch-through in bipolar. Reverse KP shoe base O#I & [t116 meruto,
V□ of M0811te changes. In addition, it is desirable that the isolation Ron by P-Tsell should be a degree louder. However, in order to adjust K11lI so that i'ma* is associated with each region, K becomes an m-separate on selective indifferent introduction knee and the accompanying mask knee tIX is necessary, and the process's thinning is avoided. Kntsuta is also known as body.
重置@はかがる間mを解決するためK)lされたン!、
、
もO″ee参9の1目的とするところはプロセスを複雑
化すること壜く、それぞれ011域衆mto不祠吻−a
ha正に勇肇し、轡惟のすぐれたパイボー90MOBX
Ow:@供することKToる。The superposition @ was K)l to solve m during Kagaru! ,
, One of the objectives of O″ee Part 9 is to complicate the process, and each
A truly brave and well-equipped Paibo 90 MOBX
Ow: @KToru to serve.
以下本発明tバイポーラOMO!110のプロセスにそ
って詳細に説明する。Below is the present invention t bipolar OMO! The process of step 110 will be explained in detail.
第1図(IL)〜(切にP−81基板上に葺デNバイポ
ーラトランジスタと0・MO87I?を形成する場合の
実施tU11−七のプロセスにそって各ニーの形III
II−示すものである。Figure 1 (IL) ~ (Implementation when forming a N bipolar transistor and 0 MO87I? on a P-81 substrate) Each knee shape III is
II - As shown.
(a) P−81基板1(1,0X101・ムtol
l@61 ” 。(a) P-81 board 1 (1,0X101・mutol
l@61”.
1〜20am ) k用意し、そのp面の一部にy 纏
込層2につくるための8b(アンチそン)を拡散した後
、公知のエピタキシャル成長法により、M−エピタキシ
ャル層3(1,2X10”Ato−〇国−■ 。1 to 20 am) is prepared, and after diffusing 8b (anti-silicon) to form the y inclusion layer 2 into a part of the p-plane, an M-epitaxial layer 3 (1,2×10 ``Ato-〇Country-■.
4Ω、深さ11μm)r形成する。4Ω, depth 11μm) r is formed.
(b) エピタキシャル層3表面に選択Wh散のため
のマスクとなる除仕II(8tOsll)4を熱生成し
、−との上に写真処理によりホトレジストマスク51形
成する。(b) On the surface of the epitaxial layer 3, a mask II (8tOsll) 4, which will serve as a mask for selective Wh dispersion, is thermally generated, and a photoresist mask 51 is formed on - by photo processing.
(0) 上記ホトレジストマスクYIrg!用して酸
化1140遍択エツナを行い、IPM)ランジスタOベ
ース(6)、アイソレージ薦ン(7)及びウェル領域(
8)k形成するためのボロン拡散量マスクir形終する
。(0) The above photoresist mask YIrg! Perform 1140 selective oxidation using oxidation to remove IPM) transistor O base (6), isolation layer (7) and well region (IPM).
8) Finish boron diffusion mask IR shape for forming k.
(句 上記マスクを通して過電Oウェル形成時より4馬
一度にエピタキシャル層表mに不純物ボロン911−導
入する。仁のボロン導入はデボジシ■ン又はイオン打込
み法により表面不純物一度は2〜5XIO”atnms
g 乃! 2〜I O” azoms国 梅度と
する。(The impurity boron 911 is introduced into the surface of the epitaxial layer at one time from the time of forming the overcurrent O-well through the above mask.The surface impurity is introduced by deposition or ion implantation at a time of 2 to 5XIO" atnms.
G No! 2 ~ I O” azoms country Ume degree.
(・) 全面に飼えば0VD(気相化学析出)法等によ
り/1it(シリコン) 、IiiOmMToる%Af
dシリコンナイトライドl[10に0.8pH廖に形成
し友後、ウェル部の上e)OVDII11rエッチして
エピタキシャル層の−5−tji出畜ゼ、その表面tエ
ッチしてIIi#Ij[K:ボロンの導入された表面層
を除去する。(・) If grown on the entire surface, 0VD (vapor phase chemical deposition) method etc./1it (silicon), IIIOmMToru%Af
d Silicon nitride was formed at a pH of 0.8 to 10, then the top of the well was etched to expose -5-tji of the epitaxial layer, and its surface was etched to form IIi#Ij[K :Remove the surface layer into which boron has been introduced.
(f) このあとウェット蔓囲気で拡散のための熱延
IIを行′&い、エピタキシャル層表面のボロン不純物
を内部へ戯〈引伸し拡散し、一方でM+皺込層2[jす
る?ベース層6が形成され、他方で1−轟*に級続丁A
Pアイソレージ曹ン7及び?ウェル8か形成される。こ
の引伸し琳散はウエレト番曲気中で行われるため、エピ
タキシャル層3の露出するウェル部分では拡散と同時K
Iaい8101114aか生成され、この810@誤4
亀によってウェル部e)表面のボロンが810.中にさ
らに徴収されて低不純物濃度となり、一方ではcvD@
10で橿われた部分の810991はそれほど成長ゼず
、表面の高11fボロンの吸収か少なく為不純物at髪
保持する。(f) After this, hot rolling II for diffusion is performed in wet ambient air to stretch and diffuse the boron impurities on the surface of the epitaxial layer inside, while the M+ wrinkled layer 2 [j? A base layer 6 is formed, and on the other hand 1-Todoroki* has a class continuation A.
P isolation carbon 7 and? Well 8 is formed. Since this stretching and dispersion is carried out in the air under Ouereto, the exposed well portion of the epitaxial layer 3 is exposed at the same time as the diffusion.
Ia 8101114a is generated, and this 810@erroneous 4
Due to the turtle, the boron on the surface of the well part e) is 810. The impurity concentration is further collected in the cvD@
The part 810991 that was cut off in 10 does not grow as much, and it retains impurities at hair because it absorbs less of the high 11f boron on the surface.
(g) この後、Pチャネ、vMOaFITO7−x
ドレイン拡散のための酸化膜のホトエッチを行な−。(g) After this, P channel, vMOaFITO7-x
Photoetch the oxide film for drain diffusion.
2回目の高11&:のボロン導入i行なう。このボロン
tエビ!キシャル層に拡散することにより、P+ソース
11.、P ドレインllt祷ると同時に又は七の後
にアイソレージ曹ンso衆面にP1チャネルストッパt
a、pベースの一部にP ベースコンタクト部14に形
成、する。The second high 11&: boron introduction i is carried out. This Boron T shrimp! By diffusing into the axial layer, the P+ source 11. , P1 channel stopper at the same time as the P drain or after the isolation process.
a, A P base contact portion 14 is formed on a part of the P base.
1′ζ
(ロ)次いでyチャネルMO8FITOソースドレイン
拡散のため01IIt化躾10*トエツチを行ない、リ
ン又はヒ素の導入髪tINU又は2(ロ)行なう、仁の
リン##會エピタキシャル層Klf、散することにより
、PウェルO−@KM ソース150M ドレイン1
6を祷ると同時にバイポーラ領域に薦 エイツタ11及
び薗 コレクターIL出し111gを形成する。1'ζ (b) Next, perform 01IIt formation 10*touch for y-channel MO8FITO source/drain diffusion, introduce phosphorus or arsenic, tINU or 2 (b) perform phosphorus ##, and scatter the epitaxial layer Klf. By this, P well O-@KM source 150M drain 1
At the same time as praying for 6, Eituta 11 and Sono collector IL output 111g are formed in the bipolar region.
この後、図示されないがゲート部エッチ、ゲート酸化、
コンタクFホトエッチ、電極形成の各111一4!テハ
イボーツ0M0IIXOk完成する。After this, although not shown in the figure, gate etching, gate oxidation,
Contact F photoetch, electrode formation 111-4 each! Tehi Boats 0M0IIXOk completed.
上記実麿内の工@(−F)で述べたように、Pウェル$
、アイソレージ曹ノー、ペース6形成のためのボーン導
入にあたって通常のウェル形成時より高#I腹にデボジ
シ■ン又はイオン打込み髪行ない。As mentioned in Sanemarouchi's work@(-F) above, P well $
When introducing bones to form Pace 6, a deposit or ion implantation was performed on the higher #I belly than when forming a normal well.
その後、CVD履10等でウェル部以外をマスクした軟
論でウェット寥−気中でウェル引伸拡散を行表うことで
ウェル、1IIIの不純物mKMtF菖2図に示すよう
に―の領域(アイソレージ曹ン、ベース)の不義物−[
31−に比して低下させること1:、!
かで龜る。すなわち、:l−の不純物導入l−で異なる
不純物濃度の領域を形成することができ、一方でKPM
)クンジ、、 、、、、、、4り耐圧(Bv、、。)、
f。After that, by masking the area other than the well part with a CVD shoe 10, etc., we masked the wet area by performing well stretching diffusion in the air. (based on) - [
Decrease compared to 31-1:,! It's cloudy. That is, it is possible to form regions with different impurity concentrations by introducing impurities l-, while KPM
) Kunji, , , , , 4 pressure resistance (Bv, .),
f.
を向上できるとと%に一方で舅チャネルMO#Fm’!
’0遥正なV、Mkmることかで龜ゐ。On the other hand, if you can improve your channel MO#Fm'!
'0 Harumasa's V, Mkm?
#11110(I)〜釦は前記実施ガのプロセスにおい
て0VDIIマスクを用いずに行なうIIPIバイポー
ラ・0M0B工0のプロセスの一部工−の形lIt示す
ものである。#11110(I) to buttons show a part of the process of IIPI bipolar/0M0B process 0 which is carried out without using the 0VDII mask in the process of the embodiment.
(a)P−81基板1上KM 壌込層2を介してN−
エピタキシャル層3を形成し、エピタキシャル層の表面
KIl化膜によるマスク4を形成し、仁のマスクを通し
て通常のウェル形成時よpus度のボロン91工ビ!キ
シヤル層8表面に導入する。(a) KM on P-81 substrate 1 N-
An epitaxial layer 3 is formed, a mask 4 is formed using a KIl film on the surface of the epitaxial layer, and boron 91 is applied through the solid mask at a higher degree than when forming a normal well. It is introduced onto the surface of the crystal layer 8.
これらの工@は第1図の(a)〜銖)工1で示【−た実
施ガと全く同様のl−となる。These works are exactly the same as the implementation shown in (a) to work 1 in Fig. 1.
(匈 このあと前記実施ガのよう&OVD■i付着する
ことなくボロンのエピタキシャル層内への拡散を行なう
、Nえばドライ01中でウェル拡散を行ない、同時にア
インレーシ曹ン、バイポーラのベースのP拡散を行なう
。この後ウェット酸化を行ないエピタキシャル層Ii1
面KJIIい’Lo*ll4m。(After this, as in the above-mentioned implementation, boron is diffused into the epitaxial layer without adhesion.N is well-diffused in dry 01, and at the same time, ainlasian carbon and bipolar base P are diffused. After that, wet oxidation is performed to form the epitaxial layer Ii1.
Men KJIIi'Lo*ll4m.
4b・・・・・・を形成することによって表面近傍の不
純物員度髪低くする。これにより同時に又扛仁の後にボ
ロンのエピタキシャル層への引伸し!IC散髪行なう。By forming 4b..., the number of impurities near the surface is significantly reduced. This also allows the boron to be enlarged into the epitaxial layer at the same time! Get an IC haircut.
この場合の拡散層@ a e 7 a @ 8 a a
s 畜はMWMトランジスタの二建ツタ拡散深さ楢fK
停める。Diffusion layer in this case @ a e 7 a @ 8 a a
s is the double-sided diffusion depth of the MWM transistor fK
stop.
(0) この後、Pチャネル)(osym’roソー
ス。(0) After this, P channel) (osym'ro source.
ドレイン拡散の究めOsl化@OホトエッチI行な一1
!m1IO高一度ボロン導入を行なうと同時にソース、
ドレイン、ウェル蕩アイソレージ璽ン鵠の1s面のチャ
ネルストッパ及びベースg:lyタク)11KMay會
導入、拡散してP+ソース11、?+ドレイン12.チ
ャネルストッパ13.1G。Mastering drain diffusion Oslization @O photoetch I line 1
! At the same time as boron is introduced into the m1IO high source,
Drain, well isolation channel stopper and base 1s plane channel stopper) 11K May introduction, diffused P+ source 11, ? +Drain 12. Channel stopper 13.1G.
ベースコンタクトt4を形成する。A base contact t4 is formed.
(Q 次すで菖チャネルMO虐ν1テのソース・ドレイ
ン基@0ためO酸化纒エツナ、リン又はヒ素の導入によ
j、Pウェルの一%KM+ソースIs。(Q) Next, the source/drain group of the iris channel MO ν1te is introduced by introducing O oxide, phosphorus, or arsenic, and 1% KM+source Is of the P well.
1+)−レイン1・t*ると同時にバイポーラ領域KM
X<−Jll’l及びI” s vl ll1tk
S u11B+
を形成する。1+)-rain 1・t* and at the same time bipolar region KM
X<-Jll'l and I''s vl ll1tk
S u11B+ is formed.
上記夷XS*O工@伽)〜(ホ)で述べたように、ウェ
ル、アイソレージ璽ン、ベース形lEのため、通常のウ
ェル形成時よjjl&#IIK1M−ンのデポジシ■ン
又はイオン打込みを行tkい、ドライ0■中でつエル拡
散、ウェット酸化1行なって表面近傍の不純物濃度會均
等に低くした後、アイソレージ曹ン及びバイポーラ領域
のペース角面の酸化at−取除いて2度目のメロン導入
【行なうことによp1アインレーシ■ン部Oチャネルス
トッパ及ヒベース領域の不純物濃度夏チャネルMOaF
m!形成のためのウェル領域の一度より大きくすること
かでき、工穆数を増加丁ゐことな(MPM)ランジスタ
のf、l向上できるとともKMチャネルMolymテの
V□を遥正に保持することができる。As mentioned in the above XS*O engineering@传传传张~(e), for well, isolation, and base type lE, deposition or ion implantation is required compared to normal well formation. After conducting 1 step of dry diffusion and 1 step of wet oxidation to uniformly lower the impurity concentration near the surface, the isolation carbon and the oxidized at-plane of the bipolar region were removed for a second time. Introduction of melon [By performing p1 ain raysin part O channel stopper and impurity concentration summer channel MOaF of hybase region
m! The well area for formation can be made larger than once, increasing the number of microparticles (MPM), increasing the f, l of the MPM transistor, and keeping the V□ of the KM channel polymer very positive. I can do it.
第4図はアイソレージ1ン、ベース、ウェル各領域の不
!111m!F一度曲鱒舅1とP(N)チャネル、MO
IIIFICTOソースドレイン及びチャネルストッパ
の不純wS度曲−N+>を対比的に示すもOlあ。
′1
本、明ゆ2.イ、−,。M′喫、工。Kfiえ、1.。Figure 4 shows the failure of the isolation, base, and well areas. 111m! F once curved trout 1 and P(N) channel, MO
The impurity curve -N+ of the source drain and channel stopper is shown in contrast.
'1 Book, Meiyu 2. I, -,. M'ki, engineering. Kfie, 1. .
イボーラIsO性絽髪向上さ゛′↓′−場会に極めて有
効である。It is extremely effective for improving Ibora IsO-type hair.
第1図(a)〜(6)は装置−によるバイポーラ麗Oa
プロセスの一実mar示す工sn+rr面図、このうち
(0)は正面断面―視図であられす、第2囚は#11図
の実施?1に対応する不純物#1度分布曲線図、第3図
(−〜(ωは本発明によゐバイポーラ麗08プロセスの
他の実jlaIPIlを示す一部工穆断面図、#I3図
は第3図の実施例に対応する不純物#ItL分布曲巌図
である。
l・・・P81!板、2・・・K 埋込層、3・・・N
−エピタキシャル層、4・・・酸化膜、6・・・ホトレ
ジストマスク、6・・・ベース、1・・・アイソレージ
町ン。
8・・・ウェル、9・・・ボロン、lO・・・O’VD
lll、11・・・P+ソース、12・・・P ドレイ
ン、13・・・P+チャネルストッパ、14・・・ベー
スコンタクト、16・・・M ドレイン、17・・・菖
エミッタ、18・・・N コレクタ域出し部、19・
・・P+チャネルス+
::
トツパ。
I1.、、。
代理人 弁理士 薄 出 利 中パ。
1 、:ご
4′12゜
第 1 図
第 1 図
第 2 図
表イレエク1?櫂ご χ
第 4 M
水面J7の1焚二 χ
第 3 図
手続補正書(方式)
事件の表示
昭和57 年特許願第 47206 号発明の名称
半導体装置の製造法
補正をする者
・、14: )5101株式会社 日 立 製 作
折代 表 名 三 1) 勝 茂
代 理 人
補正の対象Figures 1(a) to (6) show bipolar ray Oa using the device.
The SN+RR surface diagram showing the actual process, of which (0) is a front cross-sectional view, the second figure is the implementation of Figure #11? 3 (-~(ω is a partially processed cross-sectional view showing another fruit jlaIPIl of the bipolar 08 process according to the present invention; #I3 is a It is an impurity #ItL distribution curve diagram corresponding to the example shown in the figure. l...P81! Plate, 2...K Buried layer, 3...N
- epitaxial layer, 4... oxide film, 6... photoresist mask, 6... base, 1... isolation town. 8...Well, 9...Boron, lO...O'VD
lll, 11...P+ source, 12...P drain, 13...P+ channel stopper, 14...base contact, 16...M drain, 17...Iris emitter, 18...N Collector area extraction section, 19.
...P+Channels+:: Totsupa. I1. ,,. Agent: Patent attorney Usui Deri, middle-class patent attorney. 1, :Go 4'12゜ 1st Figure 1 Figure 2 Figure 1? Paddle χ No. 4 M Water surface J7 1 Firing 2 χ No. 3 Procedural amendment (method) Display of case 1982 Patent application No. 47206 Name of invention Person who makes amendments to manufacturing method of semiconductor device, 14: ) 5101 Manufactured by Hitachi Co., Ltd. Representative name: 3 1) Masaru Katsu, Shigeyo, Makoto, subject to compensation
Claims (1)
選択拡散用マスク材を形成し、上記マスクil−通して
領域ム及び領域BK不純物i導入し、次いで領域ム會他
のマスク材で柵った状態で領域B表面tエッチしt後、
ウェット雰d気中で上記不純物拡散のための熱処1it
t−行なうととくよj、Ii域ムの表面S度に対し領域
Bの表面1縦を小さくすることt%黴とする半導体装置
の製造法。 2、上記領域ムとしてバイポーラトランジスタのペース
及びアイソレージ目ンst1領域Bとして相補形MO8
FIIt’Tの一方の基体となるウェルを形成する特許
請求の範囲第1JJK記載の半導体装置の製造法。 3、半導体基板上に声域ム及び領域Bk形成するための
選択拡散用マスク材髪形取し、キ配マスクを通して領域
ム及び領域BK不純物を導入し、次いでドライ酸素中で
拡散、つづいてウエツ) glll 化を行なって厚い
酸化at形成することにより領域A及び領域1の表面不
#I愉a度を低くなし、この後の酸化膜を取除いた領域
ムに不純物を導入すること、により、領域ムo*tii
a度に対し領域1の表面−腹i小さくすること′g1−
轡黴とする半導体1itO艮造法。 4、 上記領域ムとしてパイポーシト、ランジスタのベ
ース及びアイソレージlンsr、*域1として相補形M
olνMY(D一方の基体となるウェルを形成する特許
請求psms第1項に記載の半尋体装woe造法。[Scope of Claims] 1. Forming a selective diffusion mask material for forming regions M and Bk on a semiconductor substrate, introducing impurities i into regions M and BK through the mask il-, and then forming the regions M and Bk. After etching the surface of area B while fenced with another mask material,
Heat treatment for the above impurity diffusion in a wet atmosphere (1 unit)
A method of manufacturing a semiconductor device in which the length of the surface of region B is reduced by t% with respect to the surface degree S of region Ii. 2. Complementary type MO8 as the above region M and st1 region B as the pace and isolation target of the bipolar transistor
A method for manufacturing a semiconductor device according to claim 1, wherein a well serving as one base of FIIt'T is formed. 3. Selective diffusion mask material for forming vocal region M and region Bk on a semiconductor substrate. Cutting hair, introducing region M and region BK impurities through a keyboard mask, then diffusing in dry oxygen, followed by wet treatment) The surface impurity level of areas A and 1 is lowered by forming a thick oxide layer through oxidation, and by introducing impurities into the area from which the oxide film has been removed, the area density is increased. o*tii
To make the surface of region 1 -antinoside i smaller with respect to degree a'g1-
Semiconductor 1itO fabrication method using mold. 4. The above region M is the pie position, the base of the transistor and the isolation ln sr, and the complementary form M is the area 1.
OLνMY(D) The half-fat body WOE manufacturing method described in Claim 1 of the Patent PSMs for forming a well serving as one of the substrates.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4720582A JPS58165368A (en) | 1982-03-26 | 1982-03-26 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4720582A JPS58165368A (en) | 1982-03-26 | 1982-03-26 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58165368A true JPS58165368A (en) | 1983-09-30 |
Family
ID=12768641
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4720582A Pending JPS58165368A (en) | 1982-03-26 | 1982-03-26 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58165368A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH021160A (en) * | 1989-02-10 | 1990-01-05 | Toshiba Corp | Semiconductor device |
JPH11312746A (en) * | 1998-03-26 | 1999-11-09 | Texas Instr Inc <Ti> | Combined bipolar circuit and cmos circuit and its manufacture |
JP2006253376A (en) * | 2005-03-10 | 2006-09-21 | Oki Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
-
1982
- 1982-03-26 JP JP4720582A patent/JPS58165368A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH021160A (en) * | 1989-02-10 | 1990-01-05 | Toshiba Corp | Semiconductor device |
JPH11312746A (en) * | 1998-03-26 | 1999-11-09 | Texas Instr Inc <Ti> | Combined bipolar circuit and cmos circuit and its manufacture |
JP2009016856A (en) * | 1998-03-26 | 2009-01-22 | Texas Instr Inc <Ti> | Combined bipolar circuit and cmos circuit and its manufacturing method |
JP2006253376A (en) * | 2005-03-10 | 2006-09-21 | Oki Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
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